ES2046209T3 - Estructura de contacto a tope de area reducida. - Google Patents
Estructura de contacto a tope de area reducida.Info
- Publication number
- ES2046209T3 ES2046209T3 ES87310857T ES87310857T ES2046209T3 ES 2046209 T3 ES2046209 T3 ES 2046209T3 ES 87310857 T ES87310857 T ES 87310857T ES 87310857 T ES87310857 T ES 87310857T ES 2046209 T3 ES2046209 T3 ES 2046209T3
- Authority
- ES
- Spain
- Prior art keywords
- polysilicone
- silicone
- region
- attack
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H10W20/0698—
-
- H10W20/056—
-
- H10W20/062—
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Air Bags (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Multi-Conductor Connections (AREA)
- Connector Housings Or Holding Contact Members (AREA)
- Installation Of Indoor Wiring (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US94415086A | 1986-12-17 | 1986-12-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2046209T3 true ES2046209T3 (es) | 1995-04-01 |
Family
ID=25480890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES87310857T Expired - Lifetime ES2046209T3 (es) | 1986-12-17 | 1987-12-10 | Estructura de contacto a tope de area reducida. |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP0272051B1 (enExample) |
| JP (1) | JPH0752751B2 (enExample) |
| AT (1) | ATE80750T1 (enExample) |
| DE (1) | DE3781778T2 (enExample) |
| ES (1) | ES2046209T3 (enExample) |
| GR (1) | GR3005727T3 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02202054A (ja) * | 1989-01-31 | 1990-08-10 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
| NL9100094A (nl) * | 1991-01-21 | 1992-08-17 | Koninkl Philips Electronics Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting. |
| GB9219268D0 (en) * | 1992-09-11 | 1992-10-28 | Inmos Ltd | Semiconductor device incorporating a contact and manufacture thereof |
| WO2003023847A2 (en) * | 2001-09-13 | 2003-03-20 | Koninklijke Philips Electronics N.V. | Integrated circuit, portable device and method for manufacturing an integrated circuit |
| DE102008045037B4 (de) * | 2008-08-29 | 2010-12-30 | Advanced Micro Devices, Inc., Sunnyvale | Statischer RAM-Zellenaufbau und Mehrfachkontaktschema zum Anschluss von Doppelkanaltransistoren |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5842257A (ja) * | 1981-09-07 | 1983-03-11 | Toshiba Corp | 半導体装置 |
| JPS59171140A (ja) * | 1983-03-17 | 1984-09-27 | Nec Corp | 半導体装置 |
| US4663831A (en) * | 1985-10-08 | 1987-05-12 | Motorola, Inc. | Method of forming transistors with poly-sidewall contacts utilizing deposition of polycrystalline and insulating layers combined with selective etching and oxidation of said layers |
-
1987
- 1987-12-10 EP EP87310857A patent/EP0272051B1/en not_active Expired - Lifetime
- 1987-12-10 AT AT87310857T patent/ATE80750T1/de not_active IP Right Cessation
- 1987-12-10 ES ES87310857T patent/ES2046209T3/es not_active Expired - Lifetime
- 1987-12-10 DE DE8787310857T patent/DE3781778T2/de not_active Expired - Lifetime
- 1987-12-16 JP JP62320042A patent/JPH0752751B2/ja not_active Expired - Lifetime
-
1992
- 1992-09-17 GR GR920402050T patent/GR3005727T3/el unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0272051B1 (en) | 1992-09-16 |
| DE3781778D1 (de) | 1992-10-22 |
| EP0272051A2 (en) | 1988-06-22 |
| DE3781778T2 (de) | 1993-01-28 |
| GR3005727T3 (enExample) | 1993-06-07 |
| EP0272051A3 (en) | 1989-02-01 |
| ATE80750T1 (de) | 1992-10-15 |
| JPH0752751B2 (ja) | 1995-06-05 |
| JPS63164359A (ja) | 1988-07-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ES2114529T3 (es) | Semiconductor con aislamiento de surcos llenados por flujo. | |
| KR980006037A (ko) | 반도체장치의 트렌치 소자분리 방법 | |
| KR890008988A (ko) | 전하저지층을 갖는 반도체 기억장치 및 그 제조방법 | |
| KR950034850A (ko) | 표시용 반도체칩의 제조방법 | |
| KR920017245A (ko) | 반도체장치와 그의 제조방법 | |
| ES2046209T3 (es) | Estructura de contacto a tope de area reducida. | |
| KR880011929A (ko) | 반도체 기억장치 | |
| ES2118793T3 (es) | Contacto de puerta de polisilicio autoalineado. | |
| DE59912665D1 (de) | Verfahren zur Herstellung von Leistungshalbleiterbauelementen | |
| ES2076468T3 (es) | Dispositivo semiconductor que tiene un transistor mejorado con puerta aislada. | |
| ES8604369A1 (es) | Un proceso para fabricar un dispositivo semiconductor | |
| KR970024303A (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법 | |
| SE9704209L (sv) | Halvledarkomponenter och tillverkningsförfarande för halvledarkomponenter | |
| KR860001489A (ko) | 반도체장치 | |
| JPS52149986A (en) | Semiconductor device and its production | |
| KR950015658A (ko) | 반도체소자 제조방법 | |
| JPS6419768A (en) | Semiconductor integrated circuit device | |
| ES2087245T3 (es) | Dispositivo semiconductor que tiene una ranura de aislamiento y metodo para fabricarlo. | |
| JPS6417425A (en) | Manufacture of semiconductor device | |
| JPS6464258A (en) | Manufacture of semiconductor device | |
| KR890004399A (ko) | 집적 반도체회로를 내포하고 있는 기판에 저고유 접촉저항을 갖는 접점을 제조하는 방법 | |
| KR940002933A (ko) | Tft의 이온 도핑방법 | |
| KR940004711A (ko) | 폴리실리콘층 형성방법 | |
| KR890005888A (ko) | Ldd구조 반도체 장치의 제조방법 | |
| KR920020606A (ko) | 반도체장치 및 그 제조방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
Ref document number: 272051 Country of ref document: ES |