ES2022019A6 - Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales. - Google Patents
Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales.Info
- Publication number
- ES2022019A6 ES2022019A6 ES9001241A ES9001241A ES2022019A6 ES 2022019 A6 ES2022019 A6 ES 2022019A6 ES 9001241 A ES9001241 A ES 9001241A ES 9001241 A ES9001241 A ES 9001241A ES 2022019 A6 ES2022019 A6 ES 2022019A6
- Authority
- ES
- Spain
- Prior art keywords
- transistor
- transistors
- gate
- cmos
- digital signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
- H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
- H03K19/017527—Interface arrangements using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage
Abstract
CONVERSOR DE NIVELES DE LOGICA COMPLEMENTARIA METAL-OXIDO-SEMICONDUCTOR (CMOS) A LOGICA DE EMISORES ACOPLADOS (ECL) DE SEÑALES DIGITALES. ES APLICABLE EN CIRCUITOS INTEGRADOS DE ALTA FRECUENCIA Y ELEVADA CARGA CAPACITIVA Y TIENE POR OBJETO CONSEGUIR UN RETARDO MINIMO EN LA CONVERSION SIN NECESIDAD DE ALIMENTACION ADICIONAL NI AUMENTO DEL NUMERO DE SALIDAS. CUENTA CON UN TRANSISTOR (T1) CUYA PUERTA ESTA CONECTADA A LA ENTRADA DEL CONVERSOR. ESTE TRANSISTOR (T1) ESTA CONECTADO A OTRO TRANSISTOR (T3) CUYO COLECTOR ESTA CONECTADO A UNA TENSION DE ALIMENTACION (VDD) Y A LA BASE DE OTRO TRANSISTOR (T4), QUE A SU VEZ ESTA CONECTADO A OTRO TRANSISTOR (T5). LA PUERTA DE ESTE ULTIMO TRANSISTOR (T2). LOS TRANSISTORES (T4) Y (T5) FORMAN UN DISPOSITIVO DE ALMACENAMIENTO INTERMEDIO QUE REPRESENTA LA SALIDA DE LA SEÑAL ECL.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ES9001241A ES2022019A6 (es) | 1990-04-30 | 1990-04-30 | Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales. |
EP19910106387 EP0455079B1 (en) | 1990-04-30 | 1991-04-20 | CMOS to ECL level converter for digital signals |
DE1991608281 DE69108281T2 (de) | 1990-04-30 | 1991-04-20 | CMOS in ECL Pegelwandler für digitale Signale. |
DK91106387T DK0455079T3 (da) | 1990-04-30 | 1991-04-20 | Konverter til at omsætte digitale signaler fra komplementær metaloxid halvleder (CMOS) logikniveau til emitterkoblet logikniveau (ECL) |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ES9001241A ES2022019A6 (es) | 1990-04-30 | 1990-04-30 | Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales. |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2022019A6 true ES2022019A6 (es) | 1991-11-16 |
Family
ID=8267137
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES9001241A Expired - Lifetime ES2022019A6 (es) | 1990-04-30 | 1990-04-30 | Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales. |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0455079B1 (es) |
DE (1) | DE69108281T2 (es) |
DK (1) | DK0455079T3 (es) |
ES (1) | ES2022019A6 (es) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4656372A (en) * | 1985-11-25 | 1987-04-07 | Ncr Corporation | CMOS to ECL interface circuit |
US4912347A (en) * | 1987-08-25 | 1990-03-27 | American Telephone And Telegraph Company, At&T Bell Laboratories | CMOS to ECL output buffer |
US4890019A (en) * | 1988-09-20 | 1989-12-26 | Digital Equipment Corporation | Bilingual CMOS to ECL output buffer |
-
1990
- 1990-04-30 ES ES9001241A patent/ES2022019A6/es not_active Expired - Lifetime
-
1991
- 1991-04-20 DE DE1991608281 patent/DE69108281T2/de not_active Expired - Fee Related
- 1991-04-20 EP EP19910106387 patent/EP0455079B1/en not_active Expired - Lifetime
- 1991-04-20 DK DK91106387T patent/DK0455079T3/da active
Also Published As
Publication number | Publication date |
---|---|
EP0455079B1 (en) | 1995-03-22 |
DK0455079T3 (da) | 1995-06-06 |
DE69108281T2 (de) | 1995-11-23 |
EP0455079A1 (en) | 1991-11-06 |
DE69108281D1 (de) | 1995-04-27 |
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