Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
  • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
  • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
  • H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02002—Preparing wafers
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
  • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
  • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/185—Joining of semiconductor bodies for junction formation
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/185—Joining of semiconductor bodies for junction formation
  • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
  • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
  • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/26—Bombardment with radiation
  • H01L21/263—Bombardment with radiation with high-energy radiation
  • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
  • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
  • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
  • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
  • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
  • H01L29/1608—Silicon carbide
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
  • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
  • H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions

Definitions

• the invention relates to a method for producing a pretreated composite substrate and a pretreated composite substrate that serves as the basis for further processing into electronic semiconductor components.
• Discrete high-blocking power semiconductor devices with a nominal blocking voltage of more than 600V are generally constructed vertically in both silicon and SiC.
• diodes e.g. MPS (merged-pin Schottky) diodes, Schottky diodes or pn diodes
• MPS merged-pin Schottky diodes
• Schottky diodes or pn diodes this means that the cathode is arranged on the front side of the substrate and the anode on the back side of the substrate.
• a similar arrangement applies in the case of vertical power MOS (metal-oxide-semiconductor) devices.
• the gate and source electrodes are on the front side of the substrate, the drain electrode on the back side of the substrate.
• the actual transistor element or the channel area can be arranged parallel to the surface (D-MOS) or perpendicular to the surface (trench MOS). Special constructions have become established for SiC MOSFETs, e.g. trench transistors.
• the width of the drift zone for a 600 V MOSFET device in silicon will be approximately 50 ⁇ m.
• the width of the stress-absorbing layer can be somewhat reduced compared to "simple" vertical MOSFETs.
• the special feature of this type of vertical component is that the drift zone is characterized by alternating vertical p- and n-doped columns. In the off state, the additionally introduced p-doping compensates for the increased charge in the n-doped region, which determines the resistance between the source electrode and drain electrode when switched on. Thus, with the same blocking capability, the on-resistance can be reduced by a factor of 10 compared to conventional vertical MOS transistors.
• the actual transistor element, or the channel area can be arranged parallel to the surface (D-MOS) or perpendicular to the surface (trench-MOS) in superjunction MOSFET architectures.
• D-MOS surface
• trench-MOS surface perpendicular to the surface
• the special material properties of SiC require the provision of specific manufacturing processes and the use of specific architectures in the channel and transistor area for vertical power semiconductor components.
• the active zones of many vertical power diodes or all power transistors are usually formed in monocrystalline epitaxial layers. These epitaxial layers are built up or deposited on crystalline carrier wafers. In this way, the doping and vertical extension (thickness) of the active epitaxial zone can be matched to the respective blocking voltage, and the highly doped carrier wafer can be optimized with regard to its doping in such a way that its contribution to the on-resistance is minimized.
• DE 10 2019 112 985 A1 proposes producing the semiconductor component without epitaxial deposition by splitting off a substrate from a SiC wafer and subsequent ion implantation of the drift zone using an energy filter.
• the present invention is based on the object of specifying a method for producing a pretreated composite substrate and a pretreated composite substrate, on the basis of which high-performance semiconductor components of high quality can be produced industrially with reduced effort and lower costs.
• the method for producing a pretreated composite substrate which serves as a basis for further processing into electronic semiconductor components, the pretreated composite substrate having an acceptor substrate and a doped layer connected thereto, has the following steps: a) providing a donor substrate having monocrystalline SiC; b) Doping a first layer in the donor substrate by means of ion implantation using an energy filter, the energy filter being a microstructured membrane with a predefined structure profile for setting a dopant depth profile caused by the implantation and/or defect depth profile in the first layer in the donor substrate, with a predetermined Dopant depth profile and/or a predetermined defect depth profile is generated in the first layer of the donor substrate, the first layer extending from the first surface of the donor substrate facing the ion beam to a predetermined doping depth, where a remaining part of the donor substrate follows; c) creating a predetermined breaking point in the donor substrate; d) providing the acceptor substrate and establishing a bond connection between the donor substrate and the acceptor substrate, the first layer being
• the first layer always consists of monocrystalline SiC.
• the donor substrate preferably consists entirely of monocrystalline SiC.
• the first layer preferably has a thickness of 3 to 15 ⁇ m. Ion implantation can reasonably be performed over a thickness of this magnitude.
• the donor substrate is a crystal of high quality, high purity, semi-insulating SiC (HQSSiC) material.
• HQSSiC high quality, high purity, semi-insulating SiC
• the donor substrate is polytype 4H, 6H or 3C SiC. These polytypes have turned out to be advantageous for the production of semiconductor devices.
• the surface of the donor substrate facing the ion beam preferably has a deviation of less than 6°, more preferably 4°, more preferably less than 3°, even more preferably 0° from a perpendicular to the c-direction.
• the 4° orientation is currently used for most device architectures.
• the particular advantage of 0° is that the donor wafer can be cut parallel to the surface and thus more partial wafers can be obtained from one cylinder.
• the donor substrate preferably has a thickness of more than 100 ⁇ m, preferably more than 200 ⁇ m, more preferably more than 300 ⁇ m up to 15 cm, preferably up to 10 cm.
• the donor substrate can have a carrier wafer, preferably made of SiC, and an epitaxial layer, the epitaxial layer being undoped or having a doping of less than 1 E15 cm' 3 , preferably less than 1 E14 cm' 3 , and the first Layer is part of the epitaxial layer.
• the epitaxial layer has a thickness of more than 10 ⁇ m, preferably more than 50 ⁇ m, more preferably more than 80 ⁇ m.
• the maximum thickness of such layers is usually 120 ⁇ m.
• the surface of the epitaxial layer facing the ion beam has a deviation of less than 6°, more preferably 4°, more preferably less than 3°, even more preferably 0° from a perpendicular to the c-direction.
• the epitaxial layer is preferably made of SiC of polytype 4H, 6H or 3C.
• the doping of the first layer provides p- or n-doping with a doping concentration or defect concentration in the first layer of 1E15 cm -3 to 5E17 cm -3 .
• This doping concentration or defect concentration is very good for the Drift zone (active layer, power-absorbing layer) suitable for a variety of high-performance components.
• the doping can be constant over the thickness of the first layer or have a doping profile that deviates therefrom.
• the first layer is preferably doped with ions from one of the following elements: N, P, B or Al.
• the primary energy range of the ion beam when doping the first layer is preferably between 1 MeV and 50 MeV.
• the doping of the first layer provides a constant dopant depth profile and/or defect depth profile, or a substantially constant dopant depth profile and/or defect depth profile.
• This is to be understood as meaning profiles with a deviation from a perfectly flat dopant depth profile and/or defect depth profile of less than 20% and preferably less than 10%.
• the plateau is followed by a falling edge, i.e. in the area of the doping depth, the drop in the profile is not vertical or abrupt.
• the doping of the first layer provides a stepwise falling dopant depth profile and/or defect depth profile, the steps in a near-surface area of the first layer facing the ion beam of up to 40%, preferably up to 30%, of the total depth of the first layer are formed.
• a concentration difference between the highest and the lowest level is preferably at least a factor of 10, preferably at least a factor of 100, more preferably at least a factor of 500, particularly preferably at least a factor of 1000.
• the doping of the first layer provides a continuously decreasing dopant depth profile and/or defect depth profile.
• the continuously decreasing dopant depth profile and/or defect depth profile is a profile according to the following formula: whereby
• Dmax is the maximum doping concentration
• a is a value between 10 and 10,000
• z is the distance from the surface
• b is the layer thickness
• f is a tolerance factor between 0.95 and 1.05
• Do is the background doping
• the further step is preferred to produce a contact layer in a superficial area of the first layer or to apply a contact layer to the surface of the first layer, the bond connection between donor substrate and acceptor substrate being produced via the contact layer, and the following sequence resulting: Acceptor substrate, contact layer, remaining part of first layer or first layer, remaining part of donor substrate. This ensures a particularly good, low-impedance connection between the donor substrate and the acceptor substrate.
• the contact layer is preferably produced by ion implantation.
• a dopant concentration in the contact layer is preferably at least 100 times, preferably at least 1,000 times, more preferably at least 10,000 times, even more preferably at least 100,000 times above an average dopant concentration in the rest of the first layer or in the first layer. This achieves a bond connection with the lowest possible resistance and penetration of the field to the interface in the semiconductor component is avoided.
• a dopant concentration in the contact layer is more than 1 E17 cm' 3 , more preferably more than 1 E19 cm' 3 .
• the predetermined breaking point is preferably in the area of the first layer, particularly preferably in an end area of the first layer close to the predetermined doping depth, with the edge area particularly preferably not being thicker than 1 ⁇ m. In this way, as little doped material as possible remains on the donor substrate after splitting off.
• the predetermined breaking point is in the region of the remaining part of the donor substrate, and after step e) the further step is also carried out of carrying out an ion implantation into the composite substrate from the side facing away from the acceptor substrate.
• This has the advantage that an active zone can be formed with a greater overall thickness. Due to the superimposition of two different implantations that is made possible in this way, different preferred doping profiles can also be generated.
• the ion implantation into the composite substrate provides a dopant depth profile and/or defect depth profile in an additional doped layer that reaches at least as far as the doped layer.
• the ion implantation into the composite substrate is preferably carried out in such a way that the combination of both dopant depth profiles and/or defect depth profiles of the doped layer and the supplementary doped layer is a constant profile, a profile which increases stepwise towards the acceptor substrate or a profile which increases continuously towards the acceptor substrate.
• Flanks falling at an angle in the transition region of the two dopant depth profiles and/or defect depth profiles of the doped layer and the supplementary doped layer can overlap.
• the predetermined breaking point is preferably produced by ion implantation of gap-triggering ions.
• the gap-triggering ions are preferably introduced over the entire width of the donor substrate in order to produce a separating surface that is as uniform as possible.
• the fission-initiating ions can be introduced over only part of the width of the donor substrate. This reduces the effort involved in ion implantation.
• the gap-triggering ions are preferably introduced only in an edge region of the donor substrate.
• the fission-initiating ions are selected from the following: H, H 2 , He, B.
• the ions that initiate the gap are high-energy ions with an energy between 0.5 and 10 MeV, preferably between 0.5 and 5 MeV, more preferably between 0.5 and 2 MeV.
• a particle dose of the fission-initiating ions is preferably between 1 E15 cm' 2 and 5E17 cm' 2 in each case. With this dose, a safe cleavage is achieved.
• the energy sharpness (AE/E) of the ion beam of the fission-initiating ions is preferably less than 10' 2 , more preferably less than 10' 4 . In this way it is ensured that the predetermined breaking point has a minimum thickness and the energy loss peak of the ions at the predetermined breaking point is as sharp as possible.
• the splitting of the donor substrate is preferably triggered by a temperature treatment of the composite substrate at a temperature of between 600°C and 1300°C, preferably between 750°C and 1200°C, more preferably between 850°C and 1050°C.
• a temperature treatment of the composite substrate at a temperature of between 600°C and 1300°C, preferably between 750°C and 1200°C, more preferably between 850°C and 1050°C.
• mechanical methods are also conceivable.
• the bonding connection is produced by thermal treatment of the composite substrate at a temperature of between 800° C. and 1,600° C., preferably between 900° C. and 1,300° C.
• both the production of the bonded connection and the splitting of the donor substrate are carried out by means of a heat treatment, with both steps being carried out simultaneously.
• a pretreatment of at least one, preferably both surfaces to be bonded preferably takes place before the step of producing the bond connection, in particular a wet-chemical treatment, plasma treatment or ion beam treatment.
• the acceptor substrate is preferably thermally stable up to at least 1,500° C. and has a coefficient of linear expansion which deviates from the coefficient of linear expansion of SiC by at most 20%, preferably by at most 10%. This effectively prevents the composite substrate from bending.
• the acceptor substrate is made of polycrystalline SiC or graphite.
• the surface of the composite substrate is preferably post-treated in the area of the predetermined breaking point, in particular by means of polishing and/or the removal of defects (close to the surface).
• implantation defects in the pretreated composite substrate are healed at temperatures between 1,500°C and 1,750°C. This can happen during the production of the pretreated composite substrate or only later during further processing into an electrical component.
• the pretreated composite substrate according to the invention which serves as the basis for further processing into electronic components, has an acceptor substrate and a doped layer of monocrystalline SiC connected thereto.
• the doped layer preferably has implantation defects.
• the doped layer has a thickness of 3 pm to 25 pm, more preferably 3 pm to 15 pm.
• the doped layer of SiC is polytype 4H, 6H or 3C.
• a surface of the doped layer preferably has a deviation of less than 6°, preferably less than 3°, more preferably 0° from a perpendicular to the c-direction.
• the doped layer has p- or n-doping with a doping concentration of 1E15 cm' 3 to 5E17 cm' 3 .
• the doped layer is preferably doped with ions of one of the following elements: N, P, B or Al.
• the doped layer preferably has a substantially constant dopant depth profile and/or defect depth profile.
• the doped layer preferably has a dopant depth profile and/or defect depth profile that increases in steps in the direction of the acceptor substrate, with the steps being formed in a region of the doped layer facing the acceptor substrate of up to 40%, preferably up to 30%, of the total depth of the doped layer .
• a concentration difference between the highest and the lowest level is at least a factor of 10, preferably at least a factor of 100, more preferably at least a factor of 500, particularly preferably at least a factor of 1000.
• the depth of the flank regions of the steps is greater than the depth of the step plateaus.
• the doped layer preferably provides a dopant depth profile and/or defect depth profile that rises continuously in the direction of the acceptor substrate.
• the continuously increasing dopant depth profile and/or defect depth profile is preferably a profile according to the following formula: whereby
• Dmax is the maximum doping concentration
• a is a value between 10 and 10,000
• z is the distance to the surface
• b is the layer thickness
• f is a tolerance factor between 0.95 and 1.05
• Vbr is the breakdown voltage, and where is.
• the step profile mentioned or the continuously increasing profile takes two aspects into account. On the one hand, an optimal compromise between the on-resistance and the given electric strength is achieved by this dopant progression. On the other hand, the doping profile near the acceptor substrate has such a high concentration that field penetration to the interface is impossible.
• a supplementary doped layer made of monocrystalline SiC is provided in addition to the doped layer, with an overlapping region of the respective dopant depth profiles and/or defect depth profiles being present in a transition section between the doped layer and the supplementary doped layer.
• the two dopant depth profiles and/or defect depth profiles have sloping flanks that overlap.
• the combination of both dopant depth profiles and/or defect depth profiles of the doped layer and the supplementary doped layer can be a constant profile, a profile that rises in steps towards the acceptor substrate, or a profile that rises continuously towards the acceptor substrate.
• the doped layer and the supplementary doped layer are preferably doped with the same type of ion.
• the combined thickness of the doped layer and the supplemental doped layer is up to 40 ⁇ m. It is preferred that the acceptor substrate is thermally stable up to at least 1,500° C. and has a linear expansion coefficient that deviates from the linear expansion coefficient of SiC by at most 20%, preferably at most 10%.
• the acceptor substrate is formed from polycrystalline SiC or graphite.
• FIG. 1 is a schematic cross-sectional view of a first embodiment of donor substrate that can be used in the method of the present invention.
• FIG. 2 is a schematic cross-sectional view of a second embodiment of the donor substrate that can be used in the method of the present invention.
• Figure 3 is a schematic view of an energy filter irradiation arrangement for irradiating the donor substrate.
• FIG. 4 is a schematic representation of the operation of an energy filter that can be used in the method of the invention.
• FIG. 5 is a schematic representation of different doping profiles that can be generated using differently structured energy filters.
• FIG. 6 schematically shows the course of the doping of the first layer of the donor substrate and a resulting doping profile of the donor substrate.
• FIG. 8 schematically shows the production or application of a contact layer in the donor substrate.
• 9 schematically shows a first variant of the production of a predetermined breaking point in the donor substrate.
• FIG. 10 schematically shows a second variant of the production of a predetermined breaking point in the donor substrate.
• FIG. 11 schematically shows the production of a bonded connection between the donor substrate and the acceptor substrate.
• Figure 12 shows schematically the cleavage of the remaining portion of the donor substrate from the composite substrate.
• FIG. 13 schematically shows the post-treatment of the surface of the composite substrate in the area of the cleavage site.
• FIG 14 shows schematically a cross section through an embodiment of the pretreated composite substrate according to the invention.
• Figure 16 is a schematic representation of the splitting of a wafer ingot functioning as a donor substrate when used for multiple generation of a composite substrate from a donor substrate.
• FIG. 17 schematically shows the process of doping the first layer of the donor substrate using masking of areas of the donor substrate and an alternative doping profile of the donor substrate resulting therefrom.
• the method according to the invention for the production of a pretreated composite substrate begins with the provision of a donor substrate 12 which comprises or consists entirely of monocrystalline silicon carbide (SiC), see FIGS. 1 and 2.
• a donor substrate 12 which comprises or consists entirely of monocrystalline silicon carbide (SiC), see FIGS. 1 and 2.
• the embodiment of the donor substrate 12 illustrated in Figure 1 is a wafer of high quality, high purity semi-insulating SiC (HQSSiC) material.
• HQSSiC high quality semi-insulating SiC
• predominantly means that the criterion applies almost everywhere in the course of the depth profile, but that there can be deviations in certain areas, eg on the surface.
• the donor substrate 12 according to FIG. 1 preferably has a thickness of more than 100 ⁇ m, preferably more than 200 ⁇ m, more preferably more than 300 ⁇ m up to 15 cm, preferably up to 10 cm.
• it can be in the form of an undoped or weakly n-doped wafer rod, see FIG. 16.
• the donor substrate is polytype 4H, 6H or 3C SiC. These polytypes have turned out to be advantageous for the characteristics of the semiconductor components to be produced with them.
• the top surface of the donor substrate 12 has a 0° deviation from normal to the c-direction.
• deviations of up to 3° or up to 6° from a perpendicular to the c-direction are also possible.
• the embodiment of the donor substrate 12 shown in FIG. 2 is a wafer with a carrier wafer 14, preferably made of SiC, and an epitaxial layer 16 made of SiC, the epitaxial layer 16 being undoped or having a doping of less than 1 E15 cm-3, preferably less than 1 E14 cm-3.
• the epitaxial layer is preferably made of SiC of polytype 4H, 6H or 3C.
• the epitaxial layer 16 has a thickness of more than 10 ⁇ m, preferably more than 50 ⁇ m, more preferably more than 80 ⁇ m.
• the maximum thickness of such epitaxial layers 16 is generally 120 ⁇ m. It is preferred here if the upper surface of the epitaxial layer 16 has a deviation of less than 6°, more preferably less than 3°, even more preferably 0° from a perpendicular to the c-direction.
• a first layer 21 is doped in the donor substrate 12 (see FIG. 6), which later takes over or partly takes over the function of the drift zone (also called active zone or stress-absorbing zone) in the finished component.
• This doping of the first layer 21 in the donor substrate 12 takes place by means of ion implantation using an energy filter 20.
• the corresponding basic structure is shown in FIG.
• FIG 3 shows an irradiation chamber 8 in which a high vacuum is usually present.
• the donor substrate 12 to be doped is accommodated in a substrate holder 30 in the irradiation chamber 8 .
• An ion beam 10 is generated by a particle accelerator (not shown) and guided into the irradiation chamber 8 . There the energy of the ion beam 10 is spread out by an energy filter 20 and it hits the donor substrate 12 to be irradiated.
• the energy filter 20 can be arranged in a separate vacuum chamber that can be closed with valves within the irradiation chamber 8 or directly adjacent to the irradiation chamber 8.
• the substrate holder 30 does not have to be stationary, but can optionally be provided with a device for translating the donor substrate 12 in x-y (in the plane perpendicular to the plane of the sheet).
• a wafer wheel, on which the donor substrates 12 to be implanted are fixed and which rotates during the implantation, also comes into consideration as the substrate holder 30 .
• a displacement of the substrate holder 30 in the beam direction (z-direction) can also be possible.
• the substrate holder 30 can optionally be provided with heating or cooling.
• the basic principle of the energy filter 20 is shown in FIG.
• the energy of the monoenergetic ion beam 10 is modified as a function of the point of entry as it passes through the energy filter 20, which is designed as a microstructured membrane.
• the resulting energy distribution of the ions of the ion beam 10 leads to a modification of the depth profile of the implanted substance in the matrix of the donor substrate 12.
• E1 designates the energy of a first ion
• E2 designates the energy of a second ion
• c designates the doping concentration
• d designates the depth in the donor substrate 12.
• the usual Gaussian distribution is identified by the reference character A, which arises without using an energy filter 20 .
• a rectangular distribution that can be achieved when using an energy filter 20 is sketched by way of example with reference symbol B.
• the layouts or three-dimensional structures of energy filters 20 shown in Fig. 5 show the basic possibilities of generating a large number of dopant depth profiles or defect depth profiles using energy filters 20, c in turn designates the doping concentration and d in turn designates the depth in the donor substrate 12.
• the filter structure profiles can Principle are combined with each other to obtain new filter structure profiles and thus new dopant depth profiles or defect depth profiles.
• Such energy filters 20 are typically made of silicon. They have a thickness of between 3 ⁇ m and 200 ⁇ m, preferably between 5 ⁇ m and 50 ⁇ m and particularly preferably between 7 ⁇ m and 20 ⁇ m. They can be held in a filter frame (not shown). The filter frame can be interchangeably accommodated in a filter holder (not shown).
• implantation with ions of nitrogen or phosphorus is particularly suitable, while implantation with ions of boron or aluminum is particularly suitable for a p-doped layer.
• the ion implantation into the donor substrate 12 takes place from a front side of the donor substrate 12.
• the short, black-filled arrow indicates the ions of minimum energy transmitted through the energy filter 20, and the long arrow filled with black indicates the ions of maximum energy transmitted through the energy filter 20 .
• the resulting doping profile along section AA' is shown on the right in the coordinate system, c stands for the doping concentration.
• the doping profile is based on the configuration of the donor substrate 12 according to FIG. 1 and is approximately uniform over the entire first layer 21 .
• the first layer 21 extends from the surface of the donor substrate 12 facing the ion beam 10 to a predetermined doping depth T. where a remaining portion 22 of the donor substrate 12 joins which is not affected by the ion implantation by means of the energy filter.
• the thickness of the first layer 21 preferably essentially corresponds to a previously determined thickness of the active layer in the later component or a combination of active layer plus a field stop layer or a combination of active layer plus a field stop layer and a superficial functional zone.
• the overall thickness of the first layer 21 is thus determined by the type and, above all, by the voltage class of the semiconductor component to be produced. The higher the voltage class, the thicker the first layer 21 . For particularly high voltage classes, reference is made to FIG. 15 and the associated description.
• the thickness of the first layer 21 is preferably between 3 and 15 ⁇ m. This corresponds to the doping depth T of the preferred types of ions mentioned above in SiC that is currently reasonably possible.
• the doping of the first layer 21 provides a p- or n-doping with a doping concentration or defect concentration in the first layer 21 of 1E15 cm' 3 to 5E17 cm' 3 .
• FIG. 8 shows the result of the optional step of producing a contact layer 24 in a superficial area of the first layer 21 or applying a contact layer 24 to the surface of the first layer 21 .
• the contact layer 24 is preferably produced in the first layer 24 by means of ion implantation.
• the contact layer 24 has a thickness of only 10 nm up to 1 ⁇ m.
• P, N or Al ions are preferably used for the implantation (without an energy filter).
• the dopant concentration in the contact layer 24 is preferably at least 100 times, more preferably at least 1,000 times, more preferably at least 10,000 times, still more preferably at least 100,000 times above an average dopant concentration in the remainder of the first layer 21 or in the first layer 21.
• the dopant concentration in the contact layer 24 is preferably more than 1 E17 cm 3 , more preferably more than 1 E19 cm 3 .
• a thin contact layer 24 e.g. a few nanometers thick, to the first layer 21. This is done, for example, by means of sputter deposition, vapor deposition or a CVD deposition process.
• the contact layer 24 does not have to be completely covering, it can also consist of nanoparticles.
• a further treatment of the surface e.g. physical etching back, can take place.
• a predetermined breaking point 26 is produced in the donor substrate 24.
• the predetermined breaking point 26 is in the region of the first layer 21, preferably in an end region of the first layer 21 close to the predetermined doping depth T, with the predetermined breaking point 26 preferably no further than 1 ⁇ m, more preferably no further than 500 nm. particularly preferably no further than 100 nm from the doping depth T and thus from the end of the first layer 21 .
• the predetermined breaking point 26 should still be in the area of the plateau.
• the predetermined breaking point 26 is preferably produced by ion implantation of gap-triggering ions, which are shown schematically in FIG. 9 as black dots. No energy filter is used here. According to FIG. 9, the gap-triggering ions are introduced over the entire width of the donor substrate 12.
• FIG. 9 The fission-initiating ions are preferably selected from the following: H, H 2 , He, B.
• the fission-initiating ions are high energy ions with an energy between 0.5 and 10 MeV, preferably between 0.5 and 5 MeV, more preferably between 0, 5 and 2 MeV.
• the predetermined breaking point 26 is formed at a depth of approximately 5 ⁇ m, with an ion energy of 1.0 MeV at a depth of approximately 10 ⁇ m, and with an ion energy of 1.5 MeV at a depth of about 20 pm.
• a particle dose of the fission-initiating ions is preferably between 1 E15 cm' 2 and 5E17 cm' 2 .
• the energy sharpness (AE/E) of the ion beam of the fission-initiating ions is preferably less than 10' 2 , more preferably less than 10' 4 .
• the temperature in the donor substrate 12 remains below 300°C, preferably below 200°C.
• the chuck on which the donor substrate 12 lies is optionally cooled.
• a doping profile is generated which has a sharp peak (see the Gaussian distribution marked A in FIG. 4). In this way it is ensured that the predetermined breaking point 26 has a high level of doping distributed over an extremely small thickness.
• the variation in the range of the ions in the donor substrate 12 is only between 100 nm and 500 nm, preferably between 200 nm and 400 nm, depending on the primary energy of the ion beam.
• the gap-triggering ions are introduced only over part of the width of the donor substrate 12, preferably only in one or in both edge areas of the donor substrate 12. In this way, the Predetermined breaking point 26 sections predefined.
• the predetermined breaking point 26 can also be formed by means of electron beams or laser beams.
• the donor substrate 12 is connected to the acceptor substrate 28 with the side of the first layer 21 first by means of a bond connection, as is sketched in FIG. 11 .
• the first layer 21 is thus arranged in an area between the acceptor substrate 28 and the remaining part 22 of the donor substrate 12 . It is irrelevant whether the donor substrate 12 is moved to the acceptor substrate 28 to create the bond connection, as shown in FIG.
• the intermediate result of the bonding process is shown in FIG. 11 at the bottom left.
• the sequence of layers could also be turned upside down, for example if the acceptor substrate 28 was moved to the donor substrate 12 .
• a whole range of materials can be used for the acceptor substrate 28 .
• the acceptor substrate 28 is preferably temperature-stable up to at least 1,500° C. and has a linear expansion coefficient that deviates from the linear expansion coefficient of SiC by at most 20%, ideally by at most 10%.
• Suitable examples for the material of the acceptor substrate 28 are polycrystalline SiC or graphite.
• the contact layer 24 was not shown in each of FIGS. 10 and 11, but is preferably present. In this case, the bonding connection between donor substrate 12 and acceptor substrate 28 is established via contact layer 24, resulting in the following sequence: acceptor substrate 28, contact layer 24, remaining part of first layer 21 or first layer 21, remaining part 22 of donor substrate 12.
• a low-impedance bond connection is preferably produced by thermal treatment of the substrate obtained as an intermediate result at a temperature of between 800° C. and 1,600° C., more preferably between 900° C. and 1,300° C.
• At least one, preferably both, surfaces to be bonded can be pretreated, in particular a wet-chemical treatment, plasma treatment or ion beam treatment.
• the contact layer 24 can also be a treated surface. It is also conceivable to apply a thin layer a few nanometers thick to produce a subsequent low-impedance connection between the acceptor substrate 28 and the donor substrate 12 . In principle, an extremely low-impedance contact and a high-temperature-resistant connection between the acceptor substrate 28 and the donor substrate 12 are important.
• Fig. 12 the step of splitting the donor substrate 12 in the area of the predetermined breaking point 26 is shown schematically, whereby a pretreated composite substrate 18 is produced, which comprises the acceptor substrate 28 and a doped layer 32 connected thereto, the doped layer 32 comprising at least a section of the first layer 21 of the donor substrate 12 comprises.
• the part 34 of the donor substrate 12 that has been split off from the acceptor substrate 28 is removed.
• Cleavage of the donor substrate 12 is preferably accomplished by annealing the composite substrate 18 at a temperature of between 600°C and 1300°C between 750°C and 1200°C, more preferably between 850°C and 1050°C.
• gas bubbles are formed due to the implanted ions, which coalesce and lead to splitting off.
• external forces may be applied to the composite substrate 18 such that the donor substrate 12 fractures along the line of weakness 26 .
• a combination of heat treatment and external forces may also be necessary or helpful. In particular, if ions were only introduced into the donor substrate 12 in sections, the exertion of external forces is unavoidable.
• both the production of the bonding connection and the splitting of the donor substrate 12 take place by means of a temperature treatment, both steps can possibly be carried out simultaneously.
• the surface of the composite substrate 18 can be post-treated in the area of the predetermined breaking point 26, in particular by means of polishing and/or removal of defects.
• implantation defects 42 which are shown schematically in FIG. 14, can be annealed in the doped layer 32 of the pretreated composite substrate 18 at temperatures of preferably between 1500.degree. C. and 1750.degree. This is preferably done during later component processing during annealing steps to anneal low-energy implantations, e.g. source-drain contact implantation, channel implantation, p-JFET implantation, etc.
• the step of healing the implantation defects 42 is already carried out when the part 34 of the donor substrate 12 is split off and/or when the bonded connection is formed between the donor substrate 12 and the acceptor substrate 28, if correspondingly high temperatures are used and in this way the radiation defects can be healed.
• Figs. 8 to 13 the method steps have so far been shown and described with a donor substrate 12 according to Fig. 1, but they are analogous to donor substrates 12 according to Fig. 2 feasible. It is then important that the epitaxial layer 16 of the donor substrate 12 is connected to the acceptor substrate 28 .
• the step of producing the bonding connection between the donor substrate 12 and the acceptor substrate 28 can also take place in two stages.
• a bonding process with low bonding energy can take place at low temperature and then, in a subsequent second partial step, solidification to produce a bond connection with high bond strength or bonding energy at higher temperature and low contact resistance.
• the solidification can, for example, also take place during or after the splitting off, during or after the surface treatment of the composite substrate or during or after the healing of implantation defects.
• the pretreated composite substrate 18 produced in this way which serves as the basis for further processing to form electronic semiconductor components, is shown again in FIG. It comprises the acceptor substrate 28 and the doped layer 32 of monocrystalline SiC connected thereto, the doped layer 32 preferably having the implantation defects 42 (radiation defects). In addition, it can have the contact layer 24 between the acceptor substrate 28 and the doped layer 32 .
• the doped layer 32 preferably has a thickness of 3 ⁇ m to 30 ⁇ m, more preferably 3 ⁇ m to 15 ⁇ m. It is preferably made of SiC of polytype 4H, 6H or 3C. A surface of the doped layer 32 preferably has a deviation of less than 6°, preferably 0°, from a perpendicular to the c-direction.
• the doped layer 32 preferably has p- or n-doping with a doping concentration or defect concentration of 1E15 cm -3 to 5E17 cm -3 .
• the doped layer 32 has preferably been doped with ions of one of the following elements as a dopant: N, P, B or Al.
• the dopant depth profile and/or defect depth profile of the doped layer 32 preferably results essentially from a reversal of the dopant depth profile and/or defect depth profile of the first layer 21 in the donor substrate 12.
• the doped layer 32 can thus have a substantially constant dopant depth profile and/or defect depth profile, for example.
• the doped layer 32 can have a dopant depth profile and/or defect depth profile that increases in steps in the direction of the acceptor substrate 28, the steps in a region of the doped layer 32 facing the acceptor substrate 28 being up to 40%, preferably up to 30%, of the total depth of the doped layer 32 are formed.
• the doped layer 32 can also provide a dopant depth profile and/or defect depth profile which increases continuously in the direction of the acceptor substrate 28 .
• the implantation defect profile essentially follows the implanted impurity concentration depth profile.
• the acceptor substrate 28 is thermally stable up to at least 1,500° C. and has a linear expansion coefficient that deviates from the linear expansion coefficient of SiC by at most 20%, preferably at most 10%.
• the acceptor substrate 28 is particularly preferably formed from polycrystalline SiC or graphite.
• FIG. 15 shows an alternative configuration of the pretreated composite substrate 18 according to the invention in cross section, and underneath it a dopant concentration profile along the section of the composite substrate 18 according to arrow F. This is particularly suitable for the production of very high blocking components, e.g. > 1,200 V.
• the pretreated composite substrate 18 has, in addition to the doped layer 32, a supplementary doped layer 38 of monocrystalline SiC.
• a transition section between the doped layer 32 and the supplementary doped layer 38 there is preferably an overlapping region 40 of the respective dopant depth profiles and/or defect depth profiles.
• the required active layer (drift zone, stress-absorbing layer) of the later semiconductor component is formed solely by the doped layer 32 and thus simultaneously by the first layer 21 or a (preferably large) part of the first layer 21 in the donor substrate 12 formed.
• the active layer is formed by a combination of doped layer 32 and the supplementary doped layer 38 in embodiments as in FIG. 15 results in a substantially constant total doping profile by superimposing the two partial profiles, any other doping profiles can also be formed by lining up and partially overlapping the doping profiles in doped layer 32 and supplementary doped layer 38 .
• the combined overall doping profile from the combination of both dopant depth profiles and/or defect depth profiles of the doped layer 32 and the supplementary doped layer 38 can also be a profile that rises in stages towards the acceptor substrate 28 or a profile that rises continuously towards the acceptor substrate 28 .
• Such combined profiles are obtained in that the predetermined breaking point 26 in the donor substrate 12 is not produced within the first layer 21 but in the remaining part 22 of the donor substrate 12 that was not doped into the donor substrate 12 by means of ion implantation.
• the doping of the supplementary doped layer 38 can then be carried out from the side facing away from the acceptor substrate 28 by means of a further ion implantation using an energy filter.
• the statements made above with regard to FIGS. 3 to 7 regarding ion implantation by means of an energy filter apply identically to ion implantation into the supplementary doped layer 38 .
• the thickness of the supplementary doped layer 38 is typically between 3 and 15 ⁇ m. In this way, total thicknesses of the active zone doped by ion implantation of up to 30 ⁇ m are obtained.
• the method according to the invention can be used to produce two or more composite substrates 18, even a large number of composite substrates 18, from one donor substrate 12, provided that the donor substrate 12 from FIG. 1 or the epitaxial layer 16 of the donor substrate 12 from FIG is as thick as the thickness of the required doped layer 32 in the composite substrate 18.
• the donor substrate 12 is a thick wafer rod, the effect is particularly great. In this way, considerable costs can be saved during manufacture. This is shown schematically in FIG.
• a mask 46 may be used to create one or more undoped regions 44 in the first layer 21 of the donor substrate 12 (and/or in the supplementary doped layer 38 of the composite substrate 18).
• the composite substrate 18 can also be characterized by further intermediate steps on the way to the finished semiconductor component, for example by implanting further active regions, producing oxides, depositing gate electrodes, contacts, lines or vias, etc.
• a "connection" between two elements can also be direct or indirect.

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