EP3642723A4 - Système ou sous-système de mémoire non volatile - Google Patents

Système ou sous-système de mémoire non volatile Download PDF

Info

Publication number
EP3642723A4
EP3642723A4 EP18821215.3A EP18821215A EP3642723A4 EP 3642723 A4 EP3642723 A4 EP 3642723A4 EP 18821215 A EP18821215 A EP 18821215A EP 3642723 A4 EP3642723 A4 EP 3642723A4
Authority
EP
European Patent Office
Prior art keywords
sub
volatile memory
memory system
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP18821215.3A
Other languages
German (de)
English (en)
Other versions
EP3642723A1 (fr
Inventor
Robert Nasry Hasbun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP3642723A1 publication Critical patent/EP3642723A1/fr
Publication of EP3642723A4 publication Critical patent/EP3642723A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G06F1/3225—Monitoring of peripheral devices of memory devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3268—Power saving in hard disk drive
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0871—Allocation or management of cache space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0882—Page mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1684—Details of memory controller using multiple buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21—Employing a record carrier using a specific recording technology
    • G06F2212/214—Solid state disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Dram (AREA)
EP18821215.3A 2017-06-22 2018-06-14 Système ou sous-système de mémoire non volatile Withdrawn EP3642723A4 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/630,330 US10845866B2 (en) 2017-06-22 2017-06-22 Non-volatile memory system or sub-system
PCT/US2018/037480 WO2018236663A1 (fr) 2017-06-22 2018-06-14 Système ou sous-système de mémoire non volatile

Publications (2)

Publication Number Publication Date
EP3642723A1 EP3642723A1 (fr) 2020-04-29
EP3642723A4 true EP3642723A4 (fr) 2021-03-24

Family

ID=64693163

Family Applications (1)

Application Number Title Priority Date Filing Date
EP18821215.3A Withdrawn EP3642723A4 (fr) 2017-06-22 2018-06-14 Système ou sous-système de mémoire non volatile

Country Status (7)

Country Link
US (3) US10845866B2 (fr)
EP (1) EP3642723A4 (fr)
JP (2) JP2020524849A (fr)
KR (1) KR102324703B1 (fr)
CN (1) CN110799954B (fr)
TW (2) TWI693603B (fr)
WO (1) WO2018236663A1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10394456B2 (en) * 2017-08-23 2019-08-27 Micron Technology, Inc. On demand memory page size
US10691345B2 (en) * 2017-09-29 2020-06-23 Intel Corporation Systems, methods and apparatus for memory access and scheduling
US10942854B2 (en) 2018-05-09 2021-03-09 Micron Technology, Inc. Prefetch management for memory
US11010092B2 (en) 2018-05-09 2021-05-18 Micron Technology, Inc. Prefetch signaling in memory system or sub-system
US10714159B2 (en) 2018-05-09 2020-07-14 Micron Technology, Inc. Indication in memory system or sub-system of latency associated with performing an access command
US10754578B2 (en) * 2018-05-09 2020-08-25 Micron Technology, Inc. Memory buffer management and bypass
KR102519572B1 (ko) * 2018-05-11 2023-04-07 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
KR20200126666A (ko) 2019-04-30 2020-11-09 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
US11139010B2 (en) * 2018-12-11 2021-10-05 SK Hynix Inc. Memory system and operating method of the memory system
KR20200126678A (ko) 2019-04-30 2020-11-09 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
US11404097B2 (en) 2018-12-11 2022-08-02 SK Hynix Inc. Memory system and operating method of the memory system
KR20200137548A (ko) 2019-05-30 2020-12-09 에스케이하이닉스 주식회사 메모리 장치 및 이의 테스트 동작 방법
KR20200124045A (ko) 2019-04-23 2020-11-02 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
CN110291631A (zh) 2019-05-17 2019-09-27 长江存储科技有限责任公司 具有静态随机存取存储器的三维存储器件
KR20240064052A (ko) * 2019-05-17 2024-05-10 양쯔 메모리 테크놀로지스 씨오., 엘티디. 정적 랜덤 액세스 메모리를 사용하는 3차원 메모리 디바이스의 캐시 프로그램 작동
US11908505B2 (en) 2020-01-24 2024-02-20 Taiwan Semiconductor Manufacturing Company, Ltd. Ferroelectric FET-based content addressable memory
US11232838B2 (en) 2020-01-24 2022-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Ferroelectric FET-based content addressable memory
TWI763266B (zh) * 2020-01-24 2022-05-01 台灣積體電路製造股份有限公司 記憶體裝置、資料處理裝置及資料處理方法
US11586557B2 (en) * 2020-08-26 2023-02-21 Micron Technology, Inc. Dynamic allocation of buffers for eviction procedures
US20220197537A1 (en) * 2020-12-18 2022-06-23 Micron Technology, Inc. Object management in tiered memory systems
US20230305971A1 (en) * 2022-02-09 2023-09-28 Qualcomm Incorporated Memory system with adaptive refresh

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8868829B2 (en) * 2006-07-31 2014-10-21 Google Inc. Memory circuit system and method
US20150347307A1 (en) * 2014-06-02 2015-12-03 Micron Technology, Inc. Cache architecture

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04195563A (ja) * 1990-11-28 1992-07-15 Mitsubishi Electric Corp メモリシステムの制御装置
JP3132677B2 (ja) * 1991-07-23 2001-02-05 キヤノン株式会社 情報記録再生方法
JPH08137753A (ja) * 1994-11-07 1996-05-31 Fuji Xerox Co Ltd ディスクキャッシュ装置
JPH11203200A (ja) * 1998-01-12 1999-07-30 Sony Corp 並列プロセッサおよびメモリ制御方法
US20020041658A1 (en) * 1998-06-04 2002-04-11 Alva Henderson Variable word length data memory
US7953931B2 (en) 1999-08-04 2011-05-31 Super Talent Electronics, Inc. High endurance non-volatile memory devices
US6775184B1 (en) 2003-01-21 2004-08-10 Nexflash Technologies, Inc. Nonvolatile memory integrated circuit having volatile utility and buffer memories, and method of operation thereof
US7752380B2 (en) * 2003-07-31 2010-07-06 Sandisk Il Ltd SDRAM memory device with an embedded NAND flash controller
KR100606242B1 (ko) * 2004-01-30 2006-07-31 삼성전자주식회사 불휘발성 메모리와 호스트간에 버퍼링 동작을 수행하는멀티 포트 휘발성 메모리 장치, 이를 이용한 멀티-칩패키지 반도체 장치 및 이를 이용한 데이터 처리장치
US7716411B2 (en) * 2006-06-07 2010-05-11 Microsoft Corporation Hybrid memory device with single interface
JP2008041080A (ja) * 2006-07-10 2008-02-21 Hitachi Ltd 記憶制御システム、記憶制御システムの制御方法、ポートセレクタ、及びコントローラ
US20080046630A1 (en) * 2006-08-21 2008-02-21 Sandisk Il Ltd. NAND flash memory controller exporting a logical sector-based interface
US20090172621A1 (en) * 2007-12-27 2009-07-02 Sanved Dessiggn Automation System and method for system-on-chip (soc) performance analysis
JP4909963B2 (ja) * 2008-09-09 2012-04-04 株式会社東芝 統合メモリ管理装置
JP5650116B2 (ja) * 2008-10-09 2015-01-07 マイクロン テクノロジー， インク． 仮想化ｅｃｃ−ｎａｎｄ
US8656110B2 (en) * 2009-08-21 2014-02-18 Panasonic Corporation Non-volatile storage device, access device, and non-volatile storage system for releasing a cache object in accordance with a data matching flag
KR20110046243A (ko) * 2009-10-27 2011-05-04 삼성전자주식회사 사용자 장치 및 그것의 맵핑 데이터 관리 방법
JP2011154547A (ja) * 2010-01-27 2011-08-11 Toshiba Corp メモリ管理装置及びメモリ管理方法
JP4806089B1 (ja) * 2010-06-30 2011-11-02 株式会社東芝 情報処理装置、ｒａｉｄコントローラカード、およびミラーリング方法
KR20120066198A (ko) * 2010-12-14 2012-06-22 삼성전자주식회사 휘발성 메모리를 포함하는 저장 장치의 데이터 저장 방법
US8635514B2 (en) * 2011-02-28 2014-01-21 Micron Technology, Inc. Error control in memory storage systems
KR101861170B1 (ko) * 2011-08-17 2018-05-25 삼성전자주식회사 마이그레이션 관리자를 포함하는 메모리 시스템
US8811110B2 (en) * 2012-06-28 2014-08-19 Intel Corporation Configuration for power reduction in DRAM
US9342259B2 (en) * 2012-09-10 2016-05-17 Texas Instruments Incorporated Nonvolatile logic array and power domain segmentation in processing device
US9268682B2 (en) * 2012-10-05 2016-02-23 Skyera, Llc Methods, devices and systems for physical-to-logical mapping in solid state drives
US9652376B2 (en) * 2013-01-28 2017-05-16 Radian Memory Systems, Inc. Cooperative flash memory control
US9524771B2 (en) * 2013-07-12 2016-12-20 Qualcomm Incorporated DRAM sub-array level autonomic refresh memory controller optimization
JP2015056171A (ja) * 2013-09-13 2015-03-23 株式会社東芝 メモリシステムおよび情報処理装置
KR102094393B1 (ko) * 2013-11-18 2020-03-27 삼성전자주식회사 불휘발성 메모리 시스템 및 그것의 동작 방법
US9600413B2 (en) * 2013-12-24 2017-03-21 Intel Corporation Common platform for one-level memory architecture and two-level memory architecture
JP6140311B2 (ja) * 2014-02-13 2017-05-31 株式会社日立製作所 データ管理装置及び方法
JP6680454B2 (ja) * 2014-03-17 2020-04-15 国立研究開発法人産業技術総合研究所 Ｌｓｉチップ積層システム
WO2015145724A1 (fr) * 2014-03-28 2015-10-01 株式会社日立製作所 Système de stockage
JP6637906B2 (ja) * 2014-05-08 2020-01-29 マイクロン テクノロジー，インク． ハイブリッドメモリキューブシステム相互接続ディレクトリベースキャッシュコヒーレンス方法
US9711194B2 (en) * 2015-01-28 2017-07-18 Xilinx, Inc. Circuits for and methods of controlling the operation of a hybrid memory system
US9823852B2 (en) 2015-05-01 2017-11-21 Toshiba Memory Corporation Memory system with nonvolatile memory
US9507711B1 (en) * 2015-05-22 2016-11-29 Sandisk Technologies Llc Hierarchical FTL mapping optimized for workload
US9858198B2 (en) * 2015-06-26 2018-01-02 Intel Corporation 64KB page system that supports 4KB page operations
JP6540391B2 (ja) * 2015-09-03 2019-07-10 富士通株式会社 ストレージ制御装置、ストレージ制御プログラム、及びストレージ制御方法
JP6209573B2 (ja) * 2015-10-02 2017-10-04 株式会社ソニー・インタラクティブエンタテインメント 情報処理装置および情報処理方法
US9666263B2 (en) * 2015-10-07 2017-05-30 Samsung Electronics Co., Ltd. DIMM SSD SoC DRAM byte lane skewing
TWI551991B (zh) * 2015-11-20 2016-10-01 群聯電子股份有限公司 記憶體管理方法與系統及其記憶體儲存裝置
KR102491651B1 (ko) 2015-12-14 2023-01-26 삼성전자주식회사 비휘발성 메모리 모듈, 그것을 포함하는 컴퓨팅 시스템, 및 그것의 동작 방법
US11210019B2 (en) * 2017-08-23 2021-12-28 Micron Technology, Inc. Memory with virtual page size

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8868829B2 (en) * 2006-07-31 2014-10-21 Google Inc. Memory circuit system and method
US20150347307A1 (en) * 2014-06-02 2015-12-03 Micron Technology, Inc. Cache architecture

Also Published As

Publication number Publication date
US11119561B2 (en) 2021-09-14
TW202040580A (zh) 2020-11-01
KR102324703B1 (ko) 2021-11-11
WO2018236663A1 (fr) 2018-12-27
EP3642723A1 (fr) 2020-04-29
CN110799954A (zh) 2020-02-14
US11550381B2 (en) 2023-01-10
KR20200008047A (ko) 2020-01-22
TWI737273B (zh) 2021-08-21
JP2020524849A (ja) 2020-08-20
US10845866B2 (en) 2020-11-24
TWI693603B (zh) 2020-05-11
US20220066534A1 (en) 2022-03-03
CN110799954B (zh) 2024-03-26
JP2022031959A (ja) 2022-02-22
TW201905926A (zh) 2019-02-01
US20180373313A1 (en) 2018-12-27
US20210041935A1 (en) 2021-02-11

Similar Documents

Publication Publication Date Title
EP3642723A4 (fr) Système ou sous-système de mémoire non volatile
EP3635782A4 (fr) Matrices mémoire
EP3635783A4 (fr) Matrices mémoires
EP3718110A4 (fr) Opérations sur des cellules de mémoire
EP3662379A4 (fr) Adressage de mémoire
EP3350809A4 (fr) Commande de mémoire à points de croisement
EP3830734A4 (fr) Programmation sécurisée de système de mémoire
EP3479535A4 (fr) Opérations de mémoire à distance
EP3516658A4 (fr) Techniques d'initialisation de dispositifs de mémoire résistifs
EP3676835A4 (fr) Circuits de mémoire
IL272795A (en) Persistent writes for non-volatile memory
EP3427265A4 (fr) Techniques d'accès parallèle à l'intérieur de sections de mémoire par indépendance de section
EP3673379A4 (fr) Taille de page de mémoire à la demande
EP3262514A4 (fr) Systèmes de mémoire sécurisés
EP3286631A4 (fr) Accès direct à une mémoire à distance
EP3538983A4 (fr) Opérations de mémoire sur des données
EP3602953A4 (fr) Agencements de mémoire sécurisés
EP3534265A4 (fr) Technique d'accès mémoire
EP3507808A4 (fr) Réseaux de mémoire
EP3520106A4 (fr) Gestion de mémoire
EP3265924A4 (fr) Accès direct à la mémoire à distance
EP3590045A4 (fr) Chiffrement de mémoire à obscurcissement amélioré
EP3553665A4 (fr) Procédé, dispositif et système d'accès à une mémoire non volatile
EP3265925A4 (fr) Accès direct à la mémoire à distance
EP3639148A4 (fr) Contrôleur de mémoire

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20191213

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
A4 Supplementary search report drawn up and despatched

Effective date: 20210218

RIC1 Information provided on ipc code assigned before grant

Ipc: G11C 7/10 20060101ALN20210212BHEP

Ipc: G06F 12/0871 20160101ALI20210212BHEP

Ipc: G06F 12/02 20060101AFI20210212BHEP

Ipc: G06F 12/0882 20160101ALI20210212BHEP

Ipc: G06F 13/16 20060101ALI20210212BHEP

Ipc: G11C 11/22 20060101ALN20210212BHEP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R079

Free format text: PREVIOUS MAIN CLASS: G06F0013160000

Ipc: G06F0012020000

RIC1 Information provided on ipc code assigned before grant

Ipc: G11C 11/22 20060101ALN20221121BHEP

Ipc: G11C 7/10 20060101ALN20221121BHEP

Ipc: G06F 13/16 20060101ALI20221121BHEP

Ipc: G06F 12/0882 20160101ALI20221121BHEP

Ipc: G06F 12/0871 20160101ALI20221121BHEP

Ipc: G06F 12/02 20060101AFI20221121BHEP

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20230111

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20230523