EP3268989A1 - Power semiconductor module with improved bonding connection structure - Google Patents

Power semiconductor module with improved bonding connection structure

Info

Publication number
EP3268989A1
EP3268989A1 EP16708666.9A EP16708666A EP3268989A1 EP 3268989 A1 EP3268989 A1 EP 3268989A1 EP 16708666 A EP16708666 A EP 16708666A EP 3268989 A1 EP3268989 A1 EP 3268989A1
Authority
EP
European Patent Office
Prior art keywords
power semiconductor
bond
bonding
connection
feet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP16708666.9A
Other languages
German (de)
French (fr)
Inventor
Reimund Pelmer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Bipolar GmbH and Co KG
Original Assignee
Infineon Technologies Bipolar GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Bipolar GmbH and Co KG filed Critical Infineon Technologies Bipolar GmbH and Co KG
Publication of EP3268989A1 publication Critical patent/EP3268989A1/en
Pending legal-status Critical Current

Links

Classifications

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Definitions

  • the present invention relates to a power semiconductor module.
  • Power semiconductor modules are semiconductor devices that are used in power electronics circuits. Power semiconductor modules are commonly used in automotive and industrial applications, such as in inverters and rectifiers.
  • the semiconductor components included in the power semiconductor modules are usually IGBT (Isolated Gate Bipolar Transistor) semiconductor chips or MOSFET (Metal Oxide Semiconductor Field Effect Transistor) semiconductor chips.
  • IGBT and MOSFET semiconductor chips have varying nominal voltages and powers.
  • Some power semiconductor modules also have additional semiconductor diodes (i.e., freewheeling diodes) in the semiconductor package for overvoltage protection.
  • a power semiconductor module usually has one or more power semiconductor components, also referred to below as power semiconductors, on a single substrate.
  • the substrate typically includes at least one insulating ceramic substrate, such as Al 2 O 3 , AlN, Si 3 N 4, or other suitable material to electrically isolate the power semiconductor module.
  • the substrate is usually applied to a metallic base plate serving as a substrate stabilizing support for mechanical attachment and thermal coupling of the module to a heat sink.
  • At least one top of the ceramic substrate is metal coated with either pure or plated Cu, Al, or other suitable material to contact the power semiconductor disposed thereon and soldered thereto on a regular basis, and to provide electrical potential areas, particularly load potential areas.
  • these potential surfaces serve to supply or remove electricity via so-called bond connections to the power semiconductor, on the other hand, mechanical fastening and electrical connection with connection parts, which supply or remove power to or from the module, in particular from its housing, for example to the latter outside the housing with external conductors to connect, for example by means of screwing.
  • the metal layer provided for the potential areas is usually bonded to the ceramic substrate by means of direct copper bonding (DCB), direct aluminum bonding (DAB) or active metal brazing (AMB) techniques.
  • bonding connections for electrical connection of the potential surfaces with the at least one terminal surface of the respective power semiconductor facing away from the substrate, there are regularly provided bonding connections in the form of bonding wires, also referred to as a wire bond connection, or bonding tapes also called a belt bond, which electrically conducts the conductive connection Establish contact between the potential surface and the pad of the semiconductor.
  • bonding wires also referred to as a wire bond connection
  • bonding tapes also called a belt bond
  • thermocompression bonding in short: TC bonding
  • TS bonding Thermosonic-Ball-Wedge- bonding
  • US bonding ultrasonic wedge -Wedge bonding
  • This solder connection of the second main area of the power semiconductor component forms part of the current supply or removal. Further current connections are made by means of wire bonds between the metallization of the first main area of the power semiconductor component providing the connection area and a load potential area. Characteristic of the known wire bond connections is that the bonding wires are arranged closely adjacent to each other, and that the bonding feet of the individual bonding wires, especially on the power semiconductor component, are arranged in a row or slightly offset. According to the prior art, power semiconductor components are contacted not only by means of individual juxtaposed bonding wires for power supply, but often with two or more in the direction of the bonding wires at least partially superposed bonding wires. The individual bonding wires frequently also contact the connection surface thereof by means of a plurality of bonding feet in order to improve the current distribution on the power semiconductor component.
  • Simulations show that in an arrangement of the bonding wires between a load terminal potential surface and a power semiconductor device according to the prior art, the current is fed inhomogeneously via the pad in the power semiconductor device and thus this is not burdened evenly in its entire surface for power management.
  • DE 10 2005 039 940 B4 discloses a wire bond connection in which the second bond feet of a plurality of bond connections are distributed over the entire connection surface in a checkerboard pattern and the bond connections form two groups of several bond connections, the groups differing in the length of the bond connections and the second bond legs are not define a common segment or no common area on the pad.
  • a disadvantage of this embodiment of a wire bond is that in this case a sufficiently large pad of the power semiconductor device must be available in order to use such complex topologies meaningful.
  • surge current loads of this power semiconductor component are to be considered in particular. These surge currents exceed the continuous load of the power semiconductor component by a multiple in the order of tenths of a second in a short period of time. In this case, designs of bond connections designed for continuous operation are not necessarily advantageous.
  • the present invention has for its object to provide a bond for power semiconductor modules, wherein the maximum current carrying capacity of Bond connection in its entirety, especially at surge load, is improved, in particular the current distribution and thus the heat distribution over the individual bonds is balanced.
  • This object is achieved by a power semiconductor module having the features of claim 1.
  • particularly advantageous embodiments of the invention disclose the dependent claims. It should be noted that the features listed individually in the claims can be combined with each other in any technically meaningful manner and show further embodiments of the invention. The description additionally characterizes and specifies the invention, in particular in connection with the figures.
  • the power semiconductor module according to the invention has a substrate, preferably an electrically insulating substrate. For example, it is a ceramic substrate, such as Al 2 0 3 , AIN, Si 3 N 4 .
  • the substrate is preferably arranged on a metallic base plate, wherein the base plate is designed for arrangement and optionally attachment to a heat sink.
  • at least one power semiconductor is further provided.
  • the power semiconductors considered here are, for example, uncontrolled components such as power diodes, or also controlled components such as power thyristors or power transistors, such as a bipolar transistor. These controlled components have to drive them at least one further connection surface provided in general by a metallization provided on its first main surface, which is electrically separated from the load current conducting and is also connected to a control potential surface of the substrate by means of a bonding connection according to the prior art , This bond between the control or the control terminals is not the subject of the invention.
  • the power semiconductor has a connection surface on its side facing away from the substrate.
  • the pad can be formed as a continuous metallization or segmented, as it may be the case for example in the emitter pads of an IGBT.
  • an optionally segmented load potential area arranged on the substrate next to the power semiconductor is furthermore provided.
  • each of the plurality of bonding connections has at least one first type of bonding foot, in short the first bonding foot, wherein the first bonding foot is characterized in that the one on the at least one load potential surface is arranged.
  • each of the plurality of bonding connections has a plurality of second bonding feet, wherein these are arranged on the connection surface of the power semiconductor.
  • each bonding connection has at least one end on the connection surface, preferably one end is provided on the load potential surface and one end is provided on the connection surface, more preferably the bond connection ends at its ends in each case by means of a bonding foot.
  • the plurality of bond connections are arranged in at least two groups of a plurality of bond connections of the same number of bond feet.
  • the second bond feet of each bond connection of a group are arranged exclusively in a segment or area of the connection area defined by a partial area of the connection area.
  • the segments or the regions of the different groups are arranged spatially separated from each other or expressed with respect to the second bond feet: according to the invention, there is no spatially overlapping arrangement of the second bond feet of the groups.
  • the second bond feet of each bond connection of a group are preferably arranged exclusively in exactly one common partial area of the connection area.
  • the partial surface is preferably closed in itself. Preferably, 15 to 50 bonds, more preferably 16 to 30 bonds, are provided per group.
  • the groups differ from one another in that their first bond feet are arranged on the load potential area in a different, but preferably within each group, matching distance to the power semiconductor.
  • further bonding connections can be provided. These are provided, for example, to electrically connect the control potential surfaces with the associated control pads of the controlled power semiconductor.
  • the basic idea of the invention is to make the current density more homogeneous on the connection pad of the power semiconductor which conducts the load current in comparison to the prior art. It has been shown that a particularly uniform load current distribution and thus distribution of the ohmic heat losses via the bonding connections is achieved by the embodiment according to the invention, in which the current supply or discharge per group is limited to a region of the pad of the power semiconductor.
  • the inventively further developed bond from a load potential surface to a contact surface, or metallization of the power semiconductor device has a plurality of individual bonding wires, or bonding tapes, which in turn a plurality of have second bond feet on the metallization of the power semiconductor device.
  • These second bond feet can be arranged arbitrarily.
  • a regular arrangement of the second feet in the relevant segment or area is preferred.
  • the arrangement of the second, belonging to a group group feet is checkerboard, the second bond feet are here only on fields of the same "color" so arranged offset from row to row.
  • Preferred is an arrangement in parallel, equal rows, maintaining the distances between the next adjacent second feet in the two directions.
  • the bond connections are preferably arc-shaped between the bonding feet in order to mechanically stress the bond feet as little as possible on tension and / or pressure given a temperature-induced expansion of the bond connection.
  • the bond connections of a group do not differ in length. More preferably, the bond compounds of the groups all have the same length.
  • the material of the bonds associated with the groups aluminum or copper.
  • the bond is made of high purity aluminum or high purity copper, with a purity of 99.99% or better.
  • the bonds may consist, for example, of an aluminum or copper alloy, with additives such as magnesium, silicon, silver or the like, for example the thermal or the electrically conductive properties or the mechanical properties of the bond compounds, additives being provided as alloying addition.
  • the bonding connections are preferably bonding wires.
  • the bonding wires have a round cross-section.
  • the cross-sectional diameter is in the range of 100 ⁇ to 800 ⁇ , more preferably in the range of 125 ⁇ to 500 ⁇ , such as 300 ⁇ .
  • the bond connections of a group each have a third bond foot, which is arranged in the course of the bonding connection between the first and the second bond feet and on a isolated to the load potential surface metallization of the substrate.
  • An insulated arrangement in the sense of the invention relates to the metallization per se and is thus not inconsistent with the electrical connection produced by the bond connection.
  • the metallization is electrically connected to the load potential area exclusively via at least one bonding connection. by virtue of the additional sheet guide resulting from the additional bond foot results in an extension of the relevant bond connections. This provides the ability to match the different groups with respect to the length of their bonds.
  • the additional bonding foot provides additional mechanical stabilization of the bond connection, without negatively influencing the current distribution in the sense of the basic idea of the invention due to the arrangement on the isolated metallization.
  • the third bond feet of the group are preferably arranged on a common metallization of the substrate, as a result of the connection with the substrate, among other things, an advantageous cooling. For example, they are arranged along an imaginary line running parallel to and spaced from one edge of the power semiconductor.
  • segments in the sense of the invention means regions which are arranged electrically insulated from one another, for example metallizations whose electrical insulation results from the arrangement on the substrate, but an electrical connection is not excluded
  • the connection is made via the load connection part, thereby effecting the common load current supply to and from the segments, for example, the segments are arranged parallel spaced from the opposite edges of the power semiconductor electrical and mechanical connection with external conductor ends and possibly the lead out of the electrical connection from a housing of the power semiconductor module is formed, for example, as a mirror-symmetrical trained bracket.
  • the power semiconductor module according to the invention consequently comprises at least one connection part, which is designed as a symmetrical bracket and whose strap ends are in touch contact, preferably solder contact, with the two segments of the load potential surface.
  • the bracket is a metal molding, preferably a metal molding of copper or a copper alloy.
  • the bond connections of the groups are arranged such that a mirror symmetry results with respect to their arrangement.
  • bonds which are not subject to this symmetry for example those which serve to connect the control terminals of the power semiconductor to associated control potential areas.
  • at least two groups differ in the number of second bond feet per bond connection. For example, one group has two second bond feet per bond connection, while another group has three second bond feet per bond connection.
  • the group with the largest distance to be bridged by the associated bonding connections between the associated load potential area or associated load potential area segment and associated contact area area or contact area segment has the lowest number of second bond feet per bond connection.
  • the power semiconductor has a minimum edge length in the range of 8.0 mm to 50.0 mm, preferably in the range of 9.0 to 25.0 mm, more preferably in the range of 10.0 mm to 20.0 mm ,
  • the power semiconductor module further comprises a housing, for example a housing made of plastic, preferably made of a fiber-reinforced plastic, such as a fiber-reinforced thermoplastic.
  • the housing is designed as Stülpgephaseuse.
  • the power semiconductor module according to the invention comprises exactly two power semiconductors or a number of power semiconductors which corresponds to the multiple of two.
  • a number of substrates corresponding to the number of power semiconductors is provided.
  • the bond connections of the first power semiconductor are arranged in two groups of a plurality of bond connections of the same number of bond feet and the second bond feet of each bond connection of a group are arranged exclusively in a segment or area of the connection area defined by a partial area of the connection area.
  • the groups of the first semiconductor differ in that their first bond legs are disposed on another segment of two segments of the load potential area of the first power semiconductor, which are respectively disposed adjacent two diametrically opposite edges of the first power semiconductor.
  • the exactly one load potential area of the second power semiconductor connected to the bond connections of the second power semiconductor is arranged between the first and second power semiconductors adjacent to an edge of the second power semiconductor and one of the remaining edges of the first power semiconductor.
  • the load potential area of the second power semiconductor is formed by a metallization of the substrate, which is simultaneously in touch contact with the first power semiconductor and / or one of the second Power semiconductor associated additional load potential area forms.
  • the power semiconductors are selected from the group comprising bipolar transistor, thyristor, diode. Exactly two power semiconductors are preferably a pairing of different power semiconductors.
  • the invention further relates to an arrangement of a heat sink and a power semiconductor module in one of the previously described embodiments and with the corresponding aforementioned technical advantages.
  • Figure 1 is a plan view of a first embodiment of the power semiconductor module 10 according to the invention.
  • FIG. 2 shows a detailed view of the power semiconductor module from FIG. 1;
  • FIG. 3 shows a further detailed view of the power semiconductor module from FIG. 1;
  • FIG. 4 shows a plan view of a second embodiment of the power semiconductor module 10 according to the invention.
  • FIG. 5 shows a plan view according to FIG. 4 with the removal of some components to clarify the structure shown in FIG. 4;
  • FIG. 6 shows a plan view according to FIG. 4 with the removal of other components for clarification of the construction shown in FIG.
  • FIGS. 1 to 3 show a first embodiment of the power semiconductor module 10 according to the invention
  • FIGS. 4 to 6 show a second embodiment of the power semiconductor module 10 according to the invention.
  • the modules of the first and second embodiments differ essentially by the power semiconductors 1, 2 used and by details of the bonding connection structure, in particular that of the second power semiconductor 2.
  • the first embodiment according to FIGS. 1 to 3 has two thyristors as first power semiconductor 1 and second power semiconductor 2
  • the embodiment of FIGS. 4 to 6 has two diodes as first power semiconductor 1 and second power semiconductor 2, respectively.
  • the power semiconductor module 10 of the first embodiment has a metallic base plate 5, which serves the arrangement and mounting on a heat sink, not shown.
  • a metallic base plate 5 which serves the arrangement and mounting on a heat sink, not shown.
  • two electrically insulating substrates 3, 4 are applied from ceramic.
  • a plurality of metallizations are respectively applied to the surface of the substrate 3, 4 facing away from the base plate 5, one each serves to attach and electrically contact a main surface of the power semiconductor 1, 2 arranged thereon.
  • Other metallizations of the substrates 3, 4 serve to provide load potential surfaces 13a, 13b, 23 for the power semiconductors 1, 2.
  • the first power semiconductor 1 is assigned, among other things, the load potential area formed by the two segments 13a, 13b.
  • a plurality of bond connections 15, 16 made of aluminum bonding wires or alternatively copper bonding wires are provided, which are arranged substantially parallel to one another.
  • Each of these bond connections 15, 16 has a first bonding foot 31, which is characterized in that it has a contact contact with a load potential surface or an associated segment.
  • Each of these bonding connections 15, 16 has at least two, here three second, bonding feet 32, which are characterized in that they are arranged on a connection surface 11 or an associated region or as here a segment 12a, 12b of the connection surface 11. All of the subsequently described bond feet 31, 32, 33 are connected by US wedge-wedges with the metallization touched by the bond. The segments 12a and 12b are also due to the functional wiring of the power semiconductor 1 to a pad 1 1 here the cathode pad summarized. The description of each first 31 and second 32 Bondfußes in the figures has been omitted for the sake of clarity. Between the bond feet 31, 32, the bonds form bows, which are shown more clearly in FIG. 3 with respect to the bond connections of the first power semiconductor 1.
  • the bond connections of the groups 15 and 16 are characterized in that they all have the same number of second bond feet 32 and have an end lying on the contact surface 11. Accordingly, a non-illustrated bond that extends from a load potential surface segment 13a to form a plurality of second bond legs 32 on the land 1 1 but without terminating thereon and to the other load potential surface segment 13b would also end up not as an inventive and thus considered to one of the groups associated bond.
  • the differentiation and division of the bond connections 15 and 16 into groups results, on the one hand, from the fact that the bond connections of a group are arranged exclusively in a segment defined by a partial surface of the connection surface, namely 12a or 12b of the connection surface 11 and, on the other hand, in that the first Bonded feet 31 are arranged on another segment 13a and 13b of the load potential surface. It has been found that the invention parallel and ramifying current supply and discharge and in the best case as here extending to the segments of the pad extending branching has an advantageous effect on the power distribution, in particular compared to a previously known, about the plurality of segments of the pad extending bond connection.
  • the arrangement of the second bond feet 32 of the bond connections of the power semiconductor 1 have a mirror symmetry along an axis 44.
  • the embodiment according to the invention particularly relates to the second power semiconductor 2, which is arranged on the further substrate 4.
  • the specific embodiment of the bonding connections 25, 26 can be seen in detail in FIG. It is in the power semiconductor 2 is also a thyristor.
  • the plurality of bond connections 25, 26 are arranged in at least two groups 25 and 26 of a plurality of bond connections of the same number of bond feet 31 and 32 and the second bond feet 32 of each bond connection of a group exclusively in one by a self-contained, common partial surface of the connection surface defined segment 22a and 22b of the pad 21 are arranged.
  • the groups differ in that their first bond feet 31 are arranged in a different, but within each group, matching distance ai or a 2 to the power semiconductor (2) on the associated load potential area 23 located here on the substrate 3.
  • the distance a2 of that group 26, whose associated segment 22a is arranged spatially closer to the relevant load potential area 23, is chosen to be greater than the distance a1 of that group 25 whose associated segment 22b is arranged spatially farther away to the respective load potential surface, resulting in at least approximately a match in the length of the bonds 25, 26 results.
  • the power semiconductor module 10 of the second embodiment shown in FIGS. 4 to 6 has a metallic base plate 5, which serves for the arrangement and mounting on a heat sink (not shown). On the side facing away from the heat sink of the base plate 5, two electrically insulating substrates 3, 4 are applied from ceramic. On the base plate 5 facing away from the surface of the substrate 3, 4 each have a plurality of metallizations are applied, each one serves the attachment and electrical contacting of a major surface of the power semiconductor 1, 2 arranged thereon, each of which is a power diode as mentioned above. Other metallizations of the substrates 3, 4 serve to provide load potential areas 13a, 13b, 23 for the power semiconductors 1, 2.
  • the power semiconductor 1 is assigned, inter alia, the load potential area formed by the two segments 13a, 13b.
  • the assignment of the segments 13a, 13b to a load potential area results from the same functional wiring of the power semiconductor, in this case the anode terminal of the power semiconductor 1, but also correspondingly by the parallel current supply or removal of a connection part, not shown, which is bow-shaped and mirror-symmetrical is and the legihableiter 1 is arranged across and is soldered with its free bracket ends on the load potential surfaces 13a, 13b seated with this.
  • Each of these bond connections 15, 16 has a first bonding foot 31, which is characterized in that it has a contact contact with a load potential surface or an associated segment 13a or 13b.
  • Each of these bonding connections 15, 16 has at least two, here three second, bonding feet 32, which are characterized in that they are arranged on a connection surface 11 or an associated region 12a, 12b of the connection surface 11.
  • the areas 12a and 12b are here distinguished from each other by dotted lines, a segmentation is not present but the pad 1 1 is defined in contrast to that of the power semiconductor 1 of the first embodiment by a continuous metallization.
  • the description of each first 31 and second 32 Bondfußes in the figures has been omitted for the sake of clarity. Between the bond feet 31, 32, the bonds form bows.
  • the bond connections of the groups 15 and 16 are characterized in that they all have the same number of second bond feet 32 and have an end lying on the contact surface 11.
  • the differentiation and division of the bonds 15 and 16 in groups results on the one hand in that the Bond connections of a group exclusively in a defined by a partial surface of the pad area, namely 12a and 12b of the pad 1 1 are arranged and on the other hand in that their first bond feet 31 are arranged on another segment 13a and 13b of the load potential surface. It has been found that the invention parallel and ramifying current supply and discharge and in the best case as here extending to the segments of the pad extending branching has an advantageous effect on the power distribution, in particular compared to a previously known, about the plurality of segments of the pad extending bond connection.
  • the inventive design of the bond relates in particular to the second power semiconductor 2 which is arranged on the further substrate 4.
  • the specific embodiment of the bonding connections 25, 26 can be seen in detail in FIG. 5 and illustrated here by the bonding connections 25 and 26 shown by way of example. It is in the power semiconductor 2 is also a diode.
  • the plurality of bond connections 25, 26 are arranged in at least two groups 25 and 26 of a plurality of bond connections of the same number of bond feet 31 and 32, and the second bond feet 32 of each bond connection of a group exclusively in one by a common self-contained partial surface of the pad defined region 22a and 22b of the pad 21 is arranged.
  • FIG. 1 As should be clarified in FIG.
  • the groups differ in the number of bond feet. While the group 25 has a total of 3 bond feet and only two second bond feet 32 thereof, the group 26 has a total of 5 bond feet and of which 3 second bond feet.
  • a third bonding foot 33 is provided in each case between the second bonding feet 32 located on the connection surface 21 and the first bonding foot 31 located on the load potential surface 23, said metallization being arranged on a metallization which is electrically insulated on the substrate 4 for the load potential surface 23 and the connection surface 21 30 is arranged. Only one group 26 has third bond feet 33 in their bonds, all of which are arranged on a closed surface of the metallization 30.
  • the bond connections of the two groups also differ in that their first bond feet 31 are arranged at a different distance ai and / or a 2 to the power semiconductor 2 matching within each group on the associated load potential area 23 located here on the substrate 3.
  • the distance a2 of that group 26, whose associated segment 22a is arranged spatially closer to the relevant load potential area 23, is chosen to be greater than the distance a1 of that group 25 whose associated segment 22b is spatially farther away from the relevant one Load potential surface is arranged, which results in at least approximately a match in the length of the bonds 25, 26 in cooperation with the feature of the differing number of second bond feet 32 and the additional third Bondfuß 33.
  • the load potential area 23 is defined by a metallization, which extends below the first power semiconductor 1, contacting it on its main surface facing the substrate 3, to the other side, in order to define a connection area 14 and soldering area for a connection part (not shown) ,

Abstract

The invention relates to a power semiconductor module (10) comprising • at least one substrate (4); • at least one power semiconductor device (2) arranged on the substrate (4) and having a land (21) on its surface facing away from the substrate; • a load potential surface (23), arranged on the substrate (4) next to the power semiconductor device (2), which surface is optionally segmented; and • a plurality of bonding connections (25, 26) for the parallel electrically conductive connection of the land (21) to the load potential surface (23), each bonding connection (25, 26) having at least one first bond heel (31) on the load potential surface (23) and several second bond heels (32) on the land (21), the land (21) of each bonding connection (25, 26) having at least one end, the plurality of bonding connections (25, 26) being grouped in at least two groups (25 or 26) of several bonding connections with the same number of bond heels and the second bond heels (32) of each bonding connection of one group being arranged in a segment defined by a surface portion of the land or in a region (22a or 22b) of the land (21) only and the groups differing in that their first bond heels (31) are located on the load potential surface (23) at a different distance (a1 or a2) from the power semiconductor device (2), preferably however at a distance that is the same within each group.

Description

Leistungshalbleitermodul mit verbesserter Bondverbindungstruktur  Power semiconductor module with improved bond connection structure
Die vorliegende Erfindung betrifft ein Leistungshalbleitermodul. Leistungshalbleitermodule sind Halbleiterbaugruppen, die in Leistungselektronik-schaltungen zum Einsatz kommen. Leistungshalbleitermodule kommen üblicherweise in Fahrzeug- und Industrieanwendungen zum Einsatz, wie in Invertern und Gleichrichtern. Die Halbleiterkomponenten, die in den Leistungshalbleitermodulen enthalten sind, sind üblicherweise IGBT(lnsulated Gate Bipolar Transistor)-Halbleiterchips oder MOSFET(Metalloxidhalbleiter-Feldeffekttransistor)- Halbleiterchips. Die IGBT- und MOSFET-Halbleiterchips weisen variierende Nennspannungen und -leistungen auf. Einige Leistungshalbleitermodule weisen zum Überspannungsschutz auch zusätzliche Halbleiterdioden (d. h. Freilaufdioden) im Halbleiterpaket auf. The present invention relates to a power semiconductor module. Power semiconductor modules are semiconductor devices that are used in power electronics circuits. Power semiconductor modules are commonly used in automotive and industrial applications, such as in inverters and rectifiers. The semiconductor components included in the power semiconductor modules are usually IGBT (Isolated Gate Bipolar Transistor) semiconductor chips or MOSFET (Metal Oxide Semiconductor Field Effect Transistor) semiconductor chips. The IGBT and MOSFET semiconductor chips have varying nominal voltages and powers. Some power semiconductor modules also have additional semiconductor diodes (i.e., freewheeling diodes) in the semiconductor package for overvoltage protection.
Für höhere Leistungsanwendungen weist ein Leistungshalbleitermodul üblicherweise einen oder mehrere Leistungshalbleiterbauelemente, im Folgenden auch kurz Leistungshalbleiter genannt, auf einem einzelnen Substrat auf. Das Substrat weist üblicherweise wenigstens ein isolierendes Keramiksubstrat, wie Al203, AIN, Si3N4 oder ein anderes geeignetes Material auf, um das Leistungshalbleitermodul elektrisch zu isolieren. Das Substrat ist üblicherweise auf einer metallischen Grundplatte aufgebracht, die als das Substrat stabilisierender Träger der mechanischen Befestigung und thermischen Kopplung des Moduls an einen Kühlkörper dient. Mindestens eine Oberseite des Keramiksubstrates ist entweder mit reinem oder plattiertem Cu, AI oder einem anderen geeigneten Material metallbeschichtet, um einerseits den darauf angeordneten und regelmäßig verlöteten Leistungshalbleiter zu kontaktieren und andererseits elektrische Potenzialflächen, insbesondere Lastpotenzialflächen, bereitzustellen. Diese Potenzialflächen dienen einerseits der Stromzu- oder abfuhr über sogenannte Bondverbindungen zum Leistungshalbleiter andererseits der mechanischen Befestigung und elektrischen Verbindung mit Anschlussteilen, die der Stromzu- oder abfuhr zu oder aus dem Modul insbesondere aus dessen Gehäuse dienen, um beispielsweise letztere außerhalb des Gehäuses mit externen Leitern zu verbinden, beispielsweise mittels Verschraubung. Die für die Potenzialflächen vorgesehene Metallschicht wird üblicherweise mit Hilfe eines direkten Kupfer-Bonding-Verfahrens (DCB), eines direkten Aluminium- Bonding-Verfahrens (DAB) oder eines aktiven Metallhartlötverfahrens (AMB) an das Keramiksubstrat gebondet. For higher power applications, a power semiconductor module usually has one or more power semiconductor components, also referred to below as power semiconductors, on a single substrate. The substrate typically includes at least one insulating ceramic substrate, such as Al 2 O 3 , AlN, Si 3 N 4, or other suitable material to electrically isolate the power semiconductor module. The substrate is usually applied to a metallic base plate serving as a substrate stabilizing support for mechanical attachment and thermal coupling of the module to a heat sink. At least one top of the ceramic substrate is metal coated with either pure or plated Cu, Al, or other suitable material to contact the power semiconductor disposed thereon and soldered thereto on a regular basis, and to provide electrical potential areas, particularly load potential areas. On the one hand, these potential surfaces serve to supply or remove electricity via so-called bond connections to the power semiconductor, on the other hand, mechanical fastening and electrical connection with connection parts, which supply or remove power to or from the module, in particular from its housing, for example to the latter outside the housing with external conductors to connect, for example by means of screwing. The metal layer provided for the potential areas is usually bonded to the ceramic substrate by means of direct copper bonding (DCB), direct aluminum bonding (DAB) or active metal brazing (AMB) techniques.
Zu elektrischen Verbindung der Potenzialflächen mit der wenigstens einen, dem Substrat abgewandten Anschlussfläche des betreffenden Leistungshalbleiters sind regelmäßig Bondverbindungen in Form von Bonddrähten, auch Drahtbondverbindung genannt, oder Bondbändern auch Bandbondverbindung genannt, vorgesehen, die den elektrisch leitenden Kontakt zwischen der Potenzialfläche und der Anschlussfläche des Halbleiters herstellen. Im Bereich der Leistungselektronik kommen reine (99,99 % AI-Anteil und höher) Aluminium- und Kupfer Materialien zur Anwendung für die Bondverbindung. Die verschiedenen Verfahrensvarianten zur Herstellung der Verbindung zwischen der Bondverbindung und der Anschlussfläche einerseits und der Bondverbindung und der Potenzialfläche andererseits sind das Thermokompressionsbonden (kurz: TC-Bonden), das Thermosonic-Ball-Wedge- Bonden (TS-Bonden) und das Ultraschall-Wedge-Wedge-Bonden (US-Bonden). Der dabei jeweils hergestellte Berührbereich zwischen der Bondverbindung und der Anschlussfläche einerseits und der Bondverbindung und der Anschlusspotenzialfläche andererseits wird als Bondfuß bezeichnet. For electrical connection of the potential surfaces with the at least one terminal surface of the respective power semiconductor facing away from the substrate, there are regularly provided bonding connections in the form of bonding wires, also referred to as a wire bond connection, or bonding tapes also called a belt bond, which electrically conducts the conductive connection Establish contact between the potential surface and the pad of the semiconductor. In the field of power electronics, pure (99.99% Al content and higher) aluminum and copper materials are used for the bond connection. The various process variants for the production of the connection between the bond connection and the connection surface on the one hand and the bond connection and the potential surface on the other hand are the thermocompression bonding (in short: TC bonding), the Thermosonic-Ball-Wedge- bonding (TS bonding) and the ultrasonic wedge -Wedge bonding (US bonding). The contact area produced in each case between the bond connection and the connection area on the one hand and the bond connection and the connection potential area on the other hand is referred to as bond foot.
Die Anforderungen und damit die Leistungsfähigkeit derartiger Leistungshalbleitermodule sowie der zu deren Aufbau notwendigen Leistungshalbleiterbauelemente sind in den letzten Jahren stetig gestiegen. Es stieg beispielhaft die Stromstärke pro Fläche der Halbleiterbauelemente. Weiterhin werden aus wirtschaftlichen Notwendigkeiten heraus die Halbleiterbauelemente immer näher an Ihrer Leistungsgrenze betrieben. The requirements and thus the performance of such power semiconductor modules and the power semiconductor components necessary for their construction have increased steadily in recent years. By way of example, the current intensity per area of the semiconductor components has increased. Furthermore, for economic reasons, the semiconductor devices are operating ever closer to their power limit.
Entscheidende externe Faktoren für die Leistungsfähigkeit von Leistungshalbleitermodulen bzw. Leistungshalbleiterbauelementen sind die Wärmeabfuhr sowie die Stromzu- und - abführung. Stand der Technik in der Stromzu- und -abführung von Leistungshalbleiterbauelementen sind Bondverbindungen in verschiedenen Ausgestaltungen, beispielhaft als Drahtbondverbindung oder als Bandbondverbindung. Bei Leistungshalbleitern mit hohen Stromlasten werden Dickdrähte mit Durchmessern zwischen 100 μηη und 500 μηη oder Dickdraht-Bändchen verwendet. Reicht deren Querschnitt nicht aus, sind regelmäßig mehrere parallele Bondverbindungen vorgesehen. Gegenstand der vorliegenden Erfindung ist die Leistungsfähigkeit derartiger Bondverbindungen. Drahtbondverbindung für Leistungshalbleiterbauelemente sind beispielhaft aus der DE 195 49 01 1 A1 bekannt. In diesen dort vorgestellten Leistungshalbleitermodulen werden die Leistungshalbleiterbauelemente mittels Lotverbindungen auf einem Substrat angeordnet. Diese Lotverbindung der zweiten Hauptfläche des Leistungshalbleiterbauelements stellt einen Teil der Stromzu- bzw. -abführung dar. Weitere Stromanschlüsse werden mittels Drahtbondverbindungen zwischen der die Anschlussfläche bereitstellenden Metallisierung der ersten Hauptfläche des Leistungshalbleiterbauelements und einer Lastpotenzialfläche hergestellt. Charakteristisch für die bekannten Drahtbondverbindungen ist, dass die Bonddrähte eng benachbart zueinander angeordnet sind, und dass die Bondfüße der einzelnen Bonddrähte, speziell auf der des Leistungshalbleiterbauelements, in einer Reihe oder leicht versetzt angeordnet sind. Nach dem Stand der Technik werden Leistungshalbleiterbauelemente nicht nur mittels einzelner nebeneinander angeordneter Bonddrähte zur Stromzuführung kontaktiert, sondern häufig mit zwei oder mehreren in Richtung der Bonddrähte wenigstens abschnittsweise übereinander liegenden Bonddrähten. Die einzelnen Bonddrähte kontaktieren häufig auch zur Verbesserung der Stromverteilung auf dem Leistungshalbleiterbauelement dessen Anschlussfläche mittels mehrerer Bondfüße. Decisive external factors for the performance of power semiconductor modules or power semiconductor components are the heat dissipation and the power supply and removal. State of the art in the power supply and removal of power semiconductor components are bond connections in various configurations, for example as a wire bond connection or as a band bond connection. In power semiconductors with high power loads thick wires are used with diameters between 100 μηη and 500 μηη or thick wire ribbon. If their cross-section is insufficient, several parallel bond connections are regularly provided. The present invention is the performance of such bonds. Drahtbondverbindung for power semiconductor devices are known for example from DE 195 49 01 1 A1. In these power semiconductor modules presented there, the power semiconductor components are arranged on a substrate by means of solder connections. This solder connection of the second main area of the power semiconductor component forms part of the current supply or removal. Further current connections are made by means of wire bonds between the metallization of the first main area of the power semiconductor component providing the connection area and a load potential area. Characteristic of the known wire bond connections is that the bonding wires are arranged closely adjacent to each other, and that the bonding feet of the individual bonding wires, especially on the power semiconductor component, are arranged in a row or slightly offset. According to the prior art, power semiconductor components are contacted not only by means of individual juxtaposed bonding wires for power supply, but often with two or more in the direction of the bonding wires at least partially superposed bonding wires. The individual bonding wires frequently also contact the connection surface thereof by means of a plurality of bonding feet in order to improve the current distribution on the power semiconductor component.
Simulationen zeigen, dass bei einer Anordnung der Bonddrähte zwischen einer Lastanschlusspotenzialfläche und einem Leistungshalbleiterbauelement nach dem Stand der Technik der Strom inhomogen über die Anschlussfläche in das Leistungshalbleiterbauelement eingespeist wird und somit dieses nicht in seiner gesamten Fläche gleichmäßig zur Stromführung belastet wird. Simulations show that in an arrangement of the bonding wires between a load terminal potential surface and a power semiconductor device according to the prior art, the current is fed inhomogeneously via the pad in the power semiconductor device and thus this is not burdened evenly in its entire surface for power management.
Die DE 102 04 157 A1 offenbart eine Drahtbondverbindung für die Strom leitende Verbindung einer Leiterbahn mit einem Leistungshalbleiterbauelement, wobei die Abstände von allen Bonddrähten oder innerhalb von einzelnen Gruppen von Bonddrähten variiert und somit die Stromeinspeisung in Richtung senkrecht zum Verlauf der Bonddrähte gegenüber dem Stand der Technik homogener gestaltet ist. DE 102 04 157 A1 discloses a Drahtbondverbindung for the current-conducting connection of a conductor to a power semiconductor device, wherein the distances of all bonding wires or within individual groups of bonding wires varies and thus the power supply in the direction perpendicular to the course of the bonding wires over the prior art is more homogeneous.
Die DE 10 2005 039 940 B4 offenbart eine Drahtbondverbindung bei der die zweiten Bondfüße mehrerer Bondverbindungen schachbrettartig alternierend über die gesamte Anschlussfläche verteilt sind und die Bondverbindungen zwei Gruppen aus mehreren Bondverbindungen ausbilden, wobei die Gruppen sich in der Länge der Bondverbindungen unterscheiden und deren zweiten Bondfüße kein gemeinsames Segment oder keinen gemeinsamen Bereich auf der Anschlussfläche definieren. DE 10 2005 039 940 B4 discloses a wire bond connection in which the second bond feet of a plurality of bond connections are distributed over the entire connection surface in a checkerboard pattern and the bond connections form two groups of several bond connections, the groups differing in the length of the bond connections and the second bond legs are not define a common segment or no common area on the pad.
Nachteilig an dieser Ausgestaltung einer Drahtbondverbindung ist, dass hierbei eine genügend große Anschlussfläche des Leistungshalbleiterbauelements zur Verfügung stehen muss, um derartig komplexe Topologien sinnvoll einsetzen zu können. A disadvantage of this embodiment of a wire bond is that in this case a sufficiently large pad of the power semiconductor device must be available in order to use such complex topologies meaningful.
Speziell bei Leistungshalbleitermodulen mit Dioden und Thyristoren sind Stoßstrombelastungen dieser Leistungshalbleiterbauelement besonders zu beachten. Diese Stoßströme übersteigen in einem kurzen Zeitraum in der Größenordnung von Zehntelsekunden die Dauerbelastung des Leistungshalbleiterbauelements um ein Vielfaches. Hierbei erweisen sich für den Dauerbetrieb ausgelegte Ausgestaltungen von Bondverbindungen nicht unbedingt als vorteilhaft. Particularly in the case of power semiconductor modules with diodes and thyristors, surge current loads of this power semiconductor component are to be considered in particular. These surge currents exceed the continuous load of the power semiconductor component by a multiple in the order of tenths of a second in a short period of time. In this case, designs of bond connections designed for continuous operation are not necessarily advantageous.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, eine Bondverbindung für Leistungshalbleitermodule vorzustellen, wobei die maximale Stromtragfähigkeit der Bondverbindung in ihrer Gesamtheit, speziell bei Stoßstrombelastung, verbessert ist, insbesondere die Stromverteilung und damit die Wärmeverteilung über die einzelnen Bondverbindungen ausgeglichener ist. Diese Aufgabe wird erfindungsgemäß durch ein Leistungshalbleitermodul mit den Merkmalen nach Anspruch 1 gelöst. Weitere, besonders vorteilhafte Ausgestaltungen der Erfindung offenbaren die Unteransprüche. Es ist darauf hinzuweisen, dass die in den Patentansprüchen einzeln aufgeführten Merkmale in beliebiger, technisch sinnvoller Weise miteinander kombiniert werden können und weitere Ausgestaltungen der Erfindung aufzeigen. Die Beschreibung charakterisiert und spezifiziert die Erfindung insbesondere im Zusammenhang mit den Figuren zusätzlich. Das erfindungsgemäße Leistungshalbleitermodul weist ein Substrat, bevorzugt elektrisch isolierendes Substrat auf. Beispielsweise handelt es sich um ein Keramiksubstrat, wie Al203, AIN, Si3N4 . Das Substrat ist bevorzugt auf einer metallischen Grundplatte angeordnet, wobei die Grundplatte zur Anordnung und gegebenenfalls Befestigung an einem Kühlkörper ausgebildet ist. Erfindungsgemäß ist ferner wenigstens ein Leistungshalbleiter vorgesehen. Die hier betrachteten Leistungshalbleiter sind beispielweise ungesteuerte Bauelemente wie Leistungsdioden, oder auch gesteuerte Bauelemente wie Leistungsthyristoren oder Leistungstransistoren, wie ein Bipolartransistor. Diese gesteuerten Bauelemente weisen zu ihrer Ansteuerung mindestens eine weitere im Allgemeinen durch eine auf ihrer ersten Hauptfläche vorgesehenen Metallisierung bereitgestellte weitere Anschlussfläche auf, die elektrisch von der Laststrom leitenden getrennt ist und nach dem Stand der Technik ebenfalls mittels einer Bondverbindung mit einer Steuerpotenzialfläche des Substrats verbunden ist. Diese Bondverbindung zwischen dem oder den Steueranschlüssen ist nicht Gegenstand der Erfindung. Erfindungsgemäß weist der Leistungshalbleiter auf seiner dem Substrat abgewandten Seite eine Anschlussfläche auf. Die Anschlussfläche kann als durchgehende Metallisierung ausgebildet oder auch segmentiert sein, wie es beispielsweise bei den Emitter- Anschlussflächen eines IGBT der Fall sein kann. The present invention has for its object to provide a bond for power semiconductor modules, wherein the maximum current carrying capacity of Bond connection in its entirety, especially at surge load, is improved, in particular the current distribution and thus the heat distribution over the individual bonds is balanced. This object is achieved by a power semiconductor module having the features of claim 1. Further, particularly advantageous embodiments of the invention disclose the dependent claims. It should be noted that the features listed individually in the claims can be combined with each other in any technically meaningful manner and show further embodiments of the invention. The description additionally characterizes and specifies the invention, in particular in connection with the figures. The power semiconductor module according to the invention has a substrate, preferably an electrically insulating substrate. For example, it is a ceramic substrate, such as Al 2 0 3 , AIN, Si 3 N 4 . The substrate is preferably arranged on a metallic base plate, wherein the base plate is designed for arrangement and optionally attachment to a heat sink. According to the invention, at least one power semiconductor is further provided. The power semiconductors considered here are, for example, uncontrolled components such as power diodes, or also controlled components such as power thyristors or power transistors, such as a bipolar transistor. These controlled components have to drive them at least one further connection surface provided in general by a metallization provided on its first main surface, which is electrically separated from the load current conducting and is also connected to a control potential surface of the substrate by means of a bonding connection according to the prior art , This bond between the control or the control terminals is not the subject of the invention. According to the invention, the power semiconductor has a connection surface on its side facing away from the substrate. The pad can be formed as a continuous metallization or segmented, as it may be the case for example in the emitter pads of an IGBT.
Erfindungsgemäß ist ferner eine auf dem Substrat neben dem Leistungshalbleiter angeordnete, gegebenenfalls segmentierte Lastpotenzialfläche vorgesehen. According to the invention, an optionally segmented load potential area arranged on the substrate next to the power semiconductor is furthermore provided.
Erfindungsgemäß sind ferner mehrere Bondverbindungen zur parallelen elektrisch leitenden Verbindung der Anschlussfläche mit der Lastpotenzialfläche vorgesehen. Erfindungsgemäß weist jede der mehreren Bondverbindungen wenigstens einen Bondfuß erster Art, kurz ersten Bondfuß, auf, wobei der erste Bondfuß dadurch gekennzeichnet ist, dass der auf der wenigstens einen Lastpotenzialfläche angeordnet ist. Ferner weist jede der mehreren Bondverbindungen erfindungsgemäß mehrere zweite Bondfüße auf, wobei diese auf der Anschlussfläche des Leistungshalbleiters angeordnet sind. Erfindungsgemäß weist jede Bondverbindung auf der Anschlussfläche wenigstens ein Ende auf, bevorzugt ist ein Ende auf der Lastpotenzialfläche und ein Ende auf der Anschlussfläche vorgesehen, noch bevorzugter endet die Bondverbindung an ihren Enden jeweils mittels eines Bondfußes. Furthermore, according to the invention, a plurality of bond connections to the parallel electrically conductive connection of the connection area with the load potential area are provided. According to the invention, each of the plurality of bonding connections has at least one first type of bonding foot, in short the first bonding foot, wherein the first bonding foot is characterized in that the one on the at least one load potential surface is arranged. Furthermore, according to the invention, each of the plurality of bonding connections has a plurality of second bonding feet, wherein these are arranged on the connection surface of the power semiconductor. According to the invention, each bonding connection has at least one end on the connection surface, preferably one end is provided on the load potential surface and one end is provided on the connection surface, more preferably the bond connection ends at its ends in each case by means of a bonding foot.
Erfindungsgemäß sind die mehreren Bondverbindungen in wenigstens zwei Gruppen aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert. Erfindungsgemäß sind die zweiten Bondfüße jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment oder Bereich der Anschlussfläche angeordnet. Anders ausgedrückt sind die Segmente oder die Bereiche der unterschiedlichen Gruppen räumlich getrennt voneinander angeordnet oder bezogen auf die zweiten Bondfüße ausgedrückt: es ist erfindungsgemäß keine räumlich überschneidende Anordnung der zweiten Bondfüße der Gruppen vorgesehen. Bevorzugt sind die zweiten Bondfüße jeder Bondverbindung einer Gruppe ausschließlich in genau einer gemeinsamen Teilfläche der Anschlussfläche angeordnet. Bevorzugt ist die Teilfläche in sich geschlossen. Bevorzugt sind pro Gruppe 15 bis 50 Bondverbindungen, noch bevorzugter 16 bis 30 Bondverbindungen, vorgesehen. According to the invention, the plurality of bond connections are arranged in at least two groups of a plurality of bond connections of the same number of bond feet. According to the invention, the second bond feet of each bond connection of a group are arranged exclusively in a segment or area of the connection area defined by a partial area of the connection area. In other words, the segments or the regions of the different groups are arranged spatially separated from each other or expressed with respect to the second bond feet: according to the invention, there is no spatially overlapping arrangement of the second bond feet of the groups. The second bond feet of each bond connection of a group are preferably arranged exclusively in exactly one common partial area of the connection area. The partial surface is preferably closed in itself. Preferably, 15 to 50 bonds, more preferably 16 to 30 bonds, are provided per group.
Erfindungsgemäß unterscheiden sich die Gruppen dahingehend, dass deren ersten Bondfüße in einem unterschiedlichen, bevorzugt aber innerhalb jeder Gruppe übereinstimmenden, Abstand zum Leistungshalbleiter auf der Lastpotenzialfläche angeordnet sind. Neben den erfindungsgemäß den Gruppen zugehörigen Bondverbindungen können weitere Bondverbindungen vorgesehen sein. Diese sind beispielsweise vorgesehen, um die Steuerpotenzialflächen mit den zugehörigen Steueranschlussflächen des gesteuerten Leistungshalbleiters elektrisch zu verbinden. According to the invention, the groups differ from one another in that their first bond feet are arranged on the load potential area in a different, but preferably within each group, matching distance to the power semiconductor. In addition to the bonding compounds belonging to the groups according to the invention, further bonding connections can be provided. These are provided, for example, to electrically connect the control potential surfaces with the associated control pads of the controlled power semiconductor.
Der Grundgedanke der Erfindung liegt darin, die Stromdichte auf die den Laststrom leitende Anschlussfläche des Leistungshalbleiters im Vergleich zum Stand der Technik homogener auszuführen. Es hat sich gezeigt, dass durch die erfindungsgemäße Ausführungsform, bei der die Stromzu- bzw. abfuhr pro Gruppe auf einen Bereich der Anschlussfläche des Leistungshalbleiters beschränkt ist, eine besonders gleichmäßige Laststromverteilung und damit Verteilung des ohmschen Wärmeverluste über die Bondverbindungen erreicht wird. The basic idea of the invention is to make the current density more homogeneous on the connection pad of the power semiconductor which conducts the load current in comparison to the prior art. It has been shown that a particularly uniform load current distribution and thus distribution of the ohmic heat losses via the bonding connections is achieved by the embodiment according to the invention, in which the current supply or discharge per group is limited to a region of the pad of the power semiconductor.
Die erfindungsgemäß weitergebildete Bondverbindung von einer Lastpotenzialfläche zu einer Kontaktfläche, bzw. Metallisierung des Leistungshalbleiterbauelement weist eine Mehrzahl von einzelnen Bonddrähten, oder auch Bondbändern, auf, die ihrerseits eine Mehrzahl von zweiten Bondfüßen auf der Metallisierung des Leistungshalbleiterbauelements aufweisen. Diese zweiten Bondfüße können beliebig angeordnet sein. Bevorzugt ist eine regelmäßige Anordnung der zweiten Füße in dem betreffenden Segment oder Bereich. Beispielsweise ist die Anordnung der zweiten, zu einer betreffenden Gruppe gehörigen Füße schachbrettartig, wobei die zweiten Bondfüße hier nur auf Feldern gleicher "Farbe" also von Reihe zu Reihe versetzt angeordnet sind. Bevorzugt ist eine Anordnung in parallelen gleichen Reihen, wobei die Abstände zwischen den nächstbenachbarten zweiten Füßen in den beiden Richtungen beibehalten werden. The inventively further developed bond from a load potential surface to a contact surface, or metallization of the power semiconductor device has a plurality of individual bonding wires, or bonding tapes, which in turn a plurality of have second bond feet on the metallization of the power semiconductor device. These second bond feet can be arranged arbitrarily. A regular arrangement of the second feet in the relevant segment or area is preferred. For example, the arrangement of the second, belonging to a group group feet is checkerboard, the second bond feet are here only on fields of the same "color" so arranged offset from row to row. Preferred is an arrangement in parallel, equal rows, maintaining the distances between the next adjacent second feet in the two directions.
Die Bondverbindungen sind bevorzugt zwischen den Bondfüßen bogenförmig ausgebildet, um die Bondfüße bei einer temperaturbedingten Ausdehnung der Bondverbindung mechanisch so wenig wie möglich auf Zug und/oder Druck zu belasten. The bond connections are preferably arc-shaped between the bonding feet in order to mechanically stress the bond feet as little as possible on tension and / or pressure given a temperature-induced expansion of the bond connection.
Gemäß einer bevorzugten Ausführungsform unterscheiden sich die Bondverbindungen einer Gruppe in der Länge nicht. Noch bevorzugter weisen die Bondverbindungen der Gruppen alle die gleiche Länge auf. Gemäß einer bevorzugten Ausführungsform weist das Material der den Gruppen zugehörigen Bondverbindungen Aluminium oder Kupfer auf. Beispielsweise ist die Bondverbindung aus hochreinem Aluminium oder hochreinem Kupfer, mit einem Reinheitsgrad von 99,99 % oder besser. Alternativ können die Bondverbindungen beispielsweise aus einer Aluminium- oder Kupferlegierung bestehen, wobei als Legierungszusatz beispielsweise Magnesium, Silizium, Silber oder ähnliche, beispielsweise die thermischen oder die elektrisch leitenden Eigenschaften bzw. die mechanischen Eigenschaften der Bondverbindungen verbessernde, Zusätze, vorgesehen sind. Bevorzugt handelt es sich bei den Bondverbindungen um Bonddrähte. Beispielsweise weisen die Bonddrähte einen runden Querschnitt auf. Bevorzugt liegt der Querschnittdurchmesser im Bereich von 100 μηη bis 800 μηη, bevorzugter im Bereich von 125 μηη bis 500 μηη, wie 300 μηι. According to a preferred embodiment, the bond connections of a group do not differ in length. More preferably, the bond compounds of the groups all have the same length. According to a preferred embodiment, the material of the bonds associated with the groups aluminum or copper. For example, the bond is made of high purity aluminum or high purity copper, with a purity of 99.99% or better. Alternatively, the bonds may consist, for example, of an aluminum or copper alloy, with additives such as magnesium, silicon, silver or the like, for example the thermal or the electrically conductive properties or the mechanical properties of the bond compounds, additives being provided as alloying addition. The bonding connections are preferably bonding wires. For example, the bonding wires have a round cross-section. Preferably, the cross-sectional diameter is in the range of 100 μηη to 800 μηη, more preferably in the range of 125 μηη to 500 μηη, such as 300 μηι.
Gemäß einer bevorzugten Ausführungsform ist vorgesehen, dass die Bondverbindungen einer Gruppe jeweils einen dritten Bondfuß aufweisen, der im Verlauf der Bondverbindung zwischen dem ersten und den zweiten Bondfüßen und auf einer zur Lastpotenzialfläche isoliert angeordneten Metallisierung des Substrats angeordnet ist. Eine isolierte Anordnung im Sinne der Erfindung bezieht sich auf die Metallisierung an sich und steht damit nicht im Widerspruch zu der durch die Bondverbindung hergestellten elektrischen Verbindung. Anders ausgedrückt, ist bei dieser Ausgestaltung die Metallisierung ausschließlich über wenigstens eine Bondverbindung mit der Lastpotenzialfläche elektrisch verbunden. Aufgrund der sich durch den zusätzlichen Bondfuß ergebenden zusätzlichen Bogenführung ergibt sich eine Verlängerung der betreffenden Bondverbindungen. Dies schafft die Möglichkeit, die unterschiedlichen Gruppen bezüglich der Länge ihrer Bondverbindungen einander anzugleichen. Dabei sorgt der zusätzliche Bondfuß für eine zusätzliche mechanische Stabilisierung der Bondverbindung, ohne dabei aufgrund der Anordnung auf der isolierten Metallisierung die Stromverteilung im Sinne des Grundgedankens der Erfindung negativ zu beeinflussen. Bevorzugt sind die dritten Bondfüße der Gruppe auf einer gemeinsamen Metallisierung des Substrats angeordnet, durch die Verbindung mit dem Substrat ergibt sich unter anderem eine vorteilhafte Kühlung. Beispielsweise sind sie entlang einer gedachten, parallel und beabstandet zu einer Kante des Leistungshalbleiters verlaufenden Linie angeordnet. According to a preferred embodiment, it is provided that the bond connections of a group each have a third bond foot, which is arranged in the course of the bonding connection between the first and the second bond feet and on a isolated to the load potential surface metallization of the substrate. An insulated arrangement in the sense of the invention relates to the metallization per se and is thus not inconsistent with the electrical connection produced by the bond connection. In other words, in this embodiment, the metallization is electrically connected to the load potential area exclusively via at least one bonding connection. by virtue of the additional sheet guide resulting from the additional bond foot results in an extension of the relevant bond connections. This provides the ability to match the different groups with respect to the length of their bonds. In this case, the additional bonding foot provides additional mechanical stabilization of the bond connection, without negatively influencing the current distribution in the sense of the basic idea of the invention due to the arrangement on the isolated metallization. The third bond feet of the group are preferably arranged on a common metallization of the substrate, as a result of the connection with the substrate, among other things, an advantageous cooling. For example, they are arranged along an imaginary line running parallel to and spaced from one edge of the power semiconductor.
Der Begriff „Segmente" im Sinne der Erfindung meint Bereiche, die elektrisch isoliert zueinander angeordnet sind. Beispielsweise handelt es sich um Metallisierungen, deren elektrische Isolierung sich aus der Anordnung auf dem Substrat ergibt, eine sonstige elektrische Verbindung aber nicht ausgeschlossen ist. Eine elektrisch leitende Verbindung ist beispielsweise in einer Ausgestaltung über das Lastanschlussteil hergestellt, dass damit die Funktion der gemeinsamen Laststromab- bzw. -zufuhr von bzw. zu den Segmenten bewirkt. Beispielsweise sind die Segmente parallel beabstandet zu den gegenüberliegenden Kanten des Leistungshalbleiters angeordnet. Das Lastanschlussteil, das der elektrischen und mechanischen Verbindung mit externen Leiterenden und gegebenenfalls der Herausführung der elektrischen Verbindung aus einem Gehäuse des Leistungshalbleitermoduls dient, ist beispielsweise als spiegelsymmetrisch ausgebildeter Bügel ausgebildet. The term "segments" in the sense of the invention means regions which are arranged electrically insulated from one another, for example metallizations whose electrical insulation results from the arrangement on the substrate, but an electrical connection is not excluded For example, in one embodiment, the connection is made via the load connection part, thereby effecting the common load current supply to and from the segments, for example, the segments are arranged parallel spaced from the opposite edges of the power semiconductor electrical and mechanical connection with external conductor ends and possibly the lead out of the electrical connection from a housing of the power semiconductor module is formed, for example, as a mirror-symmetrical trained bracket.
Beispielsweise umfasst das erfindungsgemäße Leistungshalbleitermodul folglich wenigstens ein Anschlussteil, das als symmetrischer Bügel ausgebildet ist und dessen Bügelenden in Berührkontakt, bevorzugt Lötkontakt, mit den zwei Segmenten der Lastpotenzialfläche steht. Beispielsweise ist der Bügel ein Metallformteil, bevorzugt ein Metallformteil aus Kupfer oder einer Kupferlegierung. For example, the power semiconductor module according to the invention consequently comprises at least one connection part, which is designed as a symmetrical bracket and whose strap ends are in touch contact, preferably solder contact, with the two segments of the load potential surface. For example, the bracket is a metal molding, preferably a metal molding of copper or a copper alloy.
Gemäß einer bevorzugten Ausführungsform sind die Bondverbindungen der Gruppen so angeordnet, dass sich bezüglich deren Anordnung eine Spiegelsymmetrie ergibt. Dabei soll nicht ausgeschlossen sein, dass neben den, den erfindungsgemäßen Gruppen zugehörigen Bondverbindungen auch Bondverbindungen vorgesehen sein können, die nicht dieser Symmetrie unterliegen, wie beispielsweise solche, die der Verbindung der Steueranschlüsse des Leistungshalbleiters mit zugehörigen Steuerpotenzialflächen dienen. Gemäß einer bevorzugten Ausgestaltung unterscheiden sich wenigstens zwei Gruppen in der Anzahl der zweiten Bondfüße pro Bondverbindung. Beispielsweise weist eine Gruppe zwei zweite Bondfüße pro Bondverbindung auf, während eine andere Gruppe drei zweite Bondfüße pro Bondverbindung aufweist. Gemäß einer bevorzugten Ausgestaltung ist vorgesehen, dass die Gruppe mit dem größten durch die zugehörigen Bondverbindungen zu überbrückendem Abstand zwischen zugehöriger Lastpotenzialfläche bzw. zugehörigem Lastpotenzialflächensegment und zugehörigem Kontaktflächenbereich bzw. Kontaktflächensegment die geringste Anzahl von zweiten Bondfüßen pro Bondverbindung aufweist. Gemäß einer bevorzugten Ausgestaltung weist der Leistungshalbleiter eine Mindestkantenlänge im Bereich von 8,0 mm bis 50,0 mm, bevorzugt im Bereich von 9,0 bis 25,0 mm, noch bevorzugter im Bereich von 10,0 mm bis 20,0 mm auf. According to a preferred embodiment, the bond connections of the groups are arranged such that a mirror symmetry results with respect to their arrangement. In this case, it should not be ruled out that, in addition to the bonds belonging to the groups according to the invention, it is also possible to provide bonds which are not subject to this symmetry, for example those which serve to connect the control terminals of the power semiconductor to associated control potential areas. According to a preferred embodiment, at least two groups differ in the number of second bond feet per bond connection. For example, one group has two second bond feet per bond connection, while another group has three second bond feet per bond connection. According to a preferred embodiment, it is provided that the group with the largest distance to be bridged by the associated bonding connections between the associated load potential area or associated load potential area segment and associated contact area area or contact area segment has the lowest number of second bond feet per bond connection. According to a preferred embodiment, the power semiconductor has a minimum edge length in the range of 8.0 mm to 50.0 mm, preferably in the range of 9.0 to 25.0 mm, more preferably in the range of 10.0 mm to 20.0 mm ,
Bevorzugt umfasst das Leistungshalbleitermodul ferner ein Gehäuse, beispielsweise ein Gehäuse aus Kunststoff, bevorzugt aus einem faserverstärkten Kunststoff, wie einem faserverstärkten Thermoplast. Bevorzugt ist das Gehäuse als Stülpgehäuse ausgebildet. Preferably, the power semiconductor module further comprises a housing, for example a housing made of plastic, preferably made of a fiber-reinforced plastic, such as a fiber-reinforced thermoplastic. Preferably, the housing is designed as Stülpgehäuse.
Gemäß einer bevorzugten Ausgestaltung umfasst das erfindungsgemäße Leistungshalbleitermodul genau zwei Leistungshalbleiter oder eine Anzahl von Leistungshalbleitern, die dem Vielfachen von zwei entspricht. Beispielsweise ist eine der Anzahl der Leistungshalbleiter entsprechende Anzahl von Substraten vorgesehen. Die Bondverbindungen des ersten Leistungshalbleiters sind in zwei Gruppen aus jeweils mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert und die zweiten Bondfüße jeder Bondverbindung einer Gruppe sind ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment oder Bereich der Anschlussfläche angeordnet. Die Gruppen des ersten Halbleiters unterscheiden sich dahingehend unterscheiden, dass deren ersten Bondfüße auf einem anderen Segment von zwei Segmenten der Lastpotenzialfläche des ersten Leistungshalbleiters angeordnet sind, die jeweils benachbart zu zwei diametral gegenüberliegenden Kanten des ersten Leistungshalbleiters angeordnet sind. Die mit den Bondverbindungen des zweiten Leistungshalbleiters verbundene, genau eine Lastpotenzialfläche des zweiten Leistungshalbleiters ist zwischen dem ersten und zweiten Leistungshalbleiter benachbart zu einer Kante des zweiten Leistungshalbleiters und einer der verbleibenden Kanten des ersten Leistungshalbleiters angeordnet. In einer Ausführungsform ist die Lastpotenzialfläche des zweiten Leistungshalbleiters durch eine Metallisierung des Substrat gebildet, die gleichzeitig in Berührkontakt mit dem ersten Leistungshalbleiter steht und/oder eine dem zweiten Leistungshalbleiter zugehörige weitere Lastpotenzialfläche ausbildet. Dadurch kann eine platzsparende Anordnung der Leistungshalbleiter samt zugehöriger Lastpotenzialflächen bei gleichzeitig gleichmäßiger Stromverteilung erreicht werden. Insbesondere ist so eine symmetrische Anordnung der Lastpotenzialflächen bzw. deren Segmente ermöglicht. Dies hat den Vorteil, dass die zur weiteren Verbindung mit externen Leitern, die beispielsweise außerhalb eines zum erfindungsgemäßen Leistungshalbleitermoduls gehörigen Gehäuses angeordnet sind, regelmäßig verwendeten Anschlussteile ebenfalls symmetrisch ausgelegt werden können, beispielsweise in Bügelform. Dies sorgt nicht nur für eine besonders gleichmäßige Stromverteilung sondern auch für eine vereinfachte Herstellung des erfindungsgemäßen Moduls. According to a preferred embodiment, the power semiconductor module according to the invention comprises exactly two power semiconductors or a number of power semiconductors which corresponds to the multiple of two. For example, a number of substrates corresponding to the number of power semiconductors is provided. The bond connections of the first power semiconductor are arranged in two groups of a plurality of bond connections of the same number of bond feet and the second bond feet of each bond connection of a group are arranged exclusively in a segment or area of the connection area defined by a partial area of the connection area. The groups of the first semiconductor differ in that their first bond legs are disposed on another segment of two segments of the load potential area of the first power semiconductor, which are respectively disposed adjacent two diametrically opposite edges of the first power semiconductor. The exactly one load potential area of the second power semiconductor connected to the bond connections of the second power semiconductor is arranged between the first and second power semiconductors adjacent to an edge of the second power semiconductor and one of the remaining edges of the first power semiconductor. In one embodiment, the load potential area of the second power semiconductor is formed by a metallization of the substrate, which is simultaneously in touch contact with the first power semiconductor and / or one of the second Power semiconductor associated additional load potential area forms. As a result, a space-saving arrangement of the power semiconductors, including associated load potential areas, can be achieved while at the same time having a uniform distribution of current. In particular, a symmetrical arrangement of the load potential areas or their segments is thus made possible. This has the advantage that the connecting parts which are regularly used for further connection to external conductors, which are arranged, for example, outside a housing belonging to the power semiconductor module according to the invention, can also be designed symmetrically, for example in bow form. This not only ensures a particularly uniform current distribution but also for a simplified production of the module according to the invention.
Die Leistungshalbleiter sind aus der Gruppe, umfassend Bipolartransistor, Thyristor, Diode ausgewählt. Bevorzugt handelt es sich bei genau zwei Leistungshalbleitern um eine Paarung unterschiedlicher Leistungshalbleiter. The power semiconductors are selected from the group comprising bipolar transistor, thyristor, diode. Exactly two power semiconductors are preferably a pairing of different power semiconductors.
Die Erfindung betrifft ferner eine Anordnung aus einem Kühlkörper und einem Leistungshalbleitermodul in einer der zuvor beschriebenen Ausführungsformen und mit den entsprechenden zuvor erwähnten technischen Vorzügen. The invention further relates to an arrangement of a heat sink and a power semiconductor module in one of the previously described embodiments and with the corresponding aforementioned technical advantages.
Die Erfindung wird anhand der nachfolgenden Figuren näher erläutert. Die Figuren sind dabei nur beispielhaft zu verstehen und stellen lediglich eine bevorzugte Ausführungsvariante dar. Es zeigen: The invention will be explained in more detail with reference to the following figures. The figures are to be understood only as an example and represent only a preferred embodiment. It shows:
Figur 1 eine Aufsicht auf eine erste Ausführungsform des erfindungsgemäßen Leistungshalbleitermoduls 10; Figure 1 is a plan view of a first embodiment of the power semiconductor module 10 according to the invention;
Figur 2 eine Detailansicht des Leistungshalbleitermoduls aus Figur 1 ; FIG. 2 shows a detailed view of the power semiconductor module from FIG. 1;
Figur 3 eine weitere Detailansicht des Leistungshalbleitermoduls aus Figur 1 ; FIG. 3 shows a further detailed view of the power semiconductor module from FIG. 1;
Figur 4 eine Aufsicht auf eine zweite Ausführungsform des erfindungsgemäßen Leistungshalbleitermoduls 10; FIG. 4 shows a plan view of a second embodiment of the power semiconductor module 10 according to the invention;
Figur 5 eine Aufsicht gemäß Figur 4 unter Wegnahme einiger Bestandteile zur Verdeutlichung des in Figur 4 gezeigten Aufbaus; FIG. 5 shows a plan view according to FIG. 4 with the removal of some components to clarify the structure shown in FIG. 4;
Figur 6 eine Aufsicht gemäß Figur 4 unter Wegnahme anderer Bestandteile zur Verdeutlichung des in Figur 4 gezeigten Aufbaus. Die Figuren 1 bis 3 zeigen eine erste Ausführungsform des erfindungsgemäßen Leistungshalbleitermoduls 10, während die Figuren 4 bis 6 eine zweite Ausführungsform des erfindungsgemäßen Leistungshalbleitermoduls 10 zeigen. Die Module der ersten und zweiten Ausführungsform unterscheiden sich im Wesentlichen durch die verwendeten Leistungshalbleiter 1 , 2 und durch Details der Bondverbindungstruktur insbesondere der des zweiten Leistungshalbleiters 2. Die erste Ausführungsform gemäß den Figuren 1 bis 3 weist zwei Thyristoren als erster Leistungshalbleiter 1 und zweiter Leistungshalbleiter 2 auf, wohingegen die Ausführungsform der Figuren 4 bis 6 zwei Dioden als erster Leistungshalbleiter 1 bzw. zweiter Leistungshalbleiter 2 aufweist. Das Leistungshalbleitermodul 10 der ersten Ausführungsformen weist eine metallische Grundplatte 5 auf, die der Anordnung und Befestigung auf einem nicht gezeigten Kühlkörper dient. Auf der dem Kühlkörper abgewandten Seite der Grundplatte 5 sind zwei elektrisch isolierende Substrate 3, 4 aus Keramik aufgebracht. Auf der der Grundplatte 5 abgewandten Oberfläche des Substrats 3, 4 sind jeweils mehrere Metallisierungen aufgebracht, jeweils eine dient der Befestigung und elektrischen Kontaktierung einer Hauptfläche des darauf angeordneten Leistungshalbleiters 1 , 2. Andere Metallisierungen der Substrate 3, 4 dienen der Bereitstellung von Lastpotenzialflächen 13a, 13b, 23 für die Leistungshalbleiter 1 , 2. Dem ersten Leistungshalbleiter 1 ist dabei unter anderem die aus den beiden Segmenten 13a, 13b gebildete Lastpotenzialfläche zugeordnet. Die Zuordnung der Segmente 13a, 13b zu einer Lastpotenzialfläche ergibt sich durch die gleiche funktionale Beschaltung des Leistungshalbleiters, hier der Kathode des Leistungshalbleiters 1 aber dem entsprechend auch durch die parallele Stromzu- bzw. -abfuhr eines nicht dargestellten Anschlussteils, das bügeiförmig und spiegelsymmetrisch ausgebildet ist und den Leistungshableiter 1 übergreifend angeordnet ist und mit seinen freien Bügelenden auf den Lastpotenzialflächen 13a, 13b aufsitzend mit diesen verlötet ist. Es sind mehrere Bondverbindungen 15, 16 aus Aluminiumbonddrähten oder alternativ Kupferbonddrähten vorgesehen, die zueinander im Wesentlichen parallel angeordnet sind. Jede dieser Bondverbindungen 15, 16 weist einen ersten Bondfuß 31 auf, der sich dadurch auszeichnet, dass er einen Berührkontakt mit einer Lastpotenzialfläche bzw. einem zugehörigen Segment aufweist. Jede dieser Bondverbindungen 15, 16 weist wenigstens zwei, hier drei zweite Bondfüße 32 auf, die sich dadurch auszeichnen, dass sie auf einer Anschlussfläche 1 1 bzw. einem zugehörigen Bereich oder wie hier einem Segment 12a, 12b der Anschlussfläche 1 1 angeordnet sind. Sämtliche nachfolgend beschriebene Bondfüße 31 , 32, 33 sind durch US-Wedge-Wedge- Bonden mit der jeweils durch die Bondverbindung berührten Metallisierung verbunden. Die Segmente 12a und 12b werden aufgrund der funktionellen Beschaltung des Leistungshalbleiters 1 auch zu einer Anschlussfläche 1 1 hier der Kathodenanschlussfläche zusammengefasst. Auf die Bezeichnung jedes ersten 31 und zweiten 32 Bondfußes in den Figuren wurde zu Gunsten einer Übersichtlichkeit verzichtet. Zwischen den Bondfüßen 31 , 32 bilden die Bondverbindungen Bögen aus, die in der Figur 3 bezüglich der Bondverbindungen des ersten Leistungshalbleiters 1 deutlicher gezeigt sind. Die Bondverbindungen der Gruppen 15 und 16 zeichnen sich dadurch aus, dass sie alle die gleiche Anzahl von zweiten Bondfüßen 32 aufweisen und ein auf der Kontaktfläche 1 1 liegendes Ende aufweisen. Demzufolge würde eine nicht dargestellte Bondverbindung, die sich ausgehend von einem Lastpotenzialflächensegment 13a unter Ausbildung mehrerer zweiter Bondfüße 32 auf der Anschlussfläche 1 1 , jedoch ohne darauf zu enden, und zu dem anderen Lastpotenzialflächensegment 13b erstreckt, um auch dazu enden, nicht als eine erfindungsgemäße und damit zu einer der Gruppen gehörige Bondverbindung angesehen. Die Differenzierung und Aufteilung der Bondverbindungen 15 und 16 in Gruppen ergibt sich einerseits dadurch, dass die Bondverbindungen einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment, nämlich 12a bzw. 12b der Anschlussfläche 1 1 angeordnet sind und andererseits dadurch, dass deren erste Bondfüße 31 auf einem anderen Segment 13a bzw. 13b der Lastpotenzialfläche angeordnet sind. Es hat sich gezeigt, dass die erfindungsgemäß parallele und verästelnde Stromzu- bzw.-abfuhr und im besten Fall wie hier sich bis zu den Segmenten der Anschlussfläche sich erstreckende Verästelung sich vorteilhaft auf die Stromverteilung auswirkt, insbesondere im Vergleich zu einer bis dahin bekannten, über die mehreren Segmente der Anschlussfläche sich erstreckende Bondverbindung. Die Anordnung der zweiten Bondfüße 32 der Bondverbindungen des Leistungshalbleiters 1 weisen eine Spiegelsymmetrie entlang einer Achse 44 auf. FIG. 6 shows a plan view according to FIG. 4 with the removal of other components for clarification of the construction shown in FIG. FIGS. 1 to 3 show a first embodiment of the power semiconductor module 10 according to the invention, while FIGS. 4 to 6 show a second embodiment of the power semiconductor module 10 according to the invention. The modules of the first and second embodiments differ essentially by the power semiconductors 1, 2 used and by details of the bonding connection structure, in particular that of the second power semiconductor 2. The first embodiment according to FIGS. 1 to 3 has two thyristors as first power semiconductor 1 and second power semiconductor 2 whereas the embodiment of FIGS. 4 to 6 has two diodes as first power semiconductor 1 and second power semiconductor 2, respectively. The power semiconductor module 10 of the first embodiment has a metallic base plate 5, which serves the arrangement and mounting on a heat sink, not shown. On the side facing away from the heat sink of the base plate 5, two electrically insulating substrates 3, 4 are applied from ceramic. A plurality of metallizations are respectively applied to the surface of the substrate 3, 4 facing away from the base plate 5, one each serves to attach and electrically contact a main surface of the power semiconductor 1, 2 arranged thereon. Other metallizations of the substrates 3, 4 serve to provide load potential surfaces 13a, 13b, 23 for the power semiconductors 1, 2. The first power semiconductor 1 is assigned, among other things, the load potential area formed by the two segments 13a, 13b. The assignment of the segments 13a, 13b to a load potential surface results from the same functional wiring of the power semiconductor, here the cathode of the power semiconductor 1 but also correspondingly by the parallel Stromzu- or -abfuhr a connector, not shown, which is bow-shaped and mirror-symmetrical and the Leistungshableiter 1 is arranged across and is soldered with its free strap ends on the load potential surfaces 13a, 13b seated with this. A plurality of bond connections 15, 16 made of aluminum bonding wires or alternatively copper bonding wires are provided, which are arranged substantially parallel to one another. Each of these bond connections 15, 16 has a first bonding foot 31, which is characterized in that it has a contact contact with a load potential surface or an associated segment. Each of these bonding connections 15, 16 has at least two, here three second, bonding feet 32, which are characterized in that they are arranged on a connection surface 11 or an associated region or as here a segment 12a, 12b of the connection surface 11. All of the subsequently described bond feet 31, 32, 33 are connected by US wedge-wedges with the metallization touched by the bond. The segments 12a and 12b are also due to the functional wiring of the power semiconductor 1 to a pad 1 1 here the cathode pad summarized. The description of each first 31 and second 32 Bondfußes in the figures has been omitted for the sake of clarity. Between the bond feet 31, 32, the bonds form bows, which are shown more clearly in FIG. 3 with respect to the bond connections of the first power semiconductor 1. The bond connections of the groups 15 and 16 are characterized in that they all have the same number of second bond feet 32 and have an end lying on the contact surface 11. Accordingly, a non-illustrated bond that extends from a load potential surface segment 13a to form a plurality of second bond legs 32 on the land 1 1 but without terminating thereon and to the other load potential surface segment 13b would also end up not as an inventive and thus considered to one of the groups associated bond. The differentiation and division of the bond connections 15 and 16 into groups results, on the one hand, from the fact that the bond connections of a group are arranged exclusively in a segment defined by a partial surface of the connection surface, namely 12a or 12b of the connection surface 11 and, on the other hand, in that the first Bonded feet 31 are arranged on another segment 13a and 13b of the load potential surface. It has been found that the invention parallel and ramifying current supply and discharge and in the best case as here extending to the segments of the pad extending branching has an advantageous effect on the power distribution, in particular compared to a previously known, about the plurality of segments of the pad extending bond connection. The arrangement of the second bond feet 32 of the bond connections of the power semiconductor 1 have a mirror symmetry along an axis 44.
Die erfindungsgemäße Ausgestaltung betrifft insbesondere den zweiten Leistungshalbleiter 2, der auf dem weiteren Substrat 4 angeordnet ist. Die konkrete Ausbildung dessen Bondverbindungen 25, 26 sind im Detail in Figur 2 zu erkennen. Es handelt sich bei dem Leistungshalbleiter 2 ebenfalls um einen Thyristor. Auch hier sind die mehreren Bondverbindungen 25, 26 in wenigstens zwei Gruppen 25 bzw. 26 aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen 31 und 32 arrangiert und die zweiten Bondfüße 32 jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine in sich geschlossene, gemeinsame Teilfläche der Anschlussfläche definierten Segment 22a bzw. 22b der Anschlussfläche 21 angeordnet. Die Gruppen unterscheiden sich dahingehend, dass deren erste Bondfüße 31 in einem unterschiedlichen, aber innerhalb jeder Gruppe übereinstimmenden Abstand ai bzw. a2 zum Leistungshalbleiter (2) auf der zugehörigen, hier auf dem Substrat 3 befindlichen Lastpotenzialfläche 23 angeordnet sind. Hier ist der Abstand a2 derjenigen Gruppe 26, deren zugehöriges Segment 22a räumlich näher zur betreffenden Lastpotenzialfläche 23 angeordnet ist, größer gewählt als der Abstand a1 derjenigen Gruppe 25 deren zugehöriges Segment 22b räumlich weiter entfernt zur betreffenden Lastpotenzialfläche angeordnet ist, wodurch sich wenigstens annähernd eine Übereinstimmung in der Länge der Bondverbindungen 25, 26 ergibt. The embodiment according to the invention particularly relates to the second power semiconductor 2, which is arranged on the further substrate 4. The specific embodiment of the bonding connections 25, 26 can be seen in detail in FIG. It is in the power semiconductor 2 is also a thyristor. Here, too, the plurality of bond connections 25, 26 are arranged in at least two groups 25 and 26 of a plurality of bond connections of the same number of bond feet 31 and 32 and the second bond feet 32 of each bond connection of a group exclusively in one by a self-contained, common partial surface of the connection surface defined segment 22a and 22b of the pad 21 are arranged. The groups differ in that their first bond feet 31 are arranged in a different, but within each group, matching distance ai or a 2 to the power semiconductor (2) on the associated load potential area 23 located here on the substrate 3. Here, the distance a2 of that group 26, whose associated segment 22a is arranged spatially closer to the relevant load potential area 23, is chosen to be greater than the distance a1 of that group 25 whose associated segment 22b is arranged spatially farther away to the respective load potential surface, resulting in at least approximately a match in the length of the bonds 25, 26 results.
Das in den Figuren 4 bis 6 gezeigte Leistungshalbleitermodul 10 der zweiten Ausführungsformen weist eine metallische Grundplatte 5 auf, die der Anordnung und Befestigung auf einem nicht gezeigten Kühlkörper dient. Auf der dem Kühlkörper abgewandten Seite der Grundplatte 5 sind zwei elektrisch isolierende Substrate 3, 4 aus Keramik aufgebracht. Auf der der Grundplatte 5 abgewandten Oberfläche des Substrats 3, 4 sind jeweils mehrere Metallisierungen aufgebracht, jeweils eine dient der Befestigung und elektrischen Kontaktierung einer Hauptfläche des darauf angeordneten Leistungshalbleiters 1 , 2, bei denen sich jeweils wie oben erwähnt um eine Leistungsdiode handelt. Andere Metallisierungen der Substrate 3, 4 dienen der Bereitstellung von Lastpotenzialflächen 13a, 13b, 23 für die Leistungshalbleiter 1 , 2. Dem Leistungshalbleiter 1 ist dabei unter anderem die aus den beiden Segmenten 13a, 13b gebildete Lastpotenzialfläche zugeordnet. Die Zuordnung der Segmente 13a, 13b zu einer Lastpotenzialfläche ergibt sich durch die gleiche funktionale Beschaltung des Leistungshalbleiters, hier dem Anodenanschluss des Leistungshalbleiters 1 , aber dem entsprechend auch durch die parallele Stromzu- bzw. - abfuhr eines nicht dargestellten Anschlussteils, das bügeiförmig und spiegelsymmetrisch ausgebildet ist und den Leistungshableiter 1 übergreifend angeordnet ist und mit seinen freien Bügelenden auf den Lastpotenzialflächen 13a, 13b aufsitzend mit diesen verlötet ist. Es sind mehrere Bondverbindungen 15, 16 aus Aluminiumbonddrähten oder alternativ Kupferbonddrähte vorgesehen, die zueinander im Wesentlichen parallel angeordnet sind. Jede dieser Bondverbindungen 15, 16 weist einen ersten Bondfuß 31 auf, der sich dadurch auszeichnet, dass er einen Berührkontakt mit einer Lastpotenzialfläche bzw. einem zugehörigen Segment 13a bzw. 13b aufweist. Jede dieser Bondverbindungen 15, 16 weist wenigstens zwei, hier drei zweite Bondfüße 32 auf, die sich dadurch auszeichnen, dass sie auf einer Anschlussfläche 1 1 bzw. einem zugehörigen Bereich 12a, 12b der Anschlussfläche 1 1 angeordnet sind. Die Bereiche 12a und 12b sind hier durch strichgepunktete Linien voneinander unterschieden, eine Segmentierung ist nicht vorhanden sondern die Anschlussfläche 1 1 ist im Gegensatz zu der des Leistungshalbleiters 1 der ersten Ausführungsform durch eine durchgehende Metallisierung definiert. Auf die Bezeichnung jedes ersten 31 und zweiten 32 Bondfußes in den Figuren wurde zu Gunsten einer Übersichtlichkeit verzichtet. Zwischen den Bondfüßen 31 , 32 bilden die Bondverbindungen Bögen aus. Die Bondverbindungen der Gruppen 15 und 16 zeichnen sich dadurch aus, dass sie alle die gleiche Anzahl von zweiten Bondfüßen 32 aufweisen und ein auf der Kontaktfläche 1 1 liegendes Ende aufweisen. Die Differenzierung und Aufteilung der Bondverbindungen 15 und 16 in Gruppen ergibt sich einerseits dadurch, dass die Bondverbindungen einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Bereich, nämlich 12a bzw. 12b der Anschlussfläche 1 1 angeordnet sind und andererseits dadurch, dass deren erste Bondfüße 31 auf einem anderen Segment 13a bzw. 13b der Lastpotenzialfläche angeordnet sind. Es hat sich gezeigt, dass die erfindungsgemäß parallele und verästelnde Stromzu- bzw.-abfuhr und im besten Fall wie hier sich bis zu den Segmenten der Anschlussfläche sich erstreckende Verästelung sich vorteilhaft auf die Stromverteilung auswirkt, insbesondere im Vergleich zu einer bis dahin bekannten, über die mehreren Segmente der Anschlussfläche sich erstreckende Bondverbindung. Die erfindungsgemäße Ausgestaltung der Bondverbindung betrifft insbesondere den zweiten Leistungshalbleiter 2 der auf dem weiteren Substrat 4 angeordnet ist. Die konkrete Ausbildung dessen Bondverbindungen 25, 26 sind im Detail in Figur 5 zu erkennen und hier an der jeweils exemplarisch dargestellten Bondverbindungen 25 bzw. 26 verdeutlicht. Es handelt sich bei dem Leistungshalbleiter 2 ebenfalls um eine Diode. Auch hier sind die mehreren Bondverbindungen 25, 26 in wenigstens zwei Gruppen 25 bzw. 26 aus mehreren Bondverbindungen jeweils gleicher Anzahl von Bondfüßen 31 und 32 arrangiert und die zweiten Bondfüße 32 jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine gemeinsame in sich geschlossene Teilfläche der Anschlussfläche definierten Bereich 22a bzw. 22b der Anschlussfläche 21 angeordnet. Wie in Figur 5 aber durch Weglassen von Teilen der Bondverbindungen 25, 26 verdeutlicht werden soll, unterscheiden sich die Gruppen in der Anzahl der Bondfüße. Während die Gruppe 25 insgesamt 3 Bondfüße und davon lediglich zwei zweite Bondfüße 32 aufweist, weist die Gruppe 26 insgesamt 5 Bondfüße und davon 3 zweite Bondfüße auf. Darüber hinaus ist zwischen den zweiten, auf der Anschlussfläche 21 befindlichen Bondfüße 32 und dem auf der Lastpotenzialfläche 23 befindlichen, ersten Bondfuß 31 jeweils ein dritter Bondfuß 33 vorgesehen, der auf einer zur Lastpotenzialfläche 23 und zur Anschlussfläche 21 elektrisch isoliert auf dem Substrat 4 angeordneten Metallisierung 30 angeordnet ist. Nur eine Gruppe 26 weist dritte Bondfüße 33 in ihren Bondverbindungen auf, die alle auf einer geschlossenen Fläche der Metallisierung 30, angeordnet sind. Die Bondverbindungen der zwei Gruppen unterscheiden sich dahingehend ferner, dass deren erste Bondfüße 31 in einem unterschiedlichen, aber innerhalb jeder Gruppe übereinstimmenden Abstand ai bzw. a2 zum Leistungshalbleiter 2 auf der zugehörigen, hier auf dem Substrat 3 befindlichen Lastpotenzialfläche 23 angeordnet sind. Hier ist der Abstand a2 derjenigen Gruppe 26, deren zugehöriges Segment 22a räumlich näher zur betreffenden Lastpotenzialfläche 23 angeordnet ist, größer gewählt als der Abstand a1 derjenigen Gruppe 25 deren zugehöriges Segment 22b räumlich weiter entfernt zur betreffenden Lastpotenzialfläche angeordnet ist, wodurch sich in Zusammenwirken mit dem Merkmal der unterscheidenden Anzahl zweiter Bondfüße 32 und dem zusätzlichen dritten Bondfuß 33 wenigstens annähernd eine Übereinstimmung in der Länge der Bondverbindungen 25, 26 ergibt. Anhand der Figuren 5 und 6 soll verdeutlicht werden, dass die zu dem zweiten Leistungshalbleiter 2 gehörige Lastpotenzialfläche 23 zwischen den Leistungshalbleitern 1 und 2 parallel zu deren Kanten verlaufend angeordnet ist, während die für die dritten Bondfüße 33 vorgesehene Metallisierung 30 sich parallel beabstandet zwischen der Lastpotenzialfläche 23 und der Kante des zweiten Leistungshalbleiters 2 erstreckt. Die Lastpotenzialfläche 23 wird dabei durch eine Metallisierung definiert, die sich unter dem ersten Leistungshalbleiter 1 , diesen dabei an seiner dem Substrat 3 zugewandten Hauptfläche kontaktierend, bis auf die andere Seite erstreckt, um dort eine Anschlussfläche 14 und Lötfläche für ein nicht dargestelltes Anschlussteil zu definieren. The power semiconductor module 10 of the second embodiment shown in FIGS. 4 to 6 has a metallic base plate 5, which serves for the arrangement and mounting on a heat sink (not shown). On the side facing away from the heat sink of the base plate 5, two electrically insulating substrates 3, 4 are applied from ceramic. On the base plate 5 facing away from the surface of the substrate 3, 4 each have a plurality of metallizations are applied, each one serves the attachment and electrical contacting of a major surface of the power semiconductor 1, 2 arranged thereon, each of which is a power diode as mentioned above. Other metallizations of the substrates 3, 4 serve to provide load potential areas 13a, 13b, 23 for the power semiconductors 1, 2. The power semiconductor 1 is assigned, inter alia, the load potential area formed by the two segments 13a, 13b. The assignment of the segments 13a, 13b to a load potential area results from the same functional wiring of the power semiconductor, in this case the anode terminal of the power semiconductor 1, but also correspondingly by the parallel current supply or removal of a connection part, not shown, which is bow-shaped and mirror-symmetrical is and the Leistungshableiter 1 is arranged across and is soldered with its free bracket ends on the load potential surfaces 13a, 13b seated with this. There are a plurality of bonding connections 15, 16 made of aluminum bonding wires or alternatively copper bonding wires, which are arranged substantially parallel to one another. Each of these bond connections 15, 16 has a first bonding foot 31, which is characterized in that it has a contact contact with a load potential surface or an associated segment 13a or 13b. Each of these bonding connections 15, 16 has at least two, here three second, bonding feet 32, which are characterized in that they are arranged on a connection surface 11 or an associated region 12a, 12b of the connection surface 11. The areas 12a and 12b are here distinguished from each other by dotted lines, a segmentation is not present but the pad 1 1 is defined in contrast to that of the power semiconductor 1 of the first embodiment by a continuous metallization. The description of each first 31 and second 32 Bondfußes in the figures has been omitted for the sake of clarity. Between the bond feet 31, 32, the bonds form bows. The bond connections of the groups 15 and 16 are characterized in that they all have the same number of second bond feet 32 and have an end lying on the contact surface 11. The differentiation and division of the bonds 15 and 16 in groups results on the one hand in that the Bond connections of a group exclusively in a defined by a partial surface of the pad area, namely 12a and 12b of the pad 1 1 are arranged and on the other hand in that their first bond feet 31 are arranged on another segment 13a and 13b of the load potential surface. It has been found that the invention parallel and ramifying current supply and discharge and in the best case as here extending to the segments of the pad extending branching has an advantageous effect on the power distribution, in particular compared to a previously known, about the plurality of segments of the pad extending bond connection. The inventive design of the bond relates in particular to the second power semiconductor 2 which is arranged on the further substrate 4. The specific embodiment of the bonding connections 25, 26 can be seen in detail in FIG. 5 and illustrated here by the bonding connections 25 and 26 shown by way of example. It is in the power semiconductor 2 is also a diode. Here, too, the plurality of bond connections 25, 26 are arranged in at least two groups 25 and 26 of a plurality of bond connections of the same number of bond feet 31 and 32, and the second bond feet 32 of each bond connection of a group exclusively in one by a common self-contained partial surface of the pad defined region 22a and 22b of the pad 21 is arranged. However, as should be clarified in FIG. 5 by omitting parts of the bonding connections 25, 26, the groups differ in the number of bond feet. While the group 25 has a total of 3 bond feet and only two second bond feet 32 thereof, the group 26 has a total of 5 bond feet and of which 3 second bond feet. In addition, a third bonding foot 33 is provided in each case between the second bonding feet 32 located on the connection surface 21 and the first bonding foot 31 located on the load potential surface 23, said metallization being arranged on a metallization which is electrically insulated on the substrate 4 for the load potential surface 23 and the connection surface 21 30 is arranged. Only one group 26 has third bond feet 33 in their bonds, all of which are arranged on a closed surface of the metallization 30. The bond connections of the two groups also differ in that their first bond feet 31 are arranged at a different distance ai and / or a 2 to the power semiconductor 2 matching within each group on the associated load potential area 23 located here on the substrate 3. Here, the distance a2 of that group 26, whose associated segment 22a is arranged spatially closer to the relevant load potential area 23, is chosen to be greater than the distance a1 of that group 25 whose associated segment 22b is spatially farther away from the relevant one Load potential surface is arranged, which results in at least approximately a match in the length of the bonds 25, 26 in cooperation with the feature of the differing number of second bond feet 32 and the additional third Bondfuß 33. It should be clarified with reference to FIGS. 5 and 6 that the load potential area 23 belonging to the second power semiconductor 2 is arranged running parallel to the edges between the power semiconductors 1 and 2, while the metallization 30 provided for the third bond feet 33 is spaced parallel between the load potential area 23 and the edge of the second power semiconductor 2 extends. The load potential area 23 is defined by a metallization, which extends below the first power semiconductor 1, contacting it on its main surface facing the substrate 3, to the other side, in order to define a connection area 14 and soldering area for a connection part (not shown) ,

Claims

Ansprüche: Claims:
1. Leistungshalbleitermodul (10) aufweisend: wenigstens ein Substrat (4); wenigstens einen auf dem Substrat (4) angeordneten Leistungshalbleiter (2), der auf seiner dem Substrat abgewandten Seite eine Anschlussfläche (21 ) aufweist; eine auf dem Substrat (4) neben dem Leistungshalbleiter (2) angeordnete, gegebenenfalls segmentierte Lastpotenzialfläche (23); mehrere Bondverbindungen (25, 26) zur parallelen elektrisch leitenden Verbindung der Anschlussfläche (21 ) mit der Lastpotenzialfläche (23), wobei jede Bondverbindung (25, 26) wenigstens einen ersten Bondfuß (31 ) auf der Lastpotenzialfläche (23) und mehrere zweite Bondfüße (32) auf der A power semiconductor module (10) comprising: at least one substrate (4); at least one power semiconductor (2) arranged on the substrate (4), which has a connection area (21) on its side facing away from the substrate; an optionally segmented load potential area (23) arranged on the substrate (4) next to the power semiconductor (2); a plurality of bonding connections (25, 26) for the parallel electrically conductive connection of the connection surface (21) to the load potential surface (23), each bond connection (25, 26) comprising at least one first bonding foot (31) on the load potential surface (23) and a plurality of second bonding feet ( 32) on the
Anschlussfläche (21 ) aufweist und wobei jede Bondverbindung (25, 26) auf der Anschlussfläche (21 ) wenigstens ein Ende aufweist, wobei die mehreren Bondverbindungen (25, 26) in wenigstens zwei Gruppen (25 bzw. 26) aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert sind und die zweiten Bondfüße (32) jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche definierten Segment oder Bereich (22a bzw. 22b) der Anschlussfläche (21 ) angeordnet sind und die Gruppen sich dahingehend unterscheiden, dass deren erste Bondfüße (31 ) in einem unterschiedlichen, bevorzugt aber innerhalb jeder Gruppe übereinstimmenden, Abstand (ai bzw. a2) zum Leistungshalbleiter (2) auf der Lastpotenzialfläche (23) angeordnet sind. Terminal surface (21) and wherein each bonding connection (25, 26) on the connection surface (21) has at least one end, wherein the plurality of bonding connections (25, 26) in at least two groups (25 or 26) of a plurality of bonding connections of the same number of Bonded feet are arranged and the second bond feet (32) of each bond of a group exclusively in a defined by a partial surface of the pad segment or region (22a or 22b) of the pad (21) are arranged and the groups differ in that their first bond feet (31) in a different, but preferably within each group matching, distance (ai or a 2 ) to the power semiconductor (2) on the load potential surface (23) are arranged.
2. Leistungshalbleitermodul (10) gemäß dem vorhergehenden Anspruch, wobei die zweiten Bondfüße (31 ) jeder Bondverbindung pro Gruppe (25 bzw. 26) ausschließlich in genau einer gemeinsamen Teilfläche der Anschlussfläche (21 ) angeordnet sind. 2. power semiconductor module (10) according to the preceding claim, wherein the second bond feet (31) of each bond connection per group (25 or 26) are arranged exclusively in exactly one common partial surface of the pad (21).
3. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei die gemeinsame Teilfläche in sich geschlossen ist. 3. power semiconductor module (10) according to one of the preceding claims, wherein the common partial surface is closed in itself.
4. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei sich die Bondverbindungen einer Gruppe (25 bzw. 26) in der Länge nicht wesentlich unterscheiden. 4. power semiconductor module (10) according to one of the preceding claims, wherein the bond connections of a group (25 or 26) does not differ significantly in length.
5. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei die Bondverbindungen (26) wenigstens einer Gruppe jeweils einen dritten Bondfuß (33) aufweisen, der im Verlauf der Bondverbindung (26) zwischen dem ersten Bondfuß (31 ) und den zweiten Bondfüßen (32) und auf einer zur 5. power semiconductor module (10) according to any one of the preceding claims, wherein the bonding connections (26) of at least one group each have a third bonding foot (33) in the course of the bonding connection (26) between the first bonding foot (31) and the second bonding feet ( 32) and on one to
Lastpotenzialfläche (23) elektrisch isoliert auf dem Substrat (4) angeordneten Metallisierung (30) angeordnet ist.  Load potential surface (23) electrically isolated on the substrate (4) arranged metallization (30) is arranged.
6. Leistungshalbleitermodul (10) gemäß dem vorhergehenden Anspruch, wobei die dritten Bondfüße (33) der Gruppe (26) auf einer gemeinsamen Metallisierung (30) angeordnet sind. 6. power semiconductor module (10) according to the preceding claim, wherein the third bonding feet (33) of the group (26) on a common metallization (30) are arranged.
7. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei die Bondverbindungen (25, 26) Bonddrähte sind. 7. power semiconductor module (10) according to any one of the preceding claims, wherein the bonding connections (25, 26) are bonding wires.
8. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei die zweiten Bondfüße (32) einer Gruppe (15 bzw. 16) in einem 8. power semiconductor module (10) according to one of the preceding claims, wherein the second bonding feet (32) of a group (15 or 16) in a
regelmäßigen Muster angeordnet sind.  regular patterns are arranged.
9. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei sich wenigstens zwei der Gruppen (25 bzw. 26) in der Anzahl der zweiten Bondfüße (32) pro Bondverbindung unterscheiden. 9. power semiconductor module (10) according to one of the preceding claims, wherein differ at least two of the groups (25 or 26) in the number of second bonding feet (32) per bond.
10. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei der Leistungshalbleiter eine Mindestkantenlänge im Bereich von 8,0 mm bis 50,0 mm, bevorzugt im Bereich von 9,0 bis 25,0 mm, noch bevorzugter im Bereich von 10,0 mm bis 20,0 mm aufweist. 10. power semiconductor module (10) according to any one of the preceding claims, wherein the power semiconductor has a minimum edge length in the range of 8.0 mm to 50.0 mm, preferably in the range of 9.0 to 25.0 mm, more preferably in the range of 10, 0 mm to 20.0 mm.
11. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei pro Gruppe 15 bis 50 Bondverbindungen, bevorzugt 16 bis 30, vorgesehen sind. 11. Power semiconductor module (10) according to one of the preceding claims, wherein per group 15 to 50 bonds, preferably 16 to 30, are provided.
12. Leistungshalbleitermodul (10) gemäß einem der vorhergehenden Ansprüche, wobei der Leistungshalbleiter (2) und die zugehörige Lastpotenzialfläche (23) auf einem Keramiksubstrat (4) angeordnet sind. 12. The power semiconductor module according to claim 1, wherein the power semiconductor and the associated load potential area are arranged on a ceramic substrate.
13. Leistungshalbleitermodul gemäß einem der vorhergehenden Ansprüche, wobei der Leistungshalbleiter (2) eine Diode, ein Transistor oder ein Thyristor ist. 13. Power semiconductor module according to one of the preceding claims, wherein the power semiconductor (2) is a diode, a transistor or a thyristor.
14. Leistungshalbleitermodul gemäß einem der vorhergehenden Ansprüche, mit genau zwei Leistungshalbleitern (1 ,2) oder einer Anzahl von Leistungshalbleitern, die dem Vielfachen von Zwei entspricht, wobei die Bondverbindungen (15, 16) des ersten Leistungshalbleiters (1 ) in zwei Gruppen (15 bzw. 16) aus mehreren Bondverbindungen gleicher Anzahl von Bondfüßen arrangiert sind und die zweiten Bondfüße (32) jeder Bondverbindung einer Gruppe ausschließlich in einem durch eine Teilfläche der Anschlussfläche (1 1 ) definierten Segment oder Bereich (12a bzw. 12b) der Anschlussfläche (1 1 ) angeordnet und die Gruppen (15 bzw. 16) des ersten Halbleiters (1 ) sich dahingehend unterscheiden, dass deren ersten Bondfüße (31 ) auf einem anderen Segment (15, 16) von zwei Segmenten (13a, 13b) der Lastpotenzialfläche des ersten Leistungshalbleiters (1 ) angeordnet sind, die jeweils benachbart zu zwei diametral gegenüberliegenden Kanten des ersten Leistungshalbleiters (1 ) angeordnet sind und die mit den 14. Power semiconductor module according to one of the preceding claims, with exactly two power semiconductors (1, 2) or a number of power semiconductors, which corresponds to the multiple of two, wherein the bonding connections (15, 16) of the first power semiconductor (1) in two groups (15 or 16) are arranged from a plurality of bond connections of the same number of bond feet, and the second bond feet (32) of each bond connection of a group exclusively in a segment or region (12a or 12b) of the connection surface (1) defined by a partial surface of the connection surface (11) 1) and the groups (15 or 16) of the first semiconductor (1) differ in that their first bond feet (31) on another segment (15, 16) of two segments (13a, 13b) of the load potential surface of the first Power semiconductor (1) are arranged, which are each adjacent to two diametrically opposite edges of the first power semiconductor (1) are arranged u nd the with the
Bondverbindungen (25, 26) des zweiten Leistungshalbleiters (2) verbundene, genau eine Lastpotenzialfläche (23) zwischen dem ersten (1 ) und zweiten (2) Leistungshalbleiter benachbart zu einer Kante des zweiten Leistungshalbleiters (2) und einer der verbleibenden Kanten des ersten Leistungshalbleiters (1 ) angeordnet ist.  Bond connections (25, 26) of the second power semiconductor (2) connected to exactly one load potential surface (23) between the first (1) and second (2) power semiconductor adjacent to an edge of the second power semiconductor (2) and one of the remaining edges of the first power semiconductor (1) is arranged.
EP16708666.9A 2015-03-12 2016-03-08 Power semiconductor module with improved bonding connection structure Pending EP3268989A1 (en)

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