CN107210281B - Power semiconductor module with improved bonding connection structure - Google Patents

Power semiconductor module with improved bonding connection structure Download PDF

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Publication number
CN107210281B
CN107210281B CN201680009758.9A CN201680009758A CN107210281B CN 107210281 B CN107210281 B CN 107210281B CN 201680009758 A CN201680009758 A CN 201680009758A CN 107210281 B CN107210281 B CN 107210281B
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power semiconductor
bond
bonding
connection
groups
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CN107210281A (en
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R·皮尔默
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Infineon Technology Bipolar Co ltd
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Infineon Technologies Bipolar GmbH and Co KG
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Abstract

The invention relates to power semiconductor modules (10) having at least substrates (4), at least power semiconductors (2) which are arranged on the substrates (4) and have a connection surface (21) on their side facing away from the substrates, a load potential surface (23) which is arranged on the substrates (4) next to the power semiconductors (2) and is divided if necessary, a plurality of bonding connections (25, 26) for the parallel electrically conductive connection of the connection surface (21) to the load potential surface (23), wherein each bonding connection (25, 26) has at least bonding feet (31) on the load potential surface (23) and a plurality of second bonding feet (32) on the connection surface (21), and wherein each bonding connection (25, 26) has at least ends on the connection surface (21), wherein the plurality of bonding connections (25, 26) are arranged in at least two groups, a group consisting of a plurality of bonding feet in the same number, and wherein each bonding connection (25, 26) has only one connection surface (22 a) or a connection surface (22) which is arranged in a different distance apart from the bonding connection surface (23), and wherein the bonding connections (25, 26) are arranged in each connection surface (22) in a different group () and wherein the group (22) of the plurality of bonding connections (25, 26) are arranged in at least two groups, preferably in a connection groups (22) and/365) of the connection surfaces (31) and/365) are arranged in a connection groups1Or a2)。

Description

Power semiconductor module with improved bonding connection structure
The present invention relates to power semiconductor modules, which are semiconductor assemblies that are used in power electronic circuits, which are commonly used in automotive and industrial applications, such as in inverters and rectifiers, semiconductor components (which are included in power semiconductor modules) are typically either IGBT (insulated gate bipolar transistor) semiconductor chips or MOSFET (metal oxide semiconductor-field effect transistor) semiconductor chips.
For higher power applications, power semiconductor modules usually have or more power semiconductor assemblies, also abbreviated below as power semiconductors, on a single substrate, the substrate usually having at least insulating ceramic substrates, for example Al2O3、AlN、Si3N4At least surfaces of the ceramic substrate are either coated with pure copper, pure aluminum or copper, aluminum or other suitable materials for metal plating, the power semiconductors arranged and usually soldered on are switched on in the side and a potential surface, in particular a load potential surface, is provided in the other side, the potential surface side is used for the supply or discharge of current to or from the power semiconductors via a so-called bonding connection, and the other side is used for mechanical fixing and electrical connection to a coupling for the supply or discharge of current to or from the module, in particular from the housing, so that, for example, the latter is connected to an external conductor outside the housing, for example by means of a screw bolt.
In order to electrically connect the potential surfaces to at least connection surfaces of the power semiconductor concerned facing away from the substrate, bonding connections (also called wire bonding connections) in the form of bonding wires or bonding strips (also called ribbon bonding connections) are usually provided, which produce an electrically conductive contact between the potential surfaces and the connection surfaces of the semiconductor, different process variants for producing a connection between a bonding connection and a connection surface in the field of power electronics are pure (99.99% aluminum or higher) aluminum and copper materials for the bonding connections, , and , thermal compression bonding (abbreviated to TC bonding), thermal ball wedge bonding (TS-bonding), and ultrasonic wedge bonding (US-bonding), and , the contact regions respectively produced between a bonding connection and a connection surface, and a bonding connection and a connection surface being called bond feet.
The demand for such power semiconductor modules and the power semiconductor components necessary for their construction and thus the production capacity have continued to increase over the last few years. For example, the current intensity per unit area of the semiconductor element increases. Furthermore, due to economic necessity, semiconductor components are always operated close to their power limit.
External factors that are decisive for the performance of the power semiconductor module or power semiconductor component are the heat dissipation and the input and output of the current. The prior art in the input and output of currents to and from semiconductor elements is bond connections in various embodiments, for example as wire bond connections or as ribbon bond connections. In the case of power semiconductors with high-current loads, thick wires or thick wire-strips with a diameter of between 100 μm and 500 μm are used. The cross-section of which is insufficient to provide a regular plurality of parallel keyed connections. The invention is directed to the performance of such a keyed connection.
For example, from document DE19549011a1, a wire bond connection for power semiconductor components is known, in which a power semiconductor component is arranged on a substrate by means of a soldered connection, the soldered connection of the second main surface of the power semiconductor component forms part of the current input and output, further current connections are produced by means of a wire bond connection between the metallization of the main surface of the power semiconductor component providing the connection surface and the load potential surface.
According to the prior art, power semiconductor components are not only used for switching on the supply current by means of a single bond wire arranged next to one another, but often also two or more bond wires which at least partially overlap in the direction of the bond wire are used. In order to improve the current distribution over the power semiconductor components, the individual bonding wires are often also connected to their connection surfaces by means of a plurality of bonding pins.
Simulations have shown that, when a bonding wire is arranged between the load connection potential surface and the power semiconductor element according to the prior art, the current is not uniformly supplied into the power semiconductor element via the connection surface and is therefore not uniformly loaded over the entire surface for conduction.
Document DE10204157a1 discloses a wire bond connection for electrically conductive connecting conductor tracks and power semiconductor elements, in which the pitch of all bonding wires or within a single bonding wire group is varied and the current is therefore designed uniformly in a direction perpendicular to the routing direction of the bonding wires with respect to the prior art.
Document DE102005039940B4 discloses a wire bond connection in which the second bond feet of a plurality of bond connections are distributed alternately in a checkerboard pattern on a common connecting surface and the bond connections form two groups of a plurality of bond connections, wherein the two groups differ in the length of the bond connections and their second bond feet define regions on the connecting surface which are not common.
The design of the wire bond connection is disadvantageous in that a sufficiently large connection surface of the power semiconductor element must be provided in order to be able to use this complex topology meaningfully.
The surge current loading of the power semiconductor element is of particular interest, particularly in power semiconductor modules with diodes and thyristors, which exceeds the continuous loading of the power semiconductor element by a multiple of a short time in the order of tenths of seconds.
The object of the present invention is to provide bonding connections for power semiconductor modules, the maximum electrical conductivity of the bonding connections being improved in their entirety, in particular in surge current loads, in particular the current distribution and thus the thermal distribution being balanced by means of a single bonding connection, which object is achieved according to the invention by means of a power semiconductor module having the features of claim 1.
The power semiconductor module according to the invention has a substrate, preferably an electrically insulating substrate. For example, a ceramic substrate, e.g. Al2O3、AlN、Si3N4. The substrate is preferably arranged on a metal base plate, wherein the base plate is designed for arrangement and, if appropriate, fastening to a heat sink.
The power semiconductors considered here are, for example, uncontrolled components such as power diodes or controlled components such as power thyristors or power transistors, for example bipolar transistors, which have at least further connection areas which are usually provided by a metallization arranged on the main surface thereof and are electrically conductively separated from the load current and, according to the prior art, are likewise connected to the control potential surface of the substrate by means of bonding connections.
According to the invention, the power semiconductor has a connection surface on its side facing away from the substrate. The connecting surface can be formed as a continuous metallization or else be divided, for example in the case of an IGBT emitter connecting surface.
Furthermore, according to the invention, a possibly divided load potential surface is provided, which is arranged on the substrate next to the power semiconductor.
According to the invention, a plurality of bonded connections for the parallel electrically conductive connection of the connection surface to the load potential surface are also provided, according to the invention each of the plurality of bonded connections having at least bonding feet of the th type (referred to as bonding feet), wherein the th bonding foot is characterized in that it is arranged on at least load potential surfaces, furthermore according to the invention each of the plurality of bonded connections having a plurality of second bonding feet, wherein the bonding feet are arranged on the connection surface of the power semiconductor, according to the invention each bonded connection has at least ends on the connection surface, ends are preferably arranged on the load potential surface and ends on the connection surface, and further preferably the bonded connections are each terminated at their ends by means of a bonding foot.
According to the invention, the second bond feet of each of the groups are arranged only in sections or regions of the coupling face which are defined by the coupling face partial surface, in other words, spatially separated sections or regions of different groups are arranged, or with reference to the second bond feet, it is indicated that, according to the invention, no spatial overlapping of the second bond feet of a group is provided, preferably the second bond feet of each of the groups are arranged only in a common partial surface of precisely of the coupling face, preferably the partial surface is closed, preferably each group is provided with 15 to 50 bond connections, further preferably 16 to 30 bond connections.
According to the invention, the groups differ accordingly in that their th bond foot is arranged on the load potential plane and has a different, but preferably -wise spacing towards the power semiconductor.
The basic idea of the invention is that the current density is conducted more uniformly to the connection surface of the power semiconductor conducting load current than in the prior art. It was found that by means of the embodiment according to the invention, in which the current input or output of each group is limited to the area of the coupling face of the power semiconductor, a particularly uniform load current distribution and thus a distribution of ohmic heat losses via the bonded connection is achieved.
The improved bonding connection from the load potential area to the contact area or the metallization of the power semiconductor component according to the invention has a plurality of individual bonding wires or bonding strips with a plurality of second bonding feet on the metallization of the power semiconductor. The second bond foot may be arranged arbitrarily. The second bond feet are preferably arranged regularly in the region or area concerned. The second legs associated with the respective group are arranged, for example, in a checkerboard manner, wherein the second bond legs are arranged here only on the same "color" grid, i.e. the rows are arranged offset from one another. Preferably in parallel identical rows, wherein the spacing between nearest neighboring second feet in both directions is maintained.
The bond connection is preferably designed in an arcuate manner between the bond feet, so that the bond connection can be subjected to as little mechanical tension and/or pressure as possible when subjected to temperature-dependent expansion.
According to a preferred embodiment, the keyed connections of the groups do not differ significantly in length. It is also preferred that the keyed connections of a group have all the same length.
According to a preferred embodiment, the material of the bonding connection belonging to the group has aluminum or copper. For example, the bond connectors are made of high purity aluminum or high purity copper, preferably with a purity of 99.99% or better. Alternatively, the bond wire can be made of an aluminum alloy or a copper alloy, for example, wherein, for example, magnesium, silicon, silver or similar additives, for example, which improve the thermal or electrical conductivity or mechanical properties of the bond wire, are provided as alloying additions. Preferably the bond connection is a bond wire. For example the bond wires have a circular cross-section. Preferred cross-sectional diameters are in the range from 100 μm to 800 μm, preferably from 125 μm to 500 μm, for example 300 μm.
In other words, in this embodiment, the metallization is electrically connected to the load potential surface only via at least bonding pads, as a result of the additional arched guidance produced by the additional bonding pads, an elongation of the bonding pads involved is produced.
The term "section" means in the sense of the present invention an area which is arranged electrically insulated from one another, for example a metallization, the electrical insulation of which is achieved by the arrangement on the substrate shown, without excluding other electrical connections, for example the electrically conductive connection is established in the design via a load coupling part, thereby causing a common function of the load current output to or input from the section.
For example, the power semiconductor module according to the invention therefore has at least coupling parts which are of arcuate configuration and whose arcuate ends are in contact, preferably welded contact, with two sections of the load potential surface.
It is not excluded that, in addition to the bonding connections belonging to the group according to the invention, bonding connections can also be provided which are not symmetrical, for example bonding connections of the type used for connecting the control interface of a power semiconductor to the associated control potential plane.
According to preferred designs, the two groups differ by the number of second bond feet per bond connector, for example, groups have two second bond feet per bond connector, while another groups have three second bond feet per bond connector.
According to preferred embodiments, the group which is larger between the associated load potential surface or associated load potential surface section and the associated contact surface area or contact surface section and which is to be bridged by the bond connection has a smaller number of second bond feet per bond connection.
According to preferred embodiments, the power semiconductor has a minimum edge length in the range from 8.0mm to 50.0mm, preferably in the range from 9.0mm to 25.0mm, more preferably in the range from 10.0mm to 20.0 mm.
Preferably, the power semiconductor further comprises a housing, for example made of plastic, preferably fiber-reinforced plastic, for example fiber-reinforced thermoplastic. Preferably, the housing is configured as a flanged housing.
According to a preferred embodiment of , the power semiconductor according to the invention has exactly two power semiconductors or a specific number of power semiconductors , which number corresponds to a multiple of 2, for example, a number of substrates corresponding to the number of power semiconductors is provided, the bonded connections of the th power semiconductor are arranged in two groups, which groups consist of a plurality of the same number of bonded connections of the bond feet, and the second bond foot of each of the groups of bonded connections is arranged only in a section or region of the connection surface defined by the connection surface portion surface, the group of the th semiconductor is arranged with its bond foot in a further section different from the two sections of the load potential surface of the th power semiconductor, the two sections are arranged adjacent to the two opposite edges of the th power semiconductor respectively, the bonded connections of the second power semiconductor are arranged with exactly load surfaces arranged between the th power semiconductor and the second power semiconductor, and the plated layers of the second power semiconductor are arranged symmetrically with the other load potential surfaces of the second power semiconductor, which are arranged in a symmetrical manner, which the plated metal semiconductor of the invention is arranged in order to achieve the advantages of the symmetrical load semiconductor modules, and/or the similar to the power semiconductor modules, which the power semiconductor modules are arranged in a symmetrical load potential of the case of the invention, and which the symmetrical load modules are formed by the plated metal plated layers of the invention, which are arranged in particular, and/or are arranged in order to save the load modules, and/or are arranged in the case of the load modules of the power semiconductor modules, which are arranged in the invention, which are arranged in the case of the invention, which the load modules, which is also to obtain the invention, and which is arranged in the load modules, which is arranged in the case of the load modules, which is arranged in.
The power semiconductors are selected from the group consisting of secondary transistors, thyristors, diodes preferably exactly two power semiconductors are pairs of different power semiconductors.
The invention also relates to assemblies of the above-described embodiments of a heat sink and of a power semiconductor module and having the corresponding previously mentioned technical advantages.
The invention is explained in detail on the basis of the following figures. The drawings herein are to be understood as illustrative only and merely representative of preferred embodiments. Wherein:
fig. 1 shows a top view of an th embodiment of a power semiconductor module 10 according to the invention;
fig. 2 shows a detailed view of the power semiconductor module of fig. 1;
fig. 3 shows another detail view of the power semiconductor module of fig. 1;
fig. 4 shows a top view of a second embodiment of a power semiconductor module 10 according to the invention;
FIG. 5 shows a top view according to FIG. 4 with components removed to clearly show the structure shown in FIG. 4, and
fig. 6 shows a top view according to fig. 4 with another of the components removed to clearly show the structure shown in fig. 4.
Fig. 1 to 3 show an -th embodiment of a power semiconductor module 10 according to the invention, while fig. 4 to 6 show a second embodiment of a power semiconductor module 10 according to the invention, the module and the second embodiment differ essentially in the bonding connection of the power semiconductors 1, 2 used and in particular the second power semiconductor 2, the -th embodiment according to fig. 1 to 3 has two thyristors as the -th power semiconductor 1 and the second power semiconductor 2, and correspondingly, the embodiment of fig. 4 to 6 has two diodes as the -th power semiconductor 1 or the second power semiconductor 2.
The power semiconductor module 10 of the embodiment has a metallic base plate 5 for arrangement and fastening on a heat sink, not shown, on the side of the base plate 5 facing away from the heat sink, two electrically insulating substrates 3, 4 made of ceramic are coated, on the surfaces of the substrates 3, 4 facing away from the base plate 5, a plurality of metal coatings are coated, respectively, of which are used for fixing and electrically contacting the main surfaces of the power semiconductors 1, 2 arranged thereon, the other metal coatings of the substrates 3, 4 are used for providing load potential surfaces 13a, 13b, 23 for the power semiconductors 1, 2, wherein the load surfaces formed by the two segments 13a, 13b are assigned to the th power semiconductor 1, the segments 13a, 13b are assigned to the load potential surfaces by way of the same functional wiring of the power semiconductor (here the cathode of the power semiconductor 1), but are also produced by way of serial current input or output of a connection element, not shown, respectively, which is embodied as arcuate or mirror-symmetrical and arranged with its free ends overlying the power semiconductor 1, on the load surfaces, which are connected to each other by way of a bond pad 12, 13a bond pad 16, 13b, 13a bond pad, 13b, 16, which is connected to a second bond pad 12, 16, which is connected to a bond pad arrangement with a bond pad 12, a bond pad, or a bond pad, 16, a bond pad, which is provided in parallel to a bond pad arrangement, a pad arrangement, a pad arrangement of a pad, a pad arrangement, a pad, a.
The segments 12a and 12b are also incorporated into the joining face 11, here the cathode joining face, due to the functional wiring of the power semiconductor 1, for the sake of clarity, each of the th and second bond feet 31, 32 is no longer marked in the figure, between the bond feet 31, 32 the bond connection forms an arc, which is shown more clearly in fig. 3 with respect to the bond connection of the th power semiconductor 1 the bond connections of the groups 15 and 16 are characterized in that they have the same number of second bond feet 32 and have ends on the contact face 11, therefore, a bond connection not shown, which starts from the load potential face segment 13a, in the case of forming a plurality of second bond feet 32 on the joining face 11, but does not terminate, but extends to the further load potential face segment 13b, to terminate there, which bond connection does not appear to be a bond connection belonging to the load potential group according to the invention and which belongs to the group of bond connections 15 and 16, is provided with the difference and grouping that the group of connections are arranged in the aspect of only in the joining face of the symmetrical arrangement, i.e. with the bond connections arranged on the joining face 12, and with the current-coupling faces of the junction faces 13, which are arranged symmetrically, and which have branching points, which are arranged, and which, have, in particular, have branching points, which, are arranged, as in the connection points, are arranged, in the connection points, in the connection faces, between the coupling faces, which are arranged, or branching points, which are arranged, in the coupling faces, between the coupling legs 31, which are arranged, with the coupling legs, which are arranged, as in the coupling legs, which are arranged, assigned, in the coupling legs.
The embodiment according to the invention relates in particular to a second power semiconductor 2, which is arranged on a further substrate 4, the specific configuration of the bond connectors 25, 26 being visible in fig. 2, the power semiconductor 2 likewise relates to a thyristor, the plurality of bond connectors 25, 26 being arranged in at least two groups, which consist of a plurality of bond connectors having the same number of bond feet 31 and 32, and the second bond foot 32 of each of the groups being arranged only in a section 22a or 22b which is defined by a common partial surface of the closed, connecting surface 21, the groups differing accordingly in that the -th bond foot 31 is arranged on the associated load potential surface 23 (here on the substrate 3) and has a different distance a to the power semiconductor 2, but within each group 1Or a2. Here, the pitch a corresponding to the group 262(the associated section 22a is spatially arranged closer to the load potential plane 23 concerned), is selected to be greater than the spacing a of the groups 251(the associated section 22b is spatially arranged further away from the relevant load potential plane), so that an consistency over the length of the bond links 25, 26 results approximately.
The power semiconductor module 10 of the second embodiment shown in fig. 4 to 6 has a metallic base plate 5 for arrangement and fixing on a heat sink not shown, on the side of the base plate 5 facing away from the heat sink, two electrically insulating substrates 3, 4 made of ceramic are coated, on the surfaces of the substrates 3, 4 facing away from the base plate 5, respectively, a plurality of metal coatings are coated, for fixing and electrically contacting the main surfaces of the power board semiconductors 1, 2 arranged thereon, the power semiconductors being the power diodes mentioned above, on the surfaces of the substrates 3, 4 facing away from the base plate 5, wherein 7313 a, 86513 b, 23 are applied, in each case, the load potential surfaces formed by the two segments 13a, 13b are assigned to the power semiconductor 1, the segments 13a, 13b are assigned to the load potential surfaces via the same functional wiring of the power semiconductor (here, the cathode of the power semiconductor 1) in this case, but the corresponding to the load potential surfaces via the current input or output of the connection element not shown connection element is created by the current input or output of the connection element, and the connection element 13a, 13b, which is assigned to the power semiconductor 1 via the arcuate bond surfaces of the same or via the bond surface bond pad 12, and which is arranged in a bond pad 12, which is arranged in a bond pad 12, a bond pad 12, which is arranged in a bond pad, a bond pad is arranged in a bond pad, which is arranged in a bond pad, a bond pad 2, a bond pad is arranged in a bond pad, a bond pad is arranged in which is arranged in a bond pad, a bond pad is arranged in which is arranged in a bond pad, a bond pad.
The embodiment according to the invention relates in particular to a second power semiconductor 2 which is arranged on a further substrate 4. in fig. 5, it is seen that a specific configuration of the bond connectors 25, 26, which is shown here by way of example by means of the bond connectors 25 or 26, the power semiconductor 2 likewise relates to a thyristor, here, a plurality of bond connectors 25, 26 are arranged in at least two groups, a group consisting of a plurality of bond connectors of the same number of bond feet 31 and 32, and the second bond foot 32 of each of the groups of bond connectors is arranged only in a section 22a or 22b defined by a common partial surface of the connection surface 21 which is closed, but, as can be seen clearly by omitting parts of the bond connectors 25, 26, the difference of the number of the bond feet lies in the group 26, when the group 25 has 3 bond feet in total and two of which are second bond feet 32, the group 26 has 5 bond feet 633 of which are second bond feet 6332, and the second bond feet are arranged on the second bond surface 21, and the second bond feet 32 are arranged on the second bond surface of the metal substrate 30, the second bond feet 23, which are arranged on the second bond surface of the metal plating 31, the closed metal load group 23, which is arranged on the second bond feet 23, which is arranged on the second bond surface of the group 30, the metal plating 31, 30, 23, which is arranged on the second bond feet 23, which is arranged on the closed metal plating, 30, 3 of the second bond feet 23, respectively.
Correspondingly, the two groups of bond connections differ in that the th bond foot 31 is arranged on the associated (in this case on the substrate 3) load potential plane 23 and has a different spacing a, but -wise within each group, toward the power semiconductor 21Or a2. Here, the pitch a of the groups 262(the associated section 22a is spatially arranged closer to the load potential plane 23 concerned), is selected to be greater than the spacing a of the groups 251(the associated section 22b is spatially arranged further away from the load potential plane concerned), whereby, in combination with the features of the second bond feet 32 differing in number and the additional third bond foot 33, approximately an -fold effect over the length of the bond connection feet 25, 26 results.
It should be noted from fig. 5 and 6 that the load potential surface 23 associated with the second power semiconductor 2 is arranged to extend parallel to the edges of the power semiconductors 1 and 2 between the power semiconductors 1 and 2, while the metallization 30 provided for the third bond foot 33 extends parallel to and spaced apart from the edges of the load potential surface 23 and the second power semiconductor 2, the load potential surface 23 being defined here by a metallization which extends below the th power semiconductor 1, at the th main surface of the power semiconductor facing the substrate 3, in contact with the th power semiconductor up to the further side, in order to define the connection surface 14 and the soldering surface for the non-illustrated connection piece here.

Claims (14)

1, A power semiconductor module (10) having:
at least substrates (4);
at least power semiconductors (2) which are arranged on the substrate (4) and have a connection surface (21) on their side facing away from the substrate;
a load potential plane (23) arranged on the substrate (4) next to the power semiconductor (2);
a plurality of bond connectors (25, 26) for electrically conductively connecting the connection surface (21) in parallel with the load potential surface (23), wherein each bond connector (25, 26) has at least a th bond foot (31) on the load potential surface (23) and a plurality of second bond feet (32) on the connection surface (21), and wherein each bond connector (25, 26) has at least ends on the connection surface (21),
wherein the plurality of bonded connections (25, 26) are arranged in at least two groups (25 or 26) consisting of a same number of bonded connections and the second bond foot (32) of each of the groups of bonded connections is arranged only in a section or region (22a or 22b) of the coupling face (21) which is defined by the coupling face portion surface, and the difference between the groups is that its th bond foot (31) is arranged on the load potential face (23) and has a different, but within each group, -derived spacing (a1 or a2) towards the power semiconductor (2),
wherein at least groups of the bond connectors (26) have a third bond foot (33) arranged in a trace of the bond connector (26) between the th bond foot (31) and the second bond foot (32) and arranged on a metallization layer (30), the metallization layer (30) being arranged on the substrate (4) in an electrically insulated manner from the load potential plane (23),
wherein the keyed connections of the groups (25 or 26) do not differ in length.
2. Power semiconductor module (10) according to the preceding claim, wherein the second bond foot (32) of each bond connection of each group (25 or 26) is arranged only in exactly common part surfaces of the coupling face (21).
3. Power semiconductor module (10) according to claim 2, wherein the common part surface is closed.
4. The power semiconductor module (10) according to claim 1, wherein the metallization layers (30) are arranged in parallel and extend between the load potential plane (23) and the edges of the power semiconductor.
5. The power semiconductor module (10) according to claim 1, wherein the load potential plane (23) is divided.
6. The power semiconductor module (10) according to claim 1, wherein the third bond feet (33) of the groups (26) are arranged on a common metallization layer (30).
7. Power semiconductor module (10) according to claim 1, wherein the bonding connection (25, 26) is a bonding wire.
8. Power semiconductor module (10) according to claim 1, wherein the second bond feet (32) of the group (25 or 26) are arranged in a regular pattern.
9. Power semiconductor module (10) according to claim 1, wherein at least two of the groups (25 or 26) differ by the number of second bond feet (32) of each bonded connection.
10. The power semiconductor module (10) according to claim 1, wherein the power semiconductor has an edge length in the range of 8.0mm to 50.0 mm.
11. Power semiconductor module (10) according to claim 1, wherein each group is provided with 15 to 50 keying connections (25, 26).
12. The power semiconductor module (10) as claimed in claim 1, wherein the power semiconductor (2) and the associated load potential plane (23) are arranged on a ceramic substrate (4).
13. The power semiconductor module (10) according to claim 1, wherein the power semiconductor (2) is a diode, a transistor or a thyristor.
14. The power semiconductor module (10) as claimed in claim 1, having a number of exactly two power semiconductors (1, 2) or , which corresponds to a multiple of 2, wherein the bonding connections (15, 16) of the th power semiconductor (1) are arranged in two groups (15 or 16) of bonding connections of the same number of bonding legs, and the second bonding leg (32) of each bonding connection of the th group is arranged only in a section or region (22a or 22b) of the coupling face (11) which is defined by the partial surface of the coupling face (11), and the groups (15 or 16) of the th power semiconductor (1) differ in that the th leg (31) is arranged on a section which differs from the two sections (13a, 13b) of the load potential face of the th power semiconductor (1), which are arranged respectively adjacent to two opposite edges of the th power semiconductor (1), and in that the second bonding leg (25, 2) of the power semiconductor (1) is arranged between the second bonding leg (23) of the semiconductor (3625, ) and the remaining power semiconductor (23) of the power semiconductor (3).
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