EP2984677A1 - Verfahren zum maskieren einer siliziumoxid haltigen oberfläche - Google Patents

Verfahren zum maskieren einer siliziumoxid haltigen oberfläche

Info

Publication number
EP2984677A1
EP2984677A1 EP14710885.6A EP14710885A EP2984677A1 EP 2984677 A1 EP2984677 A1 EP 2984677A1 EP 14710885 A EP14710885 A EP 14710885A EP 2984677 A1 EP2984677 A1 EP 2984677A1
Authority
EP
European Patent Office
Prior art keywords
masking
silicon oxide
colloidal silica
silicon
fluorosilicic acid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP14710885.6A
Other languages
German (de)
English (en)
French (fr)
Inventor
Franz Laermer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2984677A1 publication Critical patent/EP2984677A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Definitions

  • Silicon oxide on the substrate surface in particular oxide surfaces, initially slows down the oxide etching and finally brings it to a complete standstill.
  • Such a surface is substantially completely inert and can withstand harsh etching attacks for long periods of time.
  • Atomizing or spreading the fluorosilicic acid or by immersing the surface in fluorosilicic acid or by printing the surface with fluorosilicic acid is "stamped" with fluorosilicic acid or sprayed onto it in the form of small droplets analogously to an inkjet printer, so that patterns can be directly produced on the surface.
  • a plurality of components can be produced, which have approximately an oxide-containing substrate, such as a wafer substrate, which is to be processed or treated by spatially limited etching.
  • oxide-containing substrate such as a wafer substrate
  • Acceleration sensors yaw rate sensors, pressure sensors and MEMS microphones.
  • Microphone membranes can take place in the sacrificial oxide layer, while functional oxides, such as in a circuit region of a monolithically integrated MEMS microphone are protected by the oxide surface passivated by colloidal silicon oxides.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
EP14710885.6A 2013-04-12 2014-03-18 Verfahren zum maskieren einer siliziumoxid haltigen oberfläche Withdrawn EP2984677A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102013206527.2A DE102013206527A1 (de) 2013-04-12 2013-04-12 Verfahren zum Maskieren einer Siliziumoxid haltigen Oberfläche
PCT/EP2014/055361 WO2014166706A1 (de) 2013-04-12 2014-03-18 Verfahren zum maskieren einer siliziumoxid haltigen oberfläche

Publications (1)

Publication Number Publication Date
EP2984677A1 true EP2984677A1 (de) 2016-02-17

Family

ID=50289669

Family Applications (1)

Application Number Title Priority Date Filing Date
EP14710885.6A Withdrawn EP2984677A1 (de) 2013-04-12 2014-03-18 Verfahren zum maskieren einer siliziumoxid haltigen oberfläche

Country Status (5)

Country Link
US (1) US10490403B2 (zh)
EP (1) EP2984677A1 (zh)
CN (1) CN105074871B (zh)
DE (1) DE102013206527A1 (zh)
WO (1) WO2014166706A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110280051B (zh) * 2019-07-09 2021-07-09 四川省蜀爱新材料有限公司 一种低硅消泡剂

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5262282A (en) * 1989-06-22 1993-11-16 Kabushiki Kaisha Toshiba Pattern forming method
JPH05326504A (ja) * 1992-05-15 1993-12-10 Nec Corp 半導体装置の製造方法
US5453395A (en) 1994-03-21 1995-09-26 United Microelectronics Corp. Isolation technology using liquid phase deposition
US5612239A (en) * 1995-08-24 1997-03-18 United Microelectronics Corporation Use of oxide spacers formed by liquid phase deposition
US6090726A (en) * 1996-07-05 2000-07-18 National Science Council Pretreatment method of a silicon wafer using nitric acid
US5773335A (en) * 1996-08-20 1998-06-30 United Microelectronics Corp. Method for forming twin-tub wells in substrate
US20020106865A1 (en) 2001-02-05 2002-08-08 Tai-Ju Chen Method of forming shallow trench isolation
CN2480380Y (zh) * 2001-05-28 2002-03-06 财团法人工业技术研究院 液相沉积生产装置
US8202582B2 (en) * 2006-06-30 2012-06-19 Oji Paper Co., Ltd. Single particle film etching mask and production method of single particle film etching mask, production method of micro structure with use of single particle film etching mask and micro structure produced by micro structure production method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2014166706A1 *

Also Published As

Publication number Publication date
US10490403B2 (en) 2019-11-26
US20160035570A1 (en) 2016-02-04
CN105074871A (zh) 2015-11-18
WO2014166706A1 (de) 2014-10-16
DE102013206527A1 (de) 2014-10-16
CN105074871B (zh) 2019-02-12

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