Classifications

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  • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
  • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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  • H01L24/10—Bump connectors ; Manufacturing methods related thereto
  • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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  • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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  • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L24/27—Manufacturing methods
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  • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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  • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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  • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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  • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
  • H01L24/92—Specific sequence of method steps
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  • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
  • H01L27/144—Devices controlled by radiation
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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  • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
  • H01L2224/13109—Indium [In] as principal constituent
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  • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
  • H01L2224/83862—Heat curing
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  • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
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  • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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  • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
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  • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
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  • H01L2224/83986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
• • H—ELECTRICITY
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  • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
  • H01L2224/92—Specific sequence of method steps
  • H01L2224/921—Connecting a surface with connectors of different types
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  • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
  • H01L2224/92—Specific sequence of method steps
  • H01L2224/921—Connecting a surface with connectors of different types
  • H01L2224/9212—Sequential connecting processes
  • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
  • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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  • H01L2224/93—Batch processes
  • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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  • H01L2224/93—Batch processes
  • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
  • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• • H—ELECTRICITY
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  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Definitions

• the invention relates to the field of microelectronics, and more particularly to the assembly of two electronic components according to the so-called “face-to-face” technique, better known by the Anglo-Saxon “flip chip”, which carries out interconnections. between the two components.
• the invention thus finds particular application in assemblies known as “chip on chip”, “chip on wafer” and “wafer on wafer”.
• the invention is advantageously applicable to devices requiring interconnections of metal units with very small steps, in particular for the production of imagers of very large dimensions and with very small steps, such as, for example, large heterogeneous detection matrices comprising a a large number of connections, temperature-sensitive and cold-hybridized detection matrices, or detection matrices sensitive to mechanical stresses.
• the invention is also advantageously applicable to so-called "3D" structures which comprise a stack of circuits made of different materials and therefore sensitive to thermal stresses.
• the invention is also particularly applicable to high sensitivity detectors capable of detecting a limited number of photons, in particular a single photon.
• the invention is also applicable to the cold hybridization of components.
• the assembly of two electronic components by the so-called "flip chip” technique by thermocompression usually consists in forming electrically conductive solder balls on a face of a first electronic component and on a face of a second component according to a connection pattern predetermined.
• the first component is then transferred to the second component so as to match the respective solder balls thereof, then the assembly is pressed and heated.
• the contacted beads deform and melt to form electrical connections perpendicular to the main plane of the electronic components, usually in the form of a wafer.
• a recurring problem in this type of hybridization is that, without particular measurement, the surface of the beads oxidizes, which creates poor electrical connections between the hybridized components. Indeed, not only the metal oxides are very bad conductors of electricity but also the oxide present on the surface of the balls opposes the mixing of the beads during hybridization.
• the beads are usually subjected, prior to hybridization, or during hybridization, to deoxidizing agents, commonly known as "deoxidation streams", which dissolve the oxide layer.
• the deoxidation flow is usually an acid, such as, for example, benzoic acid or carboxylic acid.
• an acid such as, for example, benzoic acid or carboxylic acid.
• the vertical interconnections obtained by the hybridization are sensitive to thermal stresses, especially since the first and second components consist of different materials. Indeed, the components most often have different coefficients of thermal expansion, so that under the effect of a temperature variation the interconnections are subjected to a shear which weakens them and breaks them.
• the fast-flow technique follows the hybridization of the components.
• the components are subjected to the deoxidation flow and heated to a temperature greater than or equal to the melting temperature of the metal balls.
• a cleaning of the deoxidation stream present between the components is then implemented to prevent the latter from creating short circuits between the interconnections and corrodes thereof.
• the "fast-flow” technique then consists in depositing on one or more edges of one of the components of the liquid resin, that is to say uncured resin.
• the coating resin migrates by capillarity between the hybridized components and fills the volume separating them.
• the assembly then undergoes a heat treatment, or "curing", to solidify the resin.
• the "no-flow” technique was mainly developed to achieve rapid volume filling between the hybridized components, and is now described in connection with the schematic figures in section 1-3 as part of a "flip" hybridization. chip “by solder balls.
• the coating resin 40 is deposited on a first electronic component 12a provided with solder balls 18a so as to cover them (FIG.
• a second electronic component 12b provided with solder balls 18b, is aligned with the first component 12a, then a pressure is exerted on the second component according to the arrows illustrated by further raising the temperature of the assembly to a temperature greater than or equal to the melting temperature of the constituting metal of the balls 18a, 18b (FIG. 2).
• the balls 18a, 18b then solidify one another the others by thermocompression to form interconnections 42, the resin 40 also occupying the volume between the components 12a, 12b in which are housed the interconnections 42 ( Figure 3).
• heating being exerted to heat-compressing the solder balls 18a, 18b this heating is chosen to activate the heat treatment of the resin 40 in order to harden it.
• the fast-flow technique there is no need for a preliminary cleaning step, and only one heating step is implemented.
• the no-flow technique is fast.
• the resin is a mixture of a glue as a main component, for example an epoxy glue, and a solvent which makes it possible to adjust the viscosity of the resin and which is evaporated during the heat treatment. of the resin.
• the mixture may also comprise curing agents, especially polymerization agents, for example a catalyst, a photoinitiator or a thermo-initiator, and / or surfactants, for example silane, which increases the adhesion and the wettability of the resin on the surfaces of the components with which comes into contact, and / or particles to adjust the coefficient of thermal expansion of the resin, usually referred to as "fillers".
• the deoxidation flow is thus also incorporated into the resin in order to dissolve the oxide layer covering the solder balls 18a, 18b.
• the deoxidizing agents include ionic agents of high electrical conductivity. Since they are present in the resin and can not be removed from it once the coating has been completed, these agents therefore limit the electrical resistivity of the resin, the latter being able to take values of less than 10 12 ⁇ / cm. Some applications, especially in cooled infrared detection, require resistivities greater than 2.10 13 ⁇ / cm, making the "no-flow" technique unsuitable for these applications.
• the aim of the present invention is to provide a "flip-chip” type hybridization method which makes it possible to implement a “no-flow” coating, or "underfilling", having an increased electrical resistivity. .
• the subject of the invention is a method of assembling a first and a second electronic component, comprising:
• connection elements of the first component are hollow inserts having an open end and the connection elements of the second component are solid elements of lower hardness than the inserts, the application of the force resulting in the insertion of the elements. hollow in the solid elements;
• ⁇ each insert includes:
• a metal core not oxidized on at least a portion of its surface, and of hardness greater than that of the solid elements
• a metal layer covering at least said unoxidized portion of the core, the first layer having a plasticity greater than that of the core and / or consisting of a non-oxidizable metal;
• the geometry of the hollow inserts and the geometry of the solid elements, and / or the relative positioning thereof during the insertion, are chosen so as to leave free a portion of the open end of the hollow inserts during the insertion ;
• curable material does not include deoxidizing flux.
• electrically insulating is meant a material of high electrical resistivity, especially resistivity materials greater than 10 12 ⁇ / cm.
• liquid is meant here the phase of the hardenable material when it is not solid.
• the insert when inserting a hollow insert into a solid member, the latter does not completely block the opening of the insert. There is therefore a leakage passage, or "vent", for the material contained in the insert. As the hollow insert progresses in the solid member, the material is thus driven out. Accordingly, the effective section of the insert bearing on the solid element during insertion is that of the hollow insert. In particular, since the section of the insert is small, the pressure exerted on the solid element by the insert is sufficient to break the oxide layer covering the solid element.
• the insert when the insert consists of a core covered with a non-oxidizable metal layer, this layer is plugged into the solid element and forms with it a quality interconnection.
• the coating material being free of flux, it consequently has a high electrical resistivity. It is therefore possible to choose coating materials having a very high resistivity, that is to say a resistivity greater than 10 12 ⁇ / cm.
• the insert when the insert consists of a metal core covered with a metal layer of plasticity greater than that of the core, under the effect of insertion into the solid element, the different regions of the insert undergo deformation. Having a plasticity greater than that of the core, the metal layer will therefore undergo a greater deformation than the latter during penetration into a stud. Also, if this metal layer is also covered with a native oxide layer, the native oxide layer can not deform as much as the metal layer without breaking because the oxide layer, which is very brittle, has a lower plasticity to that of the metal layer. Unable to conform to the deformation experienced by the metal layer, the native oxide layer "crackles".
• the adhesion of an oxide layer to the metal from which it is derived is small, the native oxide layer "peels" by sliding on the metal layer under the effect of shear exerted during insertion and therefore remains outside the solid element, then fully discovering the metal layer.
• a quality electrical interconnection is thus obtained without the use of a deoxidizing flux in the coating material.
• the invention furthermore makes it possible to combine the advantages of reduced-pressure flip chip hybridization by using hollow and open inserts, with the advantages of rapid coating, thanks to the use of the technique. "no flow" coating.
• the hybridization is advantageously carried out at ambient temperature, without it being necessary to heat the connection elements so as to obtain their fusion.
• a length of the hollow inserts along an axis perpendicular to the assembly direction is greater than a length of the solid elements along said axis.
• the hollow inserts are inserted on an edge of the solid elements.
• the open end of the hollow inserts has several branches partially disposed out of the solid elements during insertion.
• the curable material does not comprise a deoxidizing flow.
• the layer of curable material is deposited on a predetermined portion of the assembly face, the curable material is a negative photoresin capable of becoming insoluble in a predetermined developer following the application of a predetermined radiation, and following the insertion of the hollow inserts into the solid elements:
• Said radiation is applied to the resin layer except for the portion of the resin layer covering said portion of the assembly face;
• the photoresist covering said zone is removed by applying the developer.
• Figures 1 to 3 are diagrammatic sectional views illustrating a coating technique of the prior art of the "no flow” type applied to hybridization "flip chip” by thermocompression of solder balls;
• Figures 4 to 8 are schematic sectional views and top views showing an hybridization method "flip chip” with a “no flow” coating according to the invention;
• FIGS. 9 and 10 are schematic sectional views respectively of an alternative embodiment of the inserts and the peeling of an oxide layer covering the inserts during the penetration of the inserts in the solid elements;
• Figures 11 to 15 are diagrammatic top views illustrating different variants and hollow inserts open and solid elements.
• FIGS 16 to 19 are schematic sectional views of a method according to the invention for releasing the areas covered with the coating material.
• FIGS 4 to 8 schematically illustrate the "flip-chip" hybridization of a first and a second electronic component 50, 52 a hybridization method according to the invention.
• the first component 50 has on one of its faces 54, called “assembly”, a set of inserts 56 hollow, open and electrically conductive, intended to penetrate into solid pads 58 respective electrically conductive conductors arranged on one of its faces 60, called “assembly", the second component 52.
• the bottom of each insert 56 is also in contact with a connection pad 62 formed in the thickness of the first component 50 this range 62 interfacing with, for example, an electronic circuit 64.
• each pad 58 is in contact with a connection pad 66 formed in the thickness of the second component 52, the pad 66 forming the interface for example with an electronic circuit 68.
• the hollow insert is advantageously made of a hard material, such as in particular W, WSi, Ti, Cu, Pt or Ni, covered by a noble metal layer, such as in particular Au or Pt, and therefore non-oxidizable, to avoid surface oxide formation that would weaken the electrical contact with the solid element.
• the solid element is preferably constituted by In or an In-based composite, such as InSb, an alloy based on tin, lead, Al or a Al alloy, such as AlCu.
• a volume of curable material 70 especially a resin as described above, for example an epoxy resin comprising a hardener, is also deposited in liquid form on the portion of the surface 56 comprising the pads 58 so as to coat them.
• the electronic components 50 and 52 are aligned so as to present each hollow insert 56 in front of a stud 58, and an appropriate pressure, illustrated by the arrows, is exerted on the first component which is movable and thus moves in an assembly direction A.
• an appropriate pressure illustrated by the arrows, is exerted on the first component which is movable and thus moves in an assembly direction A.
• the geometry of the hollow inserts 56 and the geometry of the solid pads 58 are chosen so that, during the insertion of the hollow inserts 56 into the studs 58, the studs 58 do not completely block the opening of the studs 58. Hollow inserts 56. In this way, there is a leakage passage for the encapsulating material 70 occupying the inserts during their progression in the studs 58 so that the section pressing on the studs 58 is that of the inserts 56.
• the hollow inserts 56 each have a section perpendicular to the assembly direction A, or "cross-section", taking the form of a cross (FIG. 5) and the pads 58 each have a section perpendicular to the direction A. taking the form of a cross angularly offset by 45 ° relative to the cross of the corresponding insert 56 and centered on it ( Figure 6).
• the inserts 56 which have a hardness greater than that of the pads 68, then penetrate into them by breaking the native oxide layer covering, if appropriate, the pads 58 Due to the offset of the crosses of the inserts 56 and the pads 58, as illustrated in FIG.
• the only bearing surface of the inserts 56 on the pads 58 consists of the thickness of the inserts, so that the pressure exerted to hybridize the two components 50, 52 is reduced.
• only part of the section of the inserts 56 is actually introduced into the pads 58, which further reduces said pressure. Electrical interconnections between the first and the second electronic components 50, 52 are thus formed and mechanically secure them.
• a heat treatment for example a heating, can be applied in order to harden the coating materials 70 in order to obtain a solid layer of protection against the thermomechanical stresses filling the volume separating the two components at the interconnections created.
• the assembly material is chosen so as not to comprise a deoxidizing agent, which makes it possible to obtain, for the latter, resistivity values greater than 10 12 ⁇ / cm, or even values greater than 2.10 13 ⁇ / cm, desirable especially for an application to infrared detection, for example cooled.
• a deoxidizing agent which makes it possible to obtain, for the latter, resistivity values greater than 10 12 ⁇ / cm, or even values greater than 2.10 13 ⁇ / cm, desirable especially for an application to infrared detection, for example cooled.
• the inserts 56 each comprise a metal central core 80 covered by a metal layer 82.
• the central core 80 has a hardness greater than that of the pads 58 so as to be able to be there. inserted.
• the central core 80 preferably has a Young's modulus greater than 1.5 times the Young's modulus of the material of the pads 58.
• the central core 80 is made of a hard metal, such as nitride titanium (TiN), copper (Cu), vanadium (V), molybdenum (Mo), nickel (Ni), titanium tungstenate (TiW), WSi, or tungsten (W) for example, and the pads 58 are made of a ductile metal, for example aluminum, tin, indium, lead, silver, copper, zinc, or an alloy of these metals. Moreover, the central core 80 is not oxidized.
• a hard metal such as nitride titanium (TiN), copper (Cu), vanadium (V), molybdenum (Mo), nickel (Ni), titanium tungstenate (TiW), WSi, or tungsten (W)
• the pads 58 are made of a ductile metal, for example aluminum, tin, indium, lead, silver, copper, zinc, or an alloy of these metals.
• the central core 80 is not oxidized.
• the metal layer 82 in addition to its function of being electrically conductive and of adhering strongly to the central core 80 because of the metal-metal interface that it forms with the core 80, has the function of deform, while remaining attached to the core 80, during the penetration of ⁇ insert in a stud. It has for this purpose a plasticity greater than that of the core 80.
• the layer 82 may thus be made of a ductile metal.
• a ductile metal having a Young's modulus greater than 1.5 times that of the material of the core 80 has a suitable plasticity.
• the layer 82 has a ductility substantially equal to that of the pads 58 so as to allow penetration of the hard core 80 without breaking and obtain relative deformations of the layer 82 and the pad 58 substantially equal.
• the layer 80 is thus advantageously made of aluminum, tin, indium, lead, silver, copper, zinc or an alloy of these metals, and preferably aluminum, this metal having the advantage of having a very high melting point above 500 ° C.
• a native oxide layer 84, originating from the oxidation of the layer 82, is moreover optionally present.
• the oxidation layer 84 is by nature very thin, of the order of a few nanometers, hard and brittle, and in particular of plasticity and ductility very internal to those of the metal of the layer 82 and adheres weakly to the latter.
• This embodiment has the advantage that it is not necessary to take special measures to prevent oxidation of the inserts during storage, since it is deliberately allowed to oxidize the inserts 56.
• FIGS. 11 to 15 are top views of alternative embodiments of the inserts 56 and elements 58.
• the cross section of the hollow and open inserts 56 take the form of a cross as described previously, and the cross section of the solid elements takes any shape, but preferably convex, for example in the form of square, disk, ellipse, rectangle or other.
• the dimensions of the inserts and solid elements are then chosen so that the branches of the inserts protrude from each side of the solid elements, thus creating four passages allowing the coating material to escape during the insertion.
• the cross section of the inserts 56 takes the form of a star comprising more than four branches, for example 6.
• the solid elements 58 can take any form but convex preference, for example in the form of a square, disk, ellipse, rectangle or other.
• the solid elements 58 have a cross-section in the shape of a cross or a star, and the cross-section takes any shape, but preferably convex, for example in the form of a square, a disk, a d ellipse, rectangle or other.
• the inserts 56 are cylindrical and the solid elements comprise lobes 68, the inserts 50 being centered, not necessarily accurately, where the lobes 60 meet.
• the inserts 56 and the solid elements 58 are those of the state of the art, including cylindrical inserts and solid elements 58 convex, for example of square or circular section.
• each hollow and open insert 56 is placed in alignment with a solid element 58, so that a portion 82 of the opening of the inserts 56 is not facing the elements 58.
• the patterns formed by the inserts 56 on the assembly face of the first component 50 are offset with respect to the pattern formed by the elements 58 on the assembly face of the second component 58.
• This offset of the patterns is for example obtained during the manufacture of the components 50 and 52 followed by the implementation of a conventional alignment of the components, or the manufacture of the inserts 56 and the elements 58 is carried out in a conventional manner and components 50 and 52 are then staggered upon insertion.
• the invention applies to an infrared detector intended to operate in space.
• the first component is an infrared detection matrix for a spatial application of 2000 * 2000 detection unit elements made of InGaAs on InP substrate, or "pixels", distributed with a pitch of 10 micrometers
• the second component, with which the matrix detection is hybridized is a CMOS reading matrix provided with indium pads.
• the size of the detection matrix is therefore 20 * 20mm. Due to the large difference between the coefficients of thermal expansion of the detection matrix and the read array, it is unthinkable to hot hybridize the two components, in particular by implementing a thermocompression of solder balls.
• the vertical interconnections between the two components require to be coated to ensure a reliability of the detector vis-à-vis the strong cyclic thermal variations when the detector is in orbit.
• the detector must be able to have a very low detection threshold, of the order of a few photons, so that the coating material must have a very high resistivity, greater than or equal to 10 12 ⁇ / cm, or even 2.10 13 Q / cm.
• the hybridization process then consists in successively implementing the following steps:
• the hybridization of the detection matrix and the reading matrix for example a "C2W” type hybridization (wafer chip) in the context of a collective fabrication of a detector, by insertion of the pads the reading matrix in the cross inserts of the reading matrix; and
• the epoxy adhesive is also preferably chosen to crosslink at room temperature if the matrices are very sensitive to strong thermal cycles.
• Epoxy resins having photosensitive properties are so-called “negative” resins.
• a photosensitive epoxy resin subjected to a particular light radiation, especially ultraviolet radiation becomes insoluble in a particular chemical bath called “developer”.
• developer a particular chemical bath
• the radiation-exposed portion is retained while the unexposed portion is removed. Protection against irradiation is usually obtained using a mask, the negative impression of the mask is preserved, hence the name of photoresin "negative”.
• the process is continued by the application of a mask above the zones to be released, the mask being opaque to a predetermined radiation capable of allowing the removal of the resin exposed by a developer, followed by application of said radiation to the hybridized assembly (FIG. 17).
• the mask is then removed and a developer applied to remove the unexposed resin portions, namely the resin portions on the areas to be released ( Figure 18).
• the exposed resin portions having crosslinked they close the volumes between the components 50a, 50b so that the portion of resin contained in these volumes remains therein.
• Final crosslinking of the resin between the componentsSOa, 50b is then obtained by a heat treatment, for example by heating the assembly at 150 ° C for 1 hour for the resin type "SU-8".
• the components 50a are transparent to the electromagnetic radiation 96 so that a resin crosslinking is provided between the components 50a, 50b by the application of the radiation.

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• Engineering & Computer Science (AREA)
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• 2013
  • 2013-03-22 FR FR1352557A patent/FR3003688B1/fr not_active Expired - Fee Related
• 2014
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