Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/0416—Control or interface arrangements specially adapted for digitisers
  • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/0412—Digitisers structurally integrated in a display
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/0416—Control or interface arrangements specially adapted for digitisers
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/046—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by electromagnetic means
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
  • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
  • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F3/047—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using sets of wires, e.g. crossed wires
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
  • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
  • G06F2203/04106—Multi-sensing digitiser, i.e. digitiser using at least two different sensing technologies simultaneously or alternatively, e.g. for detecting pen and finger, for saving power or for improving position detection

Definitions

• the present invention relates to a digitiser for use in a position sensor and in particular, to a digitiser for use in a capacitive touch screen.
• Computer devices are well known and significant research has been made into man machine interfaces that allow humans to interact with computer devices.
• capacitive touch pads are well known and allow a user to move a cursor around the screen by moving their finger over the touch pad.
• Touch screens are also well known in which an X-Y digitizer is mounted on or under the surface of a computer display and which allows the user to make selections directly on the display using either their finger or a conductive or an electromagnetic stylus.
• One type of digitiser commonly used in such touch screens has a grid of conductors arranged in perpendicular directions over the display screen and electronics arranged to measure the change in mutual capacitance at each intersection point formed by the crossing X-Y conductors as a finger (and/or stylus) moves over the screen.
• the grid pitch (centre to centre distance between adjacent conductors) is between 5 mm and 20 mm, which provides a sensing resolution that is sufficient to detect a human finger anywhere over the grid.
• the conductors are formed from indium tin oxide (ITO) as these conductors are transparent.
• ITO indium tin oxide
• Ultra-thin copper wire is also commonly used to form the conductors of X-Y digitisers, although some users complain about being able to see the copper traces when used in smaller display screens.
• FIG. 1 a Such a design of X-Y conductors is illustrated in Figure 1 a.
• Figure 1 b when an excitation voltage is applied to an X conductor, it generates an electric field that couples with a Y conductor at the intersection point between the X-Y conductor pair. The amount of coupling defines the mutual capacitance between the two conductors.
• Figure 1 c When a finger (or conductive stylus) is present over or near this intersection point, as shown in Figure 1 c, some of the generated electric field couples into the finger and thereby reduces the coupling (and hence mutual capacitance) between the X-Y conductor pair.
• electronics coupled to the grid of conductors can sense the change of mutual capacitance and thereby the presence and location of the finger over the grid.
• One of the major sources of unwanted error in the measurement signals is capacitive cross-talk between adjacent grid conductors.
• that excitation signal capacitively couples with adjacent excitation conductors.
• signals coupled into one detection conductor will capacitively couple into the adjacent detection conductors as well. This can lead to significant cross-talk error in the signals being measured.
• This cross-talk can be minimised by keeping the frequency of the excitation signal that is applied to the excitation conductor as low as possible. However, if the excitation frequency is too low, then it becomes difficult, or more expensive, to achieve the desired measurement update rate that will allow the tracking of the user's finger or stylus over time.
• a further problem with increasing size relates to the number of measurement channels that are used.
• the signals from the detection conductors are multiplexed through a number (sometimes one) of separate measurement channels before being processed by a microprocessor.
• the display gets larger, the number of X-Y conductors increases to keep the same spatial resolution. Thus more measurements have to be made and this can result in the need to increase the number of measurement channels.
• this increases the cost of the digitiser.
• Figure 2 is a plot that shows how the power consumption and the cost of an ITO based digitiser and of a metallic conductor based digitiser increases with the size of the display.
• ITO provides the same performance as the metallic conductor based digitiser both in terms of power consumption and cost.
• a metallic conductor based digitiser of such sizes can provide an update frequency well above the nominal 100Hz, but such performance is not required for man machine interfaces.
• the power consumption and the cost increase exponentially with increasing display size.
• the lower excitation frequency required by the ITO based digitiser means that more measurement channels are needed to process the signals from the grid of conductors compared with a metallic conductor based digitiser.
• metallic conductor based digitisers can use higher excitation frequencies, there is more time to multiplex the signals from more detection conductors through each measurement channel - which helps to keep the cost and power consumption down.
• the thin metallic conductor based digitiser can be implemented with a relatively modest increase in the cost and power consumption for displays having a diagonal size up to 200cm (80"). The step change in both the cost and power consumption caused by the requirement of adding even more measurement channels become evident for metallic wire digitisers having a diagonal size above 250cm.
• the inventor has designed a number of new digitisers (and parts thereof) that try to address one or more of the challenges and conflicting requirements described above. In so doing, the inventor has made a number of different inventions that are described and some of which are claimed herein.
• the new designs of digitiser can be used in touch screens or in separate touch pads/whiteboards.
• the digitisers that are described are ideally suited for use with large scale display screens having diagonal sizes greater than, for example, 38cm (15") due to the ability of the algorithm to scale to large X-Y grids. For instance it allows to maintain an update rate of about 100 Hz whilst measuring the mutual capacitance at each node of a 320 x 180 X-Y grid.
• the application also describes a number of ways in which the grid of X-Y conductors and associated electronics can be manufactured and assembled.
• the present invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining a plurality of measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors.
• the excitation circuitry may operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied.
• the measurement circuitry may operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry.
• the digitiser is arranged so that for a given selected pair of excitation conductors and a given selected pair of detection conductors, the measurement obtained by said measurement circuitry comprises a double differential measurement that depends upon a difference between: i) a difference between a mutual capacitive coupling between a first one of the detection conductors of the selected pair of detection conductors and each of the excitation conductors of the selected pair of excitation conductors; and ii) a difference between a mutual capacitive coupling between a second one of the detection conductors of the selected pair of detection conductors and each of the excitation conductors of the selected pair of excitation conductors.
• the measurement circuitry comprises a demodulator for demodulating the signals obtained from the selected detection conductors and a band pass filter for filtering an output of the demodulator.
• the excitation signal applied to each selected excitation conductor has an excitation frequency and the demodulator may be arranged to combine the signals obtained from the selected detection conductors with a demodulation signal that has substantially the same frequency as the excitation frequency of the excitation signal.
• the demodulator may combine the signals obtained from the selected detection conductors with the demodulation signal by multiplying the signals obtained from the selected detection conductors with the demodulation signal.
• the demodulator may multiply the signals obtained from the selected detection conductors with the demodulation signal by passing the signals obtained from the selected detection conductors through a switch that is switched with the demodulation signal.
• the pass band filter will comprise one or more dc (direct current) blocking capacitors for blocking low frequency components from the demodulated signals.
• the processing circuitry is preferably arranged to process said measurements to correct for transients introduced into the measurements by the dc blocking capacitors.
• At least one additional excitation conductor may be provided that is connected to the excitation circuitry.
• the excitation circuitry may select the additional excitation conductor during an excitation interval and to apply an excitation signal to the additional conductor without applying a complementary excitation signal to another excitation conductor.
• the measurement circuitry may be arranged, during at least one detection interval of a detection cycle, to select the signal from a detection conductor and a known reference signal. Measurements obtained from these excitation conductors and detection conductors can provide non-differential measurements that can be used to integrate the differential measurements.
• Control circuitry may also be provided that generates a blanking off signal and circuitry for disconnecting the detection conductors from the measurement circuitry in dependence upon the blanking off signal.
• the control circuitry is arranged so that the detection conductors are disconnected from the measurement circuitry each time the excitation circuitry selects a new pair of excitation conductors.
• the present invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors.
• the excitation circuitry may be arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied, wherein the excitation circuitry is arranged to polarity modulate each excitation signal using a polarity control signal so that the polarity of the excitation signal applied to a selected conductor changes during a time that the excitation conductor is selected, wherein the polarity control signal is periodic and wherein the shorter of: i) the time that a detection conductor is selected, and ii) the time that an excitation conductor is selected, is an integer multiple of the period of the polarity control signal.
• a digitiser may have excitation circuitry that selects neighbouring excitation conductors during plural consecutive excitation intervals in an overlapping manner such that during a first excitation interval a given selected excitation conductor is paired with a first neighbouring excitation conductor and during a second excitation interval the given selected excitation conductor is paired with a second neighbouring excitation conductor.
• the neighbouring excitation conductor may be immediately adjacent the given excitation conductor or it may be a close neighbour of the given excitation conductor.
• the excitation circuitry is arranged so that, during an initial excitation interval of an excitation cycle, excitation conductors are selected without overlap with excitation conductors selected in a final excitation interval of a preceding excitation cycle.
• the excitation circuitry is arranged to select the excitation conductors such that an excitation conductor selected during a last excitation interval of an excitation cycle neighbours an excitation conductor selected by the excitation circuitry during a first excitation interval of the excitation cycle.
• the measurement circuitry may be arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry.
• the measurement circuitry may be arranged to select neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during a first detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a second detection interval the given selected detection conductor is paired with a second neighbouring detection conductor. Again the neighbouring detection conductors do not need to be immediate neighbours.
• Each detection interval may correspond in duration to or is longer than one excitation cycle or each excitation interval may correspond in duration to or is longer than one detection cycle.
• the present invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry, wherein the measurement circuitry is arranged to polarity modulate a detection signal obtained from each selected detection conductor using a polarity control signal so that the polarity of the detection signal changes during a time that the detection conductor is selected, wherein the polarity control signal is periodic and wherein the shorter of: i) the
• Circuitry may also be provided for disconnecting the detection conductors from the measurement circuitry and control circuitry that generates a blanking off signal on rising and falling edges of the polarity control signal and wherein the circuitry for disconnecting the detection conductors from the measurement circuitry is responsive to the blanking off signal so that at the times that the polarity changes due to the polarity control signal, the detection conductors are disconnected from the measurement circuitry.
• the measurement circuitry is arranged to select the detection conductors such that a detection conductor selected during a last detection interval of a detection cycle neighbours a detection conductor selected by the measurement circuitry during a first detection interval of the detection cycle.
• the measurement circuitry is preferably arranged to determine differential measurements of signals obtained from the selected pairs of neighbouring detection conductors, as this reduces common mode noise.
• the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the corresponding subset during a detection cycle.
• Each measurement channel may be arranged so that, during an initial detection interval of a detection cycle, detection conductors are selected by the measurement channel that neighbour detection conductors that are selected by the measurement channel during a final detection interval of the detection cycle.
• the measurement circuitry may also comprise sample and hold circuitry for sampling and holding measurements obtained from each measurement channel and an analogue to digital converter for converting measurements held by the sample and hold circuitry into corresponding digital values
• the sample and hold circuitry comprises a plurality of first and second capacitors, each first and second capacitor being associated with a respective measurement channel, wherein the sample and hold circuitry is arranged such that during first measurement intervals, signals from the measurement channels are applied to the associated first capacitors and during second measurement intervals, signals from the measurement channels are applied to the associated second capacitors, and wherein during the first measurement intervals the sample and hold circuitry is arranged to couple signals stored on the second capacitors to the analogue to digital converter for conversion into corresponding digital values and during the second measurement intervals the sample and hold circuitry is arranged to couple signals stored on the first capacitors to the analogue to digital converter for conversion into corresponding digital values.
• the detection intervals of the different measurement channels may be staggered to allow the measurements from the different measurement channels to be converted from analogue to digital form in a time division multiplex manner using a common analogue to digital converter.
• the excitation circuitry polarity modulates each excitation signal using a polarity control signal so that the polarity of the excitation signal applied to a selected conductor changes during a time that the excitation conductor is selected, wherein the polarity control signal is a periodic signal and wherein half the period of the polarity control signal is less than or equal to the shorter of the excitation interval and the detection interval.
• the measurement circuitry may be arranged to polarity modulate a detection signal obtained from each selected detection conductor using a polarity control signal so that the polarity of the detection signal changes during a time that the detection conductor is selected, wherein the polarity control signal is a periodic signal and wherein half the period of the polarity control signal is less than or equal to the shorter of the excitation interval and the detection interval.
• the processing circuitry may be arranged to integrate at least some of the double differential measurements to generate measurements relating to the mutual capacitive coupling between at least some of the excitation conductors and at least some of the detection conductors. In this case, the processing circuit may process the double differential measurements to identify one or more areas of possible touch and may restrict integration of the double differential measurements to the measurements relating to the one or more areas of possible touch.
• the processing circuitry is operable to identify, for each area of possible touch, a start point and an end point, and is operable to restrict the integration of the differential measurements from the identified start point to the identified end point. This can significantly reduce the amount of data to be integrated and hence the time and processing power required.
• the processing circuitry will use one of the start point and the end point for an area of possible touch to determine a first boundary condition for the integration and will use the other one of the start point and the end point to determine a correction to be applied to the integrated values.
• This correction can be, for example, a gradient based correction.
• the processing circuitry may integrate the double differential measurement values by adding or subtracting adjacent measurement values together.
• the processing circuitry will integrate measurement values obtained from adjacent excitation intervals or from adjacent detection intervals.
• the measurement values obtained from the measurement circuitry are stored in a two dimensional array, with successive measurements in one dimension of the array corresponding to the measurements obtained from adjacent excitation intervals and with successive measurements in the other dimension of the array corresponding to the measurements obtained from adjacent detection intervals. This allows for the convenient manipulation of the measurement values.
• the processing circuitry may integrate the measurement values along both the first dimension and the second dimension; and may subtract a respective background measurement value from each measurement prior to performing said integration.
• the invention provides a digitiser comprising: a grid of conductors having a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements of signals obtained from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurements obtained from the measurement circuitry comprise differential measurements and wherein the processing circuitry is operable to: process the differential measurements to identify one or more possible areas of touch and, for each possible area of touch, a start point and an end point for the possible area of touch; and integrate the differential measurements using the identified start point and end point to restrict the integration of the differential measurements to the differential measurements from the identified start point to the identified end point.
• the processing circuitry may integrate the differential measurements between the start point and the end point by combining adjacent differential measurements, for example by adding or subtracting them from each other.
• the processing circuitry is operable to integrate adjacent measurements by weighting a measurement value obtained in one excitation interval and adding or subtracting the weighted measurement value with an integrated value obtained for a previous excitation interval, the weighting being such as to compensate for transients in the measurement circuitry caused by measurement signals from the previous excitation interval. ln the same or in another embodiment, the processing circuitry is operable to integrate adjacent measurements by weighting a measurement value obtained in one detection interval and adding or subtracting the weighted measurement value with an integrated value obtained for a previous detection interval, the weighting being such as to compensate for transients in the measurement circuitry caused by measurement signals from the previous detection interval.
• the processing circuitry may be arranged to identify possible areas of touch by identifying when the differential measurements exceed a threshold level. Similarly, the processing circuitry may identify the start point and the end point by identifying a positive peak and an associated negative peak in the differential measurements and by selecting a start point and an end point such that the identified positive peak and the identified negative peak are between the start point and the end point.
• the processing circuitry is operable to integrate at least some of the differential measurements to generate measurements relating to the mutual capacitive coupling between individual excitation conductors and individual detection conductors. This allows for a more accurate identification of objects touching or close to the grid of conductors.
• One of the start point and the end point for an area of possible touch may be used to determine a first boundary condition for the integration and the other one of the start point and the end point may be used to determine a correction to be applied to the integrated values.
• the measurement values obtained from the measurement circuitry may be stored in a two dimensional array, with successive measurements in one dimension of the array corresponding to measurements obtained from adjacent excitation intervals and with successive measurements in the other dimension of the array corresponding to measurements obtained from adjacent detection intervals.
• the processing circuitry may then integrate the measurement values along one or both the first dimension and the second dimension.
• the processing circuitry may be arranged to re-order the data in the two dimensional array so that the position of each measurement in the two dimensional array corresponds to a position of a crossover point between an excitation conductor and a detection conductor, in the grid of conductors. This may be desirable when the excitation and/or detection conductors are not selected in the order in which they are located on the grid. This re-ordering of the data will typically be performed after integrating the data in the array.
• the measurement circuitry comprises a plurality of detection switching blocks, each arranged to select a subset of detection conductors, wherein one or more of the detection switching blocks share at least one detection conductor with another detection switching block and wherein the processing circuitry is operable to combine the data obtained from the detection switching blocks prior to or after performing said integration.
• the combining may comprise adding or subtracting data values obtained by different detection switching blocks from the shared detection conductor.
• each detection switching block is operable to provide double differential measurements and at least one single differential measurement and wherein the integration is initiated using the single differential measurement.
• the measurements obtained from the digitiser comprise double differential measurements and single differential measurements distributed amongst the double differential measurements and wherein the integration is seeded using the single differential measurements.
• the excitation circuitry may be arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different excitation conductor is selected by the excitation circuitry; and wherein the processing circuitry comprises: means for determining an amplitude of a signal generated in the measurement circuitry due to the excitation of an excitation conductor at the beginning of a given excitation cycle; means for determining transient corrections to be applied to subsequent measurements obtained during the given excitation cycle from the determined amplitude and a decay profile for the transient; means for correcting subsequent measurements obtained in the given excitation cycle using the determined transient corrections; and means for detecting the one or more objects positioned adjacent the grid of conductors using the corrected measurements.
• the present invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements of signals obtained from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the excitation circuitry is arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different excitation conductor is selected by the excitation circuitry; wherein the processing circuitry is operable to: determine an amplitude of a signal generated in the measurement circuitry due to the excitation of an excitation conductor at the beginning of a given excitation cycle; determine transient corrections to be applied to subsequent measurements obtained during the given excitation cycle from the determined amplitude and a
• the excitation circuitry may excite the same excitation conductor at the end of the excitation cycle and the transient correction depends upon the amplitude of the signal generated in the measurement circuitry due to the excitation of the excitation conductor at the beginning of the given excitation cycle and an amplitude of a signal generated in the measurement circuitry due to the excitation of the same excitation conductor at the end of the previous excitation cycle.
• the measurement values are differential values and the processing circuitry is operable to integrate the measurement values to determine the amplitude of the signal generated in the measurement circuitry due to the excitation of the excitation conductor at the beginning of the given excitation cycle.
• the present invention also provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein at least one of: i) excitation conductors, and ii) detection conductors; are coupled to a reference voltage via an impedance that is at least five times smaller than the capacitive impedance between adjacent conductors of the grid.
• the reference voltage may be a ground voltage, a mid-rail voltage or a power supply voltage.
• the excitation conductors are coupled to ground via the impedance, although different excitation conductors may be coupled to different reference voltages.
• one or more excitation conductors may be coupled to ground and one or more excitation conductors may be coupled to a power supply voltage.
• detection conductors are typically coupled to a mid-rail voltage via an impedance and in some cases detection conductors are coupled to plural reference voltages via different impedances. For example, detection conductors may be coupled to ground and to a mid-rail voltage.
• the impedance may comprise at least one of a capacitor and a resistor. It may comprise a combination of a capacitor and a resistor connected together in parallel.
• the present invention also provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein at least one of: i) the excitation conductors, and ii) the detection conductors; are coupled to a reference voltage via an impedance that does not exceed twice the impedance of individual conductors of the grid.
• a digitiser comprising: a grid of conductors including a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements of signals obtained from selected detection conductors; processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; and control circuitry for controlling the operation of the excitation circuitry and the measurement circuitry; wherein each excitation conductor has first and second ends, wherein the excitation circuitry is coupled to the first and second ends of at least some of the excitation conductors, wherein the control circuitry is operable to control the excitation circuitry to operate in a first mode during which the excitation circuitry applies a common excitation voltage concurrently to the first and second ends of a selected excitation conductor and wherein the control circuitry is operable to control the excitation circuitry to operate in a second mode during which the excitation circuitry applies different excitation voltages
• Measurements obtained when the excitation circuitry is operating in the first mode may be combined with measurements obtained when the excitation circuitry is operating in the second mode to determine the position of an object that is adjacent to the grid and that is inductively coupled to the excitation conductors.
• the measurements obtained when the excitation circuitry is operating in the first mode may be weighted and combined with the measurements obtained when the excitation circuitry is operating in the second mode to reduce the effect of objects that are capacitively coupled to the excitation conductors and capacitively coupled to the detection conductors.
• the weighting may depend on the relative position between the detection conductor from which the measurement is obtained and the excitation conductor to which the excitation signal is applied.
• the excitation circuitry is operable to apply complementary voltages to the opposite ends of the excitation conductor.
• positive and negative voltages of the same magnitude may be applied to opposite ends of the excitation conductors in this second mode.
• the present invention provides a digitiser comprising: a grid of conductors having a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements of signals obtained from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurement circuitry comprises a plurality of detection switching blocks, each arranged to obtain a plurality of differential measurements and at least one non-differential measurement from signals obtained from a subset of the detection conductors; and wherein the processing circuitry is operable to integrate the differential measurements from each detection switching block using the at least one non-differential measurement obtained from the detection switching block as an initial value for the integration.
• the processing circuitry may integrate separately the differential measurements obtained from each detection switching block or it may integrate them together.
• Each detection switching block may be arranged to obtain first and second non-differential measurements from signals obtained from the subset of the detection conductors and the processing circuitry may integrate the differential measurements from a detection switching block using the first non-differential measurement obtained from the detection switching block as an initial value for the integration and corrects the integrated values obtained using the second non-differential measurement obtained from the detection switching block.
• each detection switching block is arranged to operate in a cyclic manner to select each of the detection conductors in the subset during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which each detection switching block is operable to obtain a measurement from a selected one detection conductor or from a selected pair of detection conductors.
• Each detection switching block may be arranged to select neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during a first detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a second detection interval the given selected detection conductor is paired with a second neighbouring detection conductor.
• each detection switching block is arranged to select the detection conductors in its subset such that a detection conductor selected during a last detection interval of a detection cycle neighbours (on the grid of conductors) a detection conductor selected by the detection switching block during a first detection interval of the detection cycle.
• one or more of the detection switching blocks share at least one detection conductor with another detection switching block and the processing circuitry is operable to combine the data obtained from the detection switching blocks prior to or after performing said integration.
• the combining may comprise adding and/or subtracting data values obtained by different detection switching blocks from the shared detection conductor.
• the present invention also provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining a plurality of measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the excitation circuitry is arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied; wherein the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the
• the present invention also provides a method of operating a digitiser having a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining a plurality of measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; the method comprising: operating the excitation circuitry cyclically to select each of the excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied; operating the measurement circuitry cyclically to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry; obtaining, for
• the invention also provides a method of making a transducer for use in a digitiser, the method comprising: applying a first adhesive layer on a substrate; attaching a first printed circuit board along a first edge of the substrate; laying a first set of conductors on the first adhesive layer that extend away from the first edge; using ultrasonic energy to connect mechanically and electrically the ends of the conductors of the first set to the first printed circuit board; applying a second adhesive layer on the first set of conductors; attaching a second printed circuit board along a second edge of the substrate; laying a second set of conductors on the second adhesive layer that extend away from the second edge; and using ultrasonic energy to connect mechanically and electrically the ends of the conductors of the second set to the second printed circuit board.
• An ultrasonic bonder may be used to bond the ends of the conductors to the printed circuit boards.
• an ultrasonic solder may be used to connect mechanically and electrically the ends of the conductors to the printed circuit board.
• the present invention also provides a method of manufacturing a transducer for use is a digitiser, the method comprising: applying a first conductive strip to an insulating substrate along a Y-direction; a first arranging step of arranging one or more conductors over the insulating substrate that extend along an X- direction and that electrically connect at one end to the first conductive strip; applying a second conductive strip to the insulating substrate along the X-direction; a second arranging step of arranging one or more conductors over the insulating substrate that extend along the Y-direction and that electrically connect at one end to the second conductive strip; and cutting, etching or otherwise breaking the first and second conductive strips to form separate conductive pads to allow for connection of the conductors to electronics of the digitiser.
• the first arranging step lays a first conductor that extends away from and returns back to the first conductive strip one or more times, wherein the method further comprises cutting, etching or otherwise breaking the first conductor at an end remote from the first conductive strip and wherein the cutting, etching or otherwise breaking of the first conductive strip also cuts the first conductor into a plurality of electrically separate conductors that extend along the X-direction.
• the second arranging step may lay a second conductor that extends away from and returns back to the second conductive strip one or more times, wherein the method further comprises cutting, etching or otherwise breaking the second conductor at an end remote from the second conductive strip and wherein the cutting, etching or otherwise breaking of the second conductive strip also cuts the second conductor into a plurality of electrically separate conductors that extend along the Y-direction.
• the one or more of the conductors may be arranged to extend in a serpentine pattern along the insulating substrate.
• one or more printed circuit boards are connected to the conductive pads.
• a transparent layer may be provided over the conductors to sandwich the conductors between the substrate and the transparent layer.
• the transducer is mounted over a display to form a touch screen. In other embodiments, it is mounted under the surface of a whiteboard.
• At least one of the conductive strips may be formed on an edge of the insulating substrate and a further conductive strip may be provided that overlaps with the conductive strip, which further conductive strip folds over the edge of the insulating substrate onto an opposite face of the insulating surface.
• the cutting, etching or otherwise breaking the first and second conductive strips also breaks the further conductive strip on both faces of the insulating substrate to provide electrically connected conductive pads on opposing faces of the insulating substrate.
• At least one of the conductive strips is formed to overlap with an edge of the insulating substrate to provide a conductive strip on opposing faces of the insulating substrate and wherein the cutting, etching or otherwise breaking the first and second conductive strips breaks the conductive strip on both faces of the insulating substrate to provide electrically connected conductive pads on opposing faces of the insulating substrate.
• the method comprises the following steps: applying a first adhesive copper busbar strip to the PVB sheet along the Y-direction; using robotic arm thermally bonding a thin metallic wire into the predefined serpentine pattern along the X-direction of the PVB sheet perpendicular to the first copper busbar; applying an additional conductive adhesive copper busbar strip on the top of the first copper busbar in order to sandwich the thin metallic wire between the two copper strips; turning over the PVB sheet and applying a second copper busbar strip to the PVB sheet along the X-direction, perpendicular to the first busbar; using robotic arm thermally bonding a thin metallic wire into the predefined serpentine pattern along the Y-direction of the PVB sheet perpendicular to the second copper busbar; cutting PVB material to the exact size; applying a much wider conductive adhesive copper strip on the top of the second busbar and tucking in the remaining width of this copper foil underneath the PVB material to present the electrical contact surface for the second busbar on both surfaces of the PVB material
• the method comprises the following steps: applying a first layer of double-sided mounting adhesive on a surface of the cardboard; applying a first adhesive copper busbar strip to the cardboard along the Y-direction; using robotic arm bonding a thin metallic wire into the predefined serpentine pattern along the X-direction of the cardboard perpendicular to the first copper busbar; applying a second double-sided mounting adhesive over the array of bonded thin wires but without covering the first copper busbar; applying a second adhesive copper busbar strip to the cardboard along the X-direction; using robotic arm bonding a thin metallic wire into the predefined serpentine pattern along the Y-direction of the cardboard perpendicular to the second copper busbar; cutting cardboard to the exact size; applying wide conductive adhesive copper strip on the top of the first and second busbar and tucking in the remaining width of this copper foil underneath the cardboard to present the electrical contact surface for the first and second busbar on both surfaces of the cardboard; punching through the copper busbar between adjacent arms of the thin wire in order to create electrical
• the method comprises the following steps: applying optically clear double-sided mounting adhesive on a surface of the protective glass; attaching first PCB along the Y-edge of the glass substrate; using robotic arm with multiple feeds for wires, bonding a regular array of thin metallic wires along the X-direction of the glass substrate perpendicular to the first PCB; terminating each wire from the created first array of thin wires at the first PCB using ultrasonic wedge bonding or ultrasonic soldering to the gold plated copper based PCB pads; applying optically clear double-sided mounting adhesive over the array of bonded thin wires; attaching second PCB along the X-edge of the glass substrate; using robotic arm with multiple feeds for wires, bonding a regular array of thin metallic wires along the Y-direction of the glass substrate perpendicular to the second PCB; terminating each wire from the created second array of thin wires at the second PCB using ultrasonic wedge bonding or ultrasonic soldering to the gold plated copper based PCB
• the present invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors.
• the excitation circuitry is arranged to operate in a cyclic manner to select each of the excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied, and wherein the excitation circuitry is arranged to polarity modulate each excitation signal using a polarity control signal so that the polarity of the excitation signal applied to a selected conductor changes during a time that the excitation conductor is selected.
• the neighbouring conductors may be adjacent each other or there may be one or more (typically one or two) intervening conductors between the selected pair.
• the grid of conductors may be formed from two sets of parallel conductors lying at an angle to each other (such as 90 degrees), although this is not essential as any grid can be used.
• the polarity control signal is preferably periodic and the time that an excitation conductor is selected is preferably an integer multiple of the period of the polarity control signal - so that the excitation signal applied to an excitation conductor has equal amounts of positive excitation signal and negative excitation signal.
• the excitation circuitry may be arranged to select neighbouring excitation conductors during plural consecutive excitation intervals in an overlapping manner such that during a first excitation interval a given selected excitation conductor is paired with a first neighbouring excitation conductor and during a second excitation interval the given selected excitation conductor is paired with a second neighbouring excitation conductor.
• Such overlapping can facilitate the switching scheme used to control application of the excitation signals to the excitation conductors and simplifies the hardware design for the application of the polarity control signals to the excitation circuitry.
• the overlapping also maximises the achievable update for the digitiser, as positive and negative measurements for each conductor can be obtained from measurements with different neighbours.
• the excitation circuitry may also be arranged so that, during an initial excitation interval of an excitation cycle, excitation conductors are selected without overlap with excitation conductors selected in a final excitation interval of a preceding excitation cycle. This helps to reduce the bandwidth requirements of the measurement circuitry, which in turn reduces the noise contained in the measurements.
• the excitation circuitry is arranged to select the excitation conductors such that an excitation conductor selected during a last excitation interval of an excitation cycle neighbours an excitation conductor selected by the excitation circuitry during a first excitation interval of the excitation cycle. This can be achieved by scanning the excitation signal across the grid and back again one or more times.
• the measurement circuitry may also be arranged to operate in a cyclic manner to select each of the detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different combination of detection conductors is selected by the measurement circuitry.
• the measurement circuitry selects one or more pairs of neighbouring detection conductors during each detection interval.
• the neighbouring conductors may be adjacent each other or there may be one or more (typically one or two) intervening conductors between the selected pair.
• the measurement circuitry determines differential measurements of signals obtained from each selected pair of neighbouring detection conductors.
• the measurement circuitry may be arranged to select neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during a first detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a second detection interval the given selected detection conductor is paired with a second neighbouring detection conductor.
• each detection interval corresponds in duration to one excitation interval; and in an alternative embodiment, each excitation interval corresponds in duration to one detection cycle.
• the digitiser will include control circuitry for generating control signals for controlling selection of the excitation conductors by the excitation circuitry and for generating control signals for controlling selection of the detection conductors by the measurement circuitry.
• the control circuitry is preferably arranged to generate the control signals on a cyclic basis and in a free running manner independently of the processing circuitry and is arranged to send a signal to the processing circuitry each measurement cycle (such as at the end thereof) to inform the processing circuitry that measurements are ready to be processed by the processing circuitry.
• the control circuitry is able to write measurement data into a memory (for example using Direct Memory Access techniques) that is shared with the processing circuitry.
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors.
• the measurement circuitry is arranged to operate in a cyclic manner to select each of the detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry, wherein the measurement circuitry is arranged to polarity modulate a detection signal obtained from each selected detection conductor using a polarity control signal so that the polarity of the detection signal changes during a time that the detection conductor is selected.
• the polarity control signal may be periodic and the time that a detection conductor is selected may be an integer multiple of the period of the polarity control signal. This ensures that the signals obtained from each detection conductor do not have significant low frequency content and allows the measurement circuitry to remove low frequency noise from the measurements.
• the measurement circuitry selects neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during one detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a next detection interval the given selected detection conductor is paired with a second neighbouring detection conductor.
• overlapping can facilitate the switching scheme used to control application of the detection signals through the measurement circuitry and simplifies the hardware design for the application of the polarity control signal to the measurement circuitry.
• the measurement circuitry is arranged so that, during an initial detection interval of a detection cycle, detection conductors are selected without overlap with detection conductors selected in a final detection interval of a preceding detection cycle. This helps to reduce the bandwidth requirements of the measurement circuitry which in turn reduces the amount of noise in the obtained measurements.
• the measurement circuitry may be arranged to select the detection conductors such that a detection conductor selected during a last detection interval of a detection cycle neighbours a detection conductor selected by the measurement circuitry during a first detection interval of the detection cycle. This may help to facilitate the subsequent processing of the obtained measurements.
• the excitation circuitry may also be arranged to operate in a cyclic manner to select each of the excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry.
• the excitation circuitry may select neighbouring excitation conductors during plural consecutive excitation intervals in an overlapping manner such that during a first excitation interval a given selected excitation conductor is paired with a first neighbouring excitation conductor and during a second excitation interval the given selected excitation conductor is paired with a second neighbouring excitation conductor.
• the measurement circuitry is preferably arranged to determine differential measurements of signals obtained from the selected pairs of neighbouring detection conductors, as this reduces noise and in particular common mode noise that may otherwise cause errors in the determined position information.
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurement circuitry is arranged to operate in a cyclic manner to select each of the detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry, wherein the measurement circuitry is arranged to select neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during one detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a next detection interval the given selected detection conductor is paired with a second neighbouring detection conductor and
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the excitation circuitry is arranged to operate in a cyclic manner to select each of the excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which excitation signals with opposite polarity are applied, wherein the excitation circuitry is arranged to select neighbouring excitation conductors during plural consecutive excitation intervals in an overlapping manner such that during a first excitation interval a given selected excitation conductor is paired with a first neighbouring excitation
• This aspect also provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the detection circuitry, wherein the detection circuitry is arranged to select the detection conductors sequentially and in an overlapping manner from a start detection conductor to an end detection conductor and wherein the start detection conductor neighbours the end detection conductor within said grid.
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the corresponding subset during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry; wherein the measurement circuitry comprises sample and hold circuitry for sampling and holding measurements obtained from each measurement channel, wherein the sample and hold circuitry comprises a plurality of first and
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining measurements from selected detection conductors; control circuitry for generating control signals for controlling selection of the excitation conductors by the excitation circuitry and for generating control signals for controlling selection of the detection conductors by the measurement circuitry; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the control circuitry is arranged to generate the control signals on a cyclic basis and in a free running manner independently of the processing circuitry and is arranged to send a signal to the processing circuitry each measurement cycle to inform the processing circuitry that measurements are ready to be processed by the processing circuitry.
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining a plurality of measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the excitation circuitry is operable to apply a first excitation signal having a first frequency and a second excitation signal having a second frequency different to the first frequency, to the excitation conductors; wherein the measurement circuitry comprises first and second measurement channels, the first measurement channel for obtaining measurements at the first frequency and the second measurement channel for obtaining measurements at the second frequency; sampling circuitry for sampling signals output from the measurement channels using a sample switch control signal having a third frequency; and wherein the first, second and third frequencies are chosen such that the difference in frequency between the first and second frequencies is an integer multiple of the third frequency
• the first and second measurement channels will each include a band pass (or high pass) filter having a high corner frequency and the difference in frequency between the first and second frequencies is preferably several times greater than (typically at least three times greater than) the high corner frequency of the filter.
• the difference in frequency between the first and second frequencies may also be at least eight times greater than the third frequency.
• the measurement circuitry is preferably designed so that when the sample switch control signal causes the sampling of the output signal from a measurement channel, the unwanted signal having a frequency corresponding to the difference in frequency between the first and second frequencies, is at or close to zero in value.
• the difference in frequency between the first and second frequencies is less than eight times greater than the third frequency and the measurement circuitry is preferably designed so that when said sample switch control signal causes the sampling of an output signal from a measurement channel, an unwanted signal having a frequency corresponding to the difference in frequency between the first and second frequencies, is at or close to zero in value.
• the processing circuitry when the difference in frequency between the first and second frequencies is less than three times greater than the high corner frequency of the filter; the processing circuitry is arranged to perform a weighted combination of measurements obtained from a pair of detection conductors from the first and second measurement channels, where the weighting is chosen to reduce the effect of the unwanted signal having a frequency corresponding to the difference in frequency between the first and second frequencies.
• the processing circuitry when the difference in frequency between the first and second frequencies is less than eight times greater than the third frequency the processing circuitry may be arranged to perform a weighted combination of measurements obtained from a pair of detection conductors from the first and second measurement channels, where the weighting is chosen to reduce the effect of an unwanted signal having a frequency corresponding to the difference in frequency between the first and second frequencies.
• the weighted combination may be performed as follows:
• Vij"corrected (Vy " - 0*Vij ')*f P'
• v 1 is the measurement obtained from the first measurement channel
• vy 11 is the measurement obtained from the second measurement channel
• ⁇ is the weighting
• f is the first frequency
• f" is the second frequency
• the invention provides a digitiser comprising: a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors; excitation circuitry for applying excitation signals to selected excitation conductors; measurement circuitry for obtaining a plurality of measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors; wherein the excitation circuitry is operable to apply a first excitation signal having a first frequency and a second excitation signal having a second frequency different to the first frequency, to the excitation conductors; wherein the measurement circuitry comprises first and second measurement channels, the first measurement channel for obtaining measurements at the first frequency and the second measurement channel for obtaining measurements at the second frequency; sampling circuitry for sampling signals output from the measurement channels using a sample switch control signal having a third frequency; wherein the difference in frequency between the first and second frequencies is less than eight times greater than the third frequency; and wherein the processing circuitry is
• Figure 1 a schematically illustrates X and Y conductors forming part of a touch screen digitiser
• Figure 1 b illustrates electric field lines that couple from an X conductor of Figure 1 a with a Y conductor at a point of intersection between the conductors;
• Figure 1 c illustrates the field lines shown in Figure 1 b in the presence of a user's finger and illustrating the change in coupling between the X conductor and the Y conductor;
• Figure 2 is a plot illustrating the rise in power consumption and increase of the cost of the digitiser with the size of the display diagonal, for different conductor technologies
• Figure 3 is a schematic overview of an X-Y digitiser system illustrating the grid of X-Y conductors and the associated excitation and detection electronics;
• Figure 4 schematically illustrates in more detail the excitation circuitry used to apply excitation signals to excitation conductors (the X conductors) forming part of the grid shown in Figure 3;
• Figure 5 illustrates in more detail switching multiplexors used to selectively apply excitation signals to the excitation conductors
• Figure 6 schematically illustrates a delay line used to generate a sequence of delayed enable signals used to control the multiplexors shown in Figure 5;
• Figure 7 illustrates the control signals that are generated by the circuitry shown in Figure 6;
• Figure 8 schematically illustrates a number of consecutive detection intervals during which detections are made on adjacent detection conductors
• Figure 9 is a timing diagram illustrating in more detail the excitation signals that are applied sequentially to neighbouring excitation conductors at the end of one detection interval and the start of the next detection interval;
• Figure 10 schematically illustrates detection conductors (Y conductors) forming part of the grid shown in Figure 3 and the way in which these detection conductors are coupled to measurement channels forming part of the detection circuitry;
• Figure 1 1 schematically illustrates in more detail switching circuitry used to selectively connect pairs of detection conductors to amplification and filtering circuit
• Figure 12 is a timing diagram illustrating an overall measurement cycle in which a measurement is obtained for each conductor intersection point in the grid of conductors shown in Figure 3;
• Figure 13 is a circuit diagram illustrating preferred amplification and filtering circuit used to amplify and filter a differential measurement obtained from a selected pair of detection conductors;
• Figure 14a schematically illustrates a spectrum of the signal obtained after demodulation that is to be amplified and filtered by the amplification and filtering circuit shown in Figure 13;
• Figure 14b illustrates a desired filter response for the amplification and filtering circuit shown in Figure 13 that can be used to filter the signal from the demodulator to remove the high frequency demodulation components whilst maintaining the signal components that will vary with the presence of the user's finger;
• Figure 15 illustrates the form of various control signals and the form of an output signal from the amplification and filtering circuit at the end of one detection interval and at the start of the next detection interval;
• Figure 16 illustrates the form of various control signals and the form of an output signal from the amplification and filtering circuit when a user's finger is located over the grid of conductors;
• Figure 17a is a block diagram illustrating in more detail the main components of sample and hold circuitry used to sample and hold the signals obtained from the amplification and filtering circuits for conversion into digital values by an analogue to digital converter;
• Figure 17b is a signal diagram illustrating control signals used to control the sample and hold circuitry shown in Figure 17a and illustrating an analogue to digital converter trigger signal used to trigger the analogue to digital converter to make a conversion;
• Figure 18 is a block diagram illustrating the main components of the excitation and control signal logic shown in Figure 3;
• Figure 19 is a flow chart illustrating a software routine used by a digital processing unit forming part of the digitiser electronics shown in Figure 3 that controls the way in which the digital values obtained from the analogue to digital converter are processed during each measurement cycle;
• Figure 20 illustrates exemplary circuit components used in the amplification and filtering circuit shown in Figure 13 to provide a desired pass band filter response
• Figure 21 is a timing diagram illustrating the timing of the excitation signals applied to adjacent excitation conductors when no demodulation is performed;
• Figure 22 illustrates voltages measured at different points of the circuitry shown in Figure 20 in an embodiment where no demodulation is performed on the signals obtained from the detection circuitry;
• Figure 23 is a timing diagram illustrating the timing of the excitation signals applied to adjacent excitation conductors when the excitation frequency is twice that of the polarity control signal;
• Figure 24 illustrates voltages measured at different points of the circuitry shown in Figure 20 when the frequency of the excitation signal is twice the frequency of the polarity control signal;
• Figure 25 illustrates the way in which alternate excitation conductors are connected to Vcc to facilitate generation of the excitation signals shown in Figure 23;
• Figure 26 is a timing diagram illustrating the timing of the excitation signals applied to adjacent excitation conductors when the excitation frequency is three times that of the polarity control signal;
• Figure 27 illustrates voltages measured at different points of the circuitry shown in Figure 20 when the frequency of the excitation signal is three times the frequency of the polarity control signal;
• Figure 28 is a timing diagram illustrating the timing of the excitation signals applied to adjacent excitation conductors when the excitation frequency is four times that of the polarity control signal;
• Figure 29 illustrates voltages measured at different points of the circuitry shown in Figure 20 when the frequency of the excitation signal is four times the frequency of the polarity control signal;
• Figure 30a schematically illustrates measurements made in part of the grid illustrated in Figure 3 and the cross-over points involved in a measurement obtained from the grid;
• Figure 30b is a flow chart illustrating first pre-processing steps that may be carried out on the raw measurement data obtained from the measurement channels
• Figure 30c is a flow chart illustrating second pre-processing steps that may be carried out on the raw measurement data obtained from the measurement channels
• Figure 31 a schematically illustrates alternative excitation circuitry used to apply excitation signals to the excitation conductors in which the polarity control signal is applied to the excitation signals that are applied to the excitation conductors;
• Figure 31 b is a timing diagram illustrating the control signals used to control the application of the polarity modulated excitation signals to the adjacent excitation conductors;
• Figure 32 is a timing diagram illustrating alternative control signals used to control the application of the polarity modulated excitation signals to the adjacent excitation conductors when alternate excitation conductors are held at Vcc using the circuitry of Figure 25;
• Figure 33 illustrates the form of alternate switching circuitry used to switch and demodulate the signals from pairs of detection conductors for the embodiment where the excitation signals are polarity modulated;
• Figure 34 illustrates the form of various control signals and the form of an output signal from the amplification and filtering circuit at the end of one detection interval and at the start of the next detection interval;
• Figure 35 illustrates the form of various control signals and the form of an output signal from the amplification and filtering circuit when a user's finger is provided over the grid of conductors;
• Figure 36 is a block diagram illustrating alternative sample and hold circuitry for processing signals obtained from two amplification and filtering circuits
• Figure 37 is a signal diagram illustrating the control signals used to control the sample and hold circuitry shown in Figure 36 and illustrating an analogue to digital converter trigger signal used to control the triggering of the analogue to digital converter;
• Figure 38 illustrates alternative excitation circuitry used to excite the excitation conductors of the grid shown in Figure 3 in which there is no extra multiplexor input;
• Figure 39 illustrates timing diagrams and signals applied to the excitation conductors with the circuitry shown in Figure 38 and showing the form of an output obtained from the amplification and filtering circuit;
• Figure 40a is a spectrum plot illustrating a spectrum of a signal obtained from the demodulator in this embodiment, showing an extra frequency component at the frequency corresponding to the excitation cycle;
• Figure 40b illustrates a bandwidth of the amplification and filtering circuit required to filter the signal shown in Figure 40a in order to recover the desired signal whilst filtering out high frequency components of the demodulation signal and illustrating the increased bandwidth of the circuitry over the corresponding bandwidth of the circuitry used in the first embodiment;
• Figure 40c is a plot illustrating a transient response to one excitation interval related to the excitation conductor X,
• Figure 40d is a transient response to the excitation of conductor Xmax energised at the end and the beginning of each excitation interval;
• Figure 40e is a flow chart of new step s5 illustrating additional steps of a software routine used by the measurement and processing unit for removing the effect of perturbation to the midpoint level caused by the extra excitation conductor;
• Figure 41 illustrates the control and excitation signals applied in this embodiment and a signal obtained from one of the amplification and filtering circuits at the boundary between two detection intervals;
• Figure 42 illustrates the same control and excitation signal shown in Figure 41 , but showing the output from the amplification and filtering circuit in the presence of a finger over the grid;
• Figure 43 illustrates a further alternative way of applying the excitation signals to the excitation conductors that sweeps the excitation signal back and forth across the conductor grid during each excitation cycle;
• Figure 44a illustrates a further alternative way of connecting the detection conductors through the detection switching blocks
• Figure 44b illustrates a further alternative way of connecting the detection conductors inside individual detection switching blocks
• Figure 44c is a timing diagram illustrating an overall detection cycle in which a differential measurement is obtained between different pairs of detection conductors shown in Figure 44b;
• Figure 44d schematically illustrates the way in which data obtained from adjacent detection switching blocks are re-ordered prior to integration by the measurement and processing unit;
• Figure 45 illustrates the timing of control and excitation signals used in a further alternative embodiment in which the cyclic switching of the excitation conductors and the cyclic switching of the detection conductors are reversed;
• Figure 46 is a timing diagram illustrating the control signals used to control the multiplexing of the excitation signals to the excitation conductors in this embodiment
• Figure 47a is a block diagram illustrating switching circuitry used in this alternative embodiment to control the switching of signals obtained from pairs of detection conductors through the amplification and filtering circuit;
• Figure 47b is a circuit diagram illustrating an alternative amplification and filtering circuit used to amplify and filter a differential measurement obtained from a selected pair of detection conductors according to the switching circuitry shown in the Figure 47a;
• Figure 48 is a timing diagram illustrating the way in which the signals from the detection conductors shown in Figure 47a are switched through the switching circuitry and showing an output from the amplification and filtering circuit;
• Figure 49 is a diagram illustrating the way in which the signals from the detection conductors shown in Figure 47a are switched through the switching circuitry and showing an output from an amplification and filtering circuit when a finger is provided adjacent the conductor grid;
• Figure 50 is a timing diagram for a modification to the embodiment of Figures 45 to 49 in which there is no spare input to the detection switching block;
• Figure 51 a is a plot illustrating a spectrum of a signal output from a demodulator in the alternative embodiment of Figure 50 which illustrates an additional peak in the spectrum of the measurement signal;
• Figure 51 b illustrates a plot of the bandwidth of the amplification and filtering circuits for filtering out the high frequency signals shown in Figure 51 a in order to recover the desired signal whilst filtering out high frequency components of the demodulation signal and illustrating the increased bandwidth of the circuitry over the corresponding bandwidth of the circuitry used in the first embodiment;
• Figure 52a is a circuit diagram illustrating the connection of detection conductors to switching multiplexers used in a switching block that is adjacent to the switching block shown in Figure 33;
• Figure 52b is a timing diagram illustrating the timings when the signals from the different detection conductors are multiplexed through the switching block shown in Figure 52a;
• Figure 53 is a timing diagram illustrating the timings when the signals from the different detection conductors are multiplexed through the switching block shown in Figure 33 in which the overlap of signals detected from adjacent detection conductors overlap for one period of the polarity modulation signal and showing an output from the amplification and filtering circuit when no finger is present;
• Figure 54 is a timing diagram showing the same timing signals as shown in Figure 53 and the output from the amplification and filtering circuit when a user's finger is over the grid;
• Figure 55a is a block diagram illustrating switching circuitry used in this alternative embodiment to control the switching of signals obtained from pairs of detection conductors through the detection switching block without using a dedicated polarity control signal;
• Figure 55b is a timing diagram illustrating the way in which the signals from the detection conductors shown in Figure 55a are switched through the switching circuitry and showing an output from the amplification and filtering circuit;
• Figure 56a is a block diagram illustrating switching circuitry used in this alternative embodiment to control the switching of signals obtained from pairs of detection conductors using a dedicated blanked-off signal for disconnecting amplification and filtering circuit from the detection switching block at and immediately after the edges of the polarity control signal;
• Figure 56b is a timing diagram illustrating the way in which the signals from the detection conductors shown in Figure 56a are switched through the switching circuitry;
• Figure 56c is a block diagram illustrating switching circuitry used in an alternative embodiment to control the switching of signals obtained from pairs of detection conductors using a pair of dedicated analogue switches per detection conductor;
• Figure 56d is a timing diagram illustrating the way in which the signals from the detection conductors shown in Figure 56c are switched through the switching circuitry;
• Figure 57a is a diagram illustrating switching circuitry used in an embodiment where a single polarity of excitation signal is applied to a selected excitation conductor;
• Figure 57b is a block diagram illustrating an alternative form of switching circuitry used to switch the signals obtained from the detection conductors through to the amplification and filtering circuit;
• Figure 58a is a block diagram illustrating an alternative form of excitation circuitry for the digitiser with excitation signal applied simultaneously at both ends of the selected excitation wire in order to reduce the capacitive crosstalk between adjacent excitation wires;
• Figure 58b is a block diagram illustrating an alternative form of digitiser that can detect the position of one or more user fingers using capacitive sensing techniques and that can detect one or more styli using inductive coupling techniques;
• Figure 59a is a block diagram illustrating an alternative form of digitiser that can detect multiple analogue signals AF_out without using dedicated sample and hold circuitry 15;
• Figure 59b is a block diagram illustrating the usage of the new enable signal controlling multiplexors
• Figure 59c is a timing diagram illustrating the way in which the new enable signal enb2 is used to achieve the de-phasing between the boundaries of the detection cycle T_dc and the boundaries of the excitation window ⁇ ⁇ + ⁇ _ ⁇ .
• Figure 59d schematically illustrates a delay line used to generate a sequence of delayed polarity signals used to control the multiplexors 99 shown in Figure 59b;
• Figure 60a is a physical arrangement known from the prior-art for integrating sensing X-Y wire grid with an electronics unit;
• Figure 60b is a physical arrangement of wires used for heated glass in the automotive windscreen manufacturing field
• Figure 61 is a flow chart illustrating manufacturing steps that can be used to manufacture the X-Y conductor grid structure for a glass screen overlay and for integrating it with digitiser electronics;
• Figure 62a schematically illustrates the laying of a first set of conductors over a PVB foil substrate
• Figure 62b illustrates the laying of a second set of conductors over the first set of conductors on the opposite side of the same PVB substrate
• Figure 63a and 63b illustrates the attachment of an additional conductive adhesive copper strip on both sides of the PVB foil along the edge with the second copper busbar;
• Figure 64 illustrates the process of electrically isolating individual wires in the X-Y grid of conductors and forming a set of contact pads out of the originally continuous first and second busbars via punching out narrow strips of copper material;
• Figure 65a illustrates the physical arrangement of the top and bottom glass before the beginning of the lamination process
• Figure 65b illustrates the attachment of the first and second PCB to the PVB foil after the lamination of the glass panel
• Figure 66a illustrates a cross-section through the laminated glass panel with integrated electronics and the X-Y grid of conductors and is specifically showing a solder joint connection between the contact pads;
• Figure 66b illustrates the usage of an additional temporary non-stick support during the manufacturing process to allow having the same size of top and bottom glass panels
• Figure 67a illustrates the concept of moulding the PVB tail at a substantial angle to the glass surface during the lamination process in order to reduce the size of the bezel around the screen in the finished interactive display system
• Figure 67b illustrates the attachment of the PCB with electronics to the PVB tail shaped at an angle to the glass surface
• Figure 68 illustrates the attachment of the PCB with electronics to the PVB at 90 degrees to the surface of the glass for a nearly zero width bezel interactive display mounting.
• Figure 69 is a flow chart illustrating manufacturing steps that can be used to manufacture the X-Y conductor grid digitiser structure for a whiteboard application
• Figure 70a schematically illustrates the laying of a first set of conductors over a cardboard substrate
• Figure 70b illustrates the laying of a second set of conductors over the first set of conductors on the cardboard substrate;
• Figure 71 a illustrates the process of electrically isolating individual wires in the X-Y grid of conductors and forming a set of contact pads out of the originally continuous first and second busbars via punching out narrow strips of copper material;
• Figure 71 b illustrates the attachment of the first and second PCBs to the cardboard substrate
• Figure 72 is a flow chart illustrating manufacturing steps that can be used to manufacture the X-Y conductor grid structure by bonding wires directly to the PCB;
• Figure 73a schematically illustrates the laying of a first set of conductors on a substrate
• Figure 73b illustrates the laying of a second set of conductors over the first set of conductors
• Figure 74a illustrates the way in which ends of the conductors are ultrasonically bonded to a printed circuit board
• Figure 74b illustrates a cross-section through the X-Y grid of conductors made using the technique shown in Figure 73.
• Figure 3 is a schematic block diagram illustrating the main components of the X-Y digitiser 1 used in this embodiment to sense user inputs from one or more fingers or from one or more conductive styli (not shown).
• the digitiser includes a grid 3 of excitation conductors 5-0, 5-1 ... 5-Xmax-1 and a plurality of detection conductors 7-0, 7-1 ... 7-Ymax.
• the excitation conductors 5 and the detection conductors 7 are arranged in orthogonal directions.
• the excitation conductors 5 and the detection conductors 7 are overlaid on top of the display screen (not shown).
• the grid of conductors 3 is connected to a microcontroller 9 that controls the application of excitation signals to the excitation conductors 5 and that processes the signals obtained from the detection conductors 7.
• the microcontroller 9 includes excitation and control signal logic 1 1 that generates the appropriate excitation and control signals used for controlling the operation of the digitiser 1 to obtain the measurements from the X-Y grid 3.
• the microcontroller 9 also includes an analogue to digital converter (ADC) 13 which converts the analogue measurements held by sample and hold circuitry 15 into digital values which are then stored in memory 17.
• ADC analogue to digital converter
• the microcontroller 9 also includes a measurement processing unit 19 which processes the digital measurements stored in memory 17 to determine the location(s) of any user touches over the grid 3 and which then reports these locations to a host device via a host interface unit 21 .
• the excitation and control signal logic 1 1 operates independently of the measurement processing unit 19 and updates the measurements obtained from the grid 3 at a defined measurement cycle rate.
• the excitation and control signal logic 1 1 passes a frame reference signal 22 to the measurement processing unit 19 informing the measurement processing unit 19 that the next set of measurements have been stored in the shared memory 17 and are ready for processing. Whilst the excitation and control signal logic 1 1 is controlling the grid 3 to obtain the next set of measurements, the measurement processing unit 19 processes the previous set of measurements obtained during the last measurement cycle.
• the X-Y digitiser 1 is arranged to determine measurements of the mutual capacitance between each excitation conductor 5 and each detection conductor 7 at their intersection point (referred to below as the crossover points). To do this, the excitation and control signal logic 1 1 sequentially applies an excitation signal to selected excitation conductors until the excitation signal has been applied to each of the excitation conductors 5 along the grid 3. Excitation channels 23 are provided for controlling the selection of the excitation conductor(s) that are selected, during a given excitation interval, to receive the excitation signal. Similarly, during a given detection interval, the excitation and control signal logic 1 1 arranges for the signals from selected detection conductors 7 to be measured whilst the selected excitation conductor(s) are being energised.
• This selection of the detection conductors 7 is performed by the measurement channels 25 under control of the control signal logic 1 1 .
• the excitation and control signal logic 1 1 selects the detection conductors 7 from which measurements will be obtained and then controls the scanning of the excitation signal across all of the excitation conductors 5.
• the excitation and control signal logic 1 1 selects the next set of detector conductors 7 from which measurements will be obtained and then again scans the excitation signal across all of the excitation conductors 5.
• the measurement cycle ends and the excitation and control signal logic 1 1 sends the frame reference signal 22 to the measurement processing unit 19 telling it that the next set of measurements are ready in memory 17; and the excitation and control signal logic 1 1 starts the measurement process again.
• the excitation and control signal logic 1 1 1 operates continuously in a free running manner using a number of free- running synchronised clock signals and PWM signals.
• FIG. 4 is a block diagram illustrating in more detail the multiplexing and control signal structure of the excitation channels 23 used in this embodiment.
• each of the excitation conductors 5 is connected to a respective input of one of the excitation switching blocks 50-0 to 50-Mmax.
• each of the excitation switching blocks 50 has eight outputs each for connection to a respective one of the excitation conductors 5, with the exception of the last output of the last excitation switching block 50-Mmax, which is not connected to an excitation conductor 5. The significance of this "missing" excitation conductor will become clear from the subsequent description.
• the number of excitation conductors 5 and the number of multiplexors used in the excitation channels 23 depends on the size of the display screen (not shown) for which the grid 3 of conductors is designed. As an example, a screen having a diagonal dimension of about 203cm (80 inches) and with a 16:9 aspect ratio, has a dimension in the X direction of approximately 177cm and a dimension in the Y direction of approximately 100cm. If forty excitation switching blocks 50 are provided each having eight outputs, then this allows for connection of three hundred and nineteen excitation conductors (whilst keeping the last output un- connected).
• excitation conductors 5 Three hundred and nineteen excitation conductors 5 arrayed evenly along the 177cm dimension, gives a spacing between adjacent excitation conductors 5 of approximately 5.6mm, which is sufficient to sense a user's finger and/or conductive stylus with an accuracy of 1 mm over the whole surface of the display.
• Figure 4 also shows the excitation and control signals output by the excitation and control signal logic 1 1 to the excitation channels 23. These signals include the following: ex_clock - this is the signal that is used to form the excitation signal that is applied to the selected excitation conductors 5. As shown in Figure 4, the ex_clock signal is inverted by an inverter 53 to form two excitation signals: ex- and ex+, which are applied, via resistors 54-a and 54-b, to each excitation switching block 50. The resistors 54 act with capacitors 63 (shown in Figure 5) that are attached to each excitation conductor 5 to filter out high frequency components of the excitation signal.
• ex_clock this is the signal that is used to form the excitation signal that is applied to the selected excitation conductors 5.
• the ex_clock signal is inverted by an inverter 53 to form two excitation signals: ex- and ex+, which are applied, via resistors 54-a and 54-b, to each excitation switching block 50.
• the resistors 54 act with capacitors
• in1 , in2, in1_shifted and in2_shifted - are control signals used to select which of the multiplexor output terminals are connected to the multiplexor input terminals.
• enable1_0 - this is an enable signal that is used to enable excitation switching block 50-0.
• the enable1_0 is delayed by respective delay line circuits 55-0 to 55-Mmax that are connected together in a serial manner.
• Each delay line circuit 55 outputs a shifted version of the input enable signal to the corresponding excitation switching block 50.
• delayl & delay2 - are control signals for controlling the delays introduced by the delay line circuits 55.
• FIG. 5 is a block diagram illustrating in more detail the content of each of the excitation switching blocks 50.
• each excitation switching block 50 includes two one-input and four-output multiplexors 65-1 and 65-2.
• Multiplexor 65-1 receives at its input the positive excitation signal (ex+) and multiplexor 65-2 receives at its input the negative input signal (ex-).
• the output, to which the input of the multiplexors 65 is connected, is selected based on the selection signals - in 1 and in2 for multiplexor 65-1 and in1_shifted and in2_shifted for multiplexor 65-2.
• the multiplexors 65 are arranged to be open circuit until they are enabled by a respective enable signal - enablel for multiplexor 65-1 and enablel . shifted for multiplexor 65-2.
• enable1_shifted is generated by delaying the enable1_0 signal by the associated delay line circuit 55.
• control of the connection through each multiplexor 65 is defined by the following truth table: in1/in1_shifted in2/in2_shifted Selected o/p
• FIG. 5 also shows the way in which the excitation switching blocks 50 are connected to the excitation conductors 5 via suitable grounding resistors 61 -0 to 61 -7 and grounding capacitors 63-0 to 63-7.
• Each capacitor 63 acts to filter out high frequency components of the excitation signals (ex+, ex-) switched through the multiplexors 65 and to filter out charge injection signal induced at the output of the multiplexors 65 at the fronts of the switching signals in 1 , in2, in1 _shifted, and in2_shifted.
• These capacitors 63 also provide an efficient grounding of the excitation conductors 5 which are not selected by the multiplexor 65. This reduces any induced voltage in the non selected excitation conductors that would otherwise float when not connected to the excitation input.
• Such induced voltage can be caused, for example, by the above described cross-talk between adjacent excitation conductors 5.
• the resistors 61 are provided in order to avoid any uncontrolled accumulation of static charge on the excitation conductors 5 which might otherwise destroy the electronics once the excitation conductor 5 is selected by the multiplexor 65. In particular, any DC charge built up on the excitation conductors 5 will pass to ground through the resistor 61 . Delay Line Circuits
• FIG. 6 is a block diagram illustrating the components of two adjacent delay line circuits 55-m-1 and 55-m; and illustrating the way in which they are connected together.
• each delay line circuit 55 includes a first latch 71 -1 and a second latch 71-2.
• the output of the first latch 71 -1 is connected to the input of the second latch 71 -2; and the output from the second latch 71 -2 is connected to the input of the first latch 71 -1 of the next delay line circuit 55.
• the output of the first latch 71 -1 provides the shifted enable signal to the corresponding excitation switching block 50.
• the first latches 71 -1 are clocked by the delayl control signal and the second latches 71 -2 are clocked by the delay2 signal.
• the arrangement of the delay line circuits 55 and of the various control signals allow the excitation signals (ex+ and ex-) to be applied sequentially to adjacent excitation conductors of the grid 3 in an overlapping manner.
• Figure 7 is a timing diagram illustrating the timings of the control signals used in Figure 6.
• Figure 7 shows the delayl control signal and the delay2 control signal that are used to clock the latches 71 within each delay line circuit 55.
• both delayl and delay2 are square wave signals, with delay2 being shifted in time by an amount M_e.
• Figure 7 also shows the enable1_(m-1 ) signal that is input to the first latch 71 -1 of delay line circuit 55-m-1 . This enable signal is latched through the first latch 71 -1 on the rising edge of delayl to generate the shifted enable signal enable1_shifted_(m-1 ).
• each delay line circuit 55 operates to generate two enable signals: enablel . shifted that is used to enable multiplexor 65-2 (shown in Figure 5) and the enable signal (enablel ) for the next multiplexor/delay circuit.
• enable signal When an enable signal is low, the corresponding multiplexor 65 is enabled and when the enable signal is high, the corresponding multiplexor 65 is disabled. Therefore, each excitation switching block 50 will be enabled during the period T_mux shown in Figure 7.
• the overall phase shift can range from 20% to less than 1 % of the excitation clock signal period.
• Figure 8 shows the cyclic nature of each of the enable signals.
• the excitation and control signal logic 1 1 sequentially applies the excitation signal across all of the excitation conductors 5.
• the period of this excitation cycle is given as T_ec.
• the excitation cycle T_ec will be forty times the period T_mux during which each excitation switching block 50 is enabled in turn.
• Figure 8 shows a portion (corresponding to three consecutive excitation cycles) of the overall measurement cycle and shows the enable signals used to enable the first and last excitation switching blocks 50.
• detections are made with respect to detection conductors Y m and Y m +i ; during the second of the three excitation cycles detections are made with respect to detection conductors Y m +2 and Y m +i ; and during last of the three excitation cycles detections are made with respect to detection conductors Y m +2 and Y m +3.
• the enable signals for the first excitation switching block 50-0 are brought low at the start of the excitation cycle, followed by the enable signals for the second excitation switching block 50-1 etc, until the end of the excitation cycle when the enable signals for the last excitation switching block 50-Mmax are brought low.
• Figure 9 is a timing diagram illustrating the way in which the excitation signals are sequentially applied to the excitation conductors 5 at a timing around the end of the first excitation cycle shown in Figure 8 and at the start of the second excitation cycle shown in Figure 8 (and labelled 79 in Figures 8 and 9).
• the time between each of the vertical dashed lines corresponds to the shift in time between the delayl and delay2 control signals (i.e. M_e) shown in Figure 7 and will be referred to in this embodiment as an excitation interval.
• excitation switching block 50-Mmax will output the positive excitation signal (ex+) to excitation conductor Xmax-1 and will output the negative excitation signal (ex-) to excitation conductor Xmax-2.
• two adjacent excitation conductors 5 on the grid 3 are driven with complimentary (180° phase shifted) excitation signals, which helps to reduce electromagnetic interference caused by applying the excitation signals to the selected excitation conductors 5.
• the enable signals for the last excitation switching block 50-M are still low and the multiplexor select signals in1 and in2 remain unchanged. Therefore, the positive excitation signal (ex+) continues to be applied to the excitation conductor Xmax-1 .
• the multiplexor select signals in1_shifted and in2_shifted now have values 1 and 0 respectively, which cause multiplexor 65-2 within excitation switching block 50-Mmax to connect the negative excitation signal (ex-) to output 3, which (as can be seen from Figures 4 and 5) is not connected to an excitation conductor.
• excitation conductor is notionally labelled Xmax in Figure 4 and in Figure 9 for ease of explanation.
• the end of excitation interval Atk_e corresponds to the end of the excitation cycle during which detections are made with respect to detection conductors Y m +i and Y m +2.
• the excitation sequence then immediately begins again in the next excitation interval At1_e where the enable signal (enable 1_0) used to enable the first excitation switching block 50-0 is again set to a low value.
• the multiplexor select signals in 1 and in2 both have value 0, which means that the positive clock signal (ex+) is applied to excitation conductor X0.
• the shifted enable signal (enable1_shifted) is still high and therefore the second multiplexor 65-2 (shown in Figure 5) of excitation switching block 50-0 is not enabled and the negative excitation signal is not applied to any of the excitation conductors 5.
• the shifted enable signal (enablel . shifted) goes low which enables the second multiplexor 65-2 in the first excitation switching block 50-0.
• the shifted multiplexor control signals (in1_shifted and in2_shifted) both have value 0, and therefore the negative excitation signal (ex-) is applied to excitation conductor X1 ; and the multiplexor select control signals in 1 and in2 have not changed and therefore, the positive excitation signal (ex+) is still applied to excitation conductor X0.
• the positive excitation signal is applied to excitation conductor X0 and the negative excitation signal is applied to the adjacent excitation conductor X1 .
• the positive excitation signal is applied to excitation conductor X2 and the negative excitation signal is applied to the adjacent excitation conductor X1 ; during the fourth excitation interval MA_e, the positive excitation signal is applied to excitation conductor X2 and the negative excitation signal is applied to the adjacent excitation conductor X3; during the fifth excitation interval ⁇ 5_ ⁇ , the positive excitation signal is applied to excitation conductor X4 and the negative excitation signal is applied to the adjacent excitation conductor X3, etc.
• excitation signals are applied to the excitation conductors sequentially and in an overlapping manner so that during each excitation interval, except for the first and last intervals ( ⁇ _1 e and Atk_e) of an excitation cycle, positive and negative excitation signals are applied to adjacent conductors.
• FIG 10 is a block diagram illustrating in more detail the switching and control signal structure of the measurement channels 25 used in this embodiment.
• each of the detection conductors 7 (labelled Y0 to Ymax) is connected to a respective input of one of the detection switching blocks 80-0 to 80- Nmax.
• each of the detection switching blocks 80 has eight inputs, each for connection to a detection conductor 7.
• the last detection conductor that is connected to one switching block 80-L is also connected to the input of the next detection switching block 80-L+1. The significance of this shared detection conductor will become clear from the subsequent description.
• the number of detection switching blocks 80 used in the measurement channels 25 depends on the number of detection conductors 7 (and hence on the size of the display screen) and the time available to switch the signals from the detection conductors 7 through each measurement channel.
• the number of detection switching blocks 80 used in the measurement channels 25 depends on the number of detection conductors 7 (and hence on the size of the display screen) and the time available to switch the signals from the detection conductors 7 through each measurement channel.
• fewer detection switching blocks 80 may be used if they each have more inputs or if there are fewer detection conductors 7.
• each detection switching block 80 has two outputs that are input to a respective amplification and filtering circuit 83-0 to 83-Nmax.
• the outputs from the amplification and filtering circuits 83 are then input to the sample and hold circuitry 15 for sampling and subsequent conversion into 5 digital values by the analogue to digital converter 13.
• Figure 10 also shows the control signals output by the excitation and control signal logic 1 1 to control the measurement channels 25.
• These signals include the following: in4, in3, in3_shifted and in4_shifted - these are control signals used to select which of the detection 10 switching block input terminals (and hence which detection conductors 7) are connected to the outputs of the detection switching block 80.
• ex_clock_shifted - this is a clock signal having the same frequency as the excitation signal that is applied to the excitation conductors 5.
• the phase of this clock signal is shifted slightly compared to the phase of the 15 excitation signal, to account for phase delays introduced in the digitiser.
• This clock signal is used to demodulate the signal received on the selected detection conductors 7.
• polarity - this is a control signal used to polarity modulate the signal from each detection conductor 7.
• Figure 1 1 is a block diagram illustrating in more detail the content of one of the detection switching blocks 80-L.
• the other detection switching blocks 80 used in this embodiment have the same structure.
• detection switching block 80-L includes two four-input and one-output multiplexors 91 -1 and 91 -2. As shown, input 1 of multiplexor 91 -1 is connected to detection conductor Y m ; input 2 of multiplexor
• 25 91 -1 is connected to detection conductor Y m +2; input 3 of multiplexor 91 -1 is connected to detection conductor Ym+6 and input 4 of multiplexor 91 -1 is connected to detection conductor Y m +4.
• input 1 of multiplexor 91 -2 is connected to detection conductor Y m +i; input 2 of multiplexor 91 -2 is connected to detection conductor Ym+3; input 3 of multiplexor 91 -2 is connected to detection conductor Y m +7 and input 4 of multiplexor 91 -2 is connected to detection conductor Y m +5.
• conductor Y m +7 are also connected to corresponding inputs of the multiplexors 91 in the adjacent detection switching blocks 80.
• detection conductor Y m is connected to input 3 of multiplexor 91 -2 of detection switching block 80-L-1 and detection conductor Y m +7 is connected to input 1 of multiplexor 91 -1 of detection switching block 80-L+1.
• the first and last detection switching blocks 80-0 and 80-Nmax will only share a detection conductor 7 with one other detection switching block 80.
• the detection conductor 7 that is coupled through each of the multiplexors 91 is selected based on the selection signals - in3 and in4 for multiplexor 91 -1 and in3_shifted and in4_shifted for multiplexor 91 -2.
• the control of the connection through each multiplexor 91 is defined by the following truth table: in3/in3_shifted in4/in4_shifted Selected i/p
• Figure 1 1 also shows that the detection switching blocks 80 are connected to the detection conductor 7 via suitable resistors 93-0 to 93-7 and capacitors 95-0 to 95-7.
• the capacitors 95 couple the detection conductor 7 directly to the mid-rail voltage level used in the measurement channels 25, which effectively grounds at high frequency the detection conductors 7 (as far as the measurement channels 25 are concerned) when they are not selected by the detection switching block 80. This helps to reduce measurement cross talk - when AC signals from an unselected detection conductor 7 capacitively couples into a selected detection conductor 7.
• the capacitors 95 also served to reduce the electromagnetic emission from detection conductors which is caused by the charge injection at the inputs of the multiplexors 91 at each front of the control signals in3, in4, in3_shifted, and in4_shifted.
• the resistors 93 also connect the detection conductors 7 to the mid-rail voltage level to avoid electrostatic charge build up on the grid 3.
• the outputs from the two multiplexors 91 are input to a respective differential amplifier 97-1 and 97-2.
• Amplifier 97-1 acts to convert the AC measurement current from output A into a corresponding analogue AC voltage.
• the amplifier 97-2 acts to convert the AC measurement current from output B into a corresponding analogue AC voltage.
• the voltage output by amplifier 97-1 is applied to terminals 1 and 4 of a demodulating switch 99 and the voltage output by amplifier 97-2 is applied to terminals 2 and 3 of the demodulating switch 99.
• the demodulating switch 99 acts to multiply a demod signal with each of the voltages from amplifiers 97-1 and 97-2.
• the demod signal is obtained by combining (in this example using an exclusive OR (XOR) gate 100) the polarity control signal and the ex_clock_sh ifted control signal.
• the ex_clock_shifted signal acts to effectively demodulate the incoming signal to a "baseband" (quasi DC) signal whose amplitude depends on the mutual capacitances between the selected excitation conductors 5 and the selected detection conductors 7; and the polarity control signal modulates this "baseband" signal up to a frequency corresponding to that of the polarity control signal.
• the output voltage from amplifier 97-1 passes through switch terminal 1 to the A * input of the amplification and filtering circuit 83; and the voltage output from amplifier 97-2 passes through switch terminal 3 to the B * input of the amplification and filtering circuit 83.
• the switch 99 changes position such that the output voltage from amplifier 97-1 passes through switch terminal 4 to the B * input of the amplification and filtering circuit 83; and the voltage output from amplifier 97-2 passes through switch terminal 2 to the A * input of the amplification and filtering circuit 83.
• the amplification and filtering circuit 83 amplifies the difference between A* and B*.
• the demodulating switch 99 and the amplification and filtering circuit 83 act to demodulate and amplify A-B or B-A, depending on the value (1 or 0) of the polarity control signal. Hence positive and negative measurements can be obtained from each individual detection conductor. Timing Diagrams
• Figure 12 is a timing diagram illustrating the timings of the control signals used in Figure 1 1 and showing which of the detection conductors 7 are selected through the switching block 80.
• Figure 12 also shows the enable1_0 signal shown in Figure 8.
• the multiplexor selection signals in3, in4, in3_shifted and in4_shifted all have the value zero. Therefore, during a first detection interval labelled Ati_d (which, in this embodiment, corresponds in duration to the above described excitation cycle, T_ec) detection conductor Y m will be connected through multiplexor 91 -1 to output A and detection conductor Y m +i will be connected through multiplexor 91 -2 to output B.
• next detection interval the value of the multiplexor switching signal in4 changes to the value 1 and accordingly, multiplexor 91 -1 connects detection conductor Y m +2 to the output A.
• next detection interval the value of the multiplexor select signal in4_shifted changes to 1 and as a result the multiplexor 91 -2 connects detection conductor Y m +3 to the output B. This process continues until the end of a detection cycle when each of the detection conductors 7 has been selected by the multiplexors 91 .
• the connection of the adjacent detection conductors 7 through the detection switching blocks 80 is staggered and such that during each detection interval, the signals from two adjacent detection conductors 7 are passed through to the outputs A and B of the two multiplexors 91 of each detection switching block 80.
• This allows differential measurements to be obtained from the signals from adjacent detection conductors.
• seven detection intervals are required in this embodiment to switch the signals from the eight detection conductors through the detection switching block 80. Only seven detection intervals are required because there is no need to obtain differential measurements of the signals from detection conductors Ym and Ym+7 as detection conductors Ym and Ym+7 are separated too far apart along the grid 3 to provide useful position information.
• the cyclic processing begins again.
• the period of this detection cycle is shown in Figure 12 and labelled T_dc and, in this embodiment, this period corresponds to the above described measurement cycle.
• the excitation and control signal logic 1 1 raises the frame reference signal 22 to signal to the measurement processing unit 19 that measurement data for the detection cycle that as just been completed will have been stored in memory 17 and is ready for processing.
• Figure 13 is a circuit diagram illustrating the main components of the amplification and filtering circuits 83 that are used in this embodiment to amplify and filter the signals output from the associated detection switching block 80.
• the two inputs A * and B' are input to the negative and positive inputs of a differential amplifier 1 15 having a generic gain of R2/R1 .
• the top R2 resistor is connected directly to the output of the amplifier.
• the top resistor R2 is connected to the output of an amplifier 1 17 that buffers a voltage that is voltage divided by the resistors R3 and R4 from the output of the differential amplifier 1 15. This arrangement allows a higher than normal gain for the first stage of the differential amplifier 1 15 given by:
• GAIN R2/R1 *(R3+R4)/R3
• the two capacitors 1 19-1 and 1 19-2 introduced in the R3:R4 divider modify the gain of the differential amplifier 1 15 to its generic value of R2/R1 at high and low frequencies, thus allowing to achieve the higher gain only for the signals having frequencies falling within the pass band of interest.
• the capacitors C connected at the node between resistors R1 and R2 at the input side of the differential amplifier 1 15 are used to achieve initial filtering of high frequency components in the signals obtained from the detection switching block 80.
• the corner frequency of this filter should be set to a higher value (than the overall corner frequency of the amplification and filtering circuit 83) in order to maintain high rejection of common mode signals in the main pass band.
• the main filtering of the high frequency signals is achieved with the third amplifier 121 which is configured as a second-order multiple feedback (MFB) low pass filter.
• the capacitor 123 and the resistor 125 provide a high pass filter in order to filter out low frequency noise and eliminate any DC offsets of the amplifiers at the output of the application and filtering circuit 83.
• Figure 14a illustrates the spectrum of the signals output by the detection switching blocks 80. Most of the desired signal components are around the frequency corresponding to the polarity control signal. The higher frequency components correspond to the high frequency demodulation harmonics generated by the demodulating switch 99.
• Figure 14b illustrates the desired frequency response of the amplification and filtering circuit 83 shown in Figure 13 to filter the signals obtained from the detection switching block 80.
• the high corner frequency of the filtering circuit 83 can be kept quite close to the frequency of the polarity signal.
• the high corner frequency has been set at 1 .5 times the frequency of the polarity signal. This allows the amplification and filtering circuit 83 to filter out almost all the high frequency harmonics generated by the demodulator switch 99.
• the low corner frequency of the filtering circuit 83 cannot be set very close to the frequency of the polarity signal.
• the low corner frequency of the amplification and filtering circuit 83 has been set at 100 times lower than the high corner frequency. This still allows the amplification and filtering circuit 83 to filter out the DC offsets of the amplifiers as well as most of the unwanted low frequency noise caused by the measurement circuitry 25 (and the display screen electronics) and allows for a well defined gain for the measured signals within the pass band of the filtering circuit 83.
• Figures 15 and 16 are timing diagrams which illustrate the timing of various control signals used in this embodiment and showing the way in which the output from one of the amplification and filtering circuits 83 (AF_out) varies during each excitation interval.
• Figure 15 shows the situation when there is no finger (or stylus) in the vicinity of the crossover point between the selected detection conductors 7 and the selected excitation conductors 5.
• the output from the amplification and filtering circuit 83 varies slightly about the mid rail voltage level.
• Figure 16 shows the situation when there is a finger (or stylus) in the vicinity of the crossover point between the selected detection conductors 7 and the selected excitation conductors.
• the output from the amplification and filtering circuit 83 builds up in amplitude from excitation interval M n _e until it reaches a peak negative value at the end of excitation interval ⁇ ⁇ +2_ ⁇ .
• the output signal then inverts in polarity as the scanning of the excitation signal across the gird of excitation conductors 5 passes the user's fingers or the stylus, and the amplitude then decreases over subsequent excitation intervals as the scanning of the excitation signal to the excitation conductors 5 moves away from the user's finger (or stylus). Therefore, the measurement processing unit 19 can process the amplitudes of the signals output by the amplification filtering circuits 83 to identify the locations of users' fingers or other objects that affect the mutual capacitance between the excitation and detection conductors.
• Figure 17a is a circuit diagram illustrating the main components of the sample and hold circuitry 15 used in this embodiment.
• the sample and hold circuitry 15 illustrated in Figure 17a receives inputs from four amplification and filtering circuits 83-0 to 83-3. As shown, the outputs from the amplification and filtering circuits 83 are input to a respective switch 151 -0 to 151 -3.
• Each switch 151 has two output terminals (labelled 1 and 2). The position of each switch 151 is controlled by a sample switch control signal that is generated by the excitation and control signal logic 11 .
• the sample switch control signal is shown in the timing diagram of Figure 17b. As shown, it has the same frequency as, although phase shifted from, the polarity modulation signal (polarity).
• polarity the polarity modulation signal
• each of the switches 151 connects its input to the output terminal labelled 1 .
• This means that the signals output by the amplification and filtering circuits 83 are applied to the capacitors labelled C1 . As a result, charge accumulates on the C1 capacitors until the sample switch signal goes low.
• the switches 151 switch the signals received from the amplification and filtering circuits 83 to their output terminal 2 so that the signals then start to charge up the capacitors labelled C2.
• the time that the sample switch signal is at a high level or a low level corresponds to one excitation interval ( ⁇ ⁇ _ ⁇ ).
• each of the C1 capacitors is connected to a respective input of a first multiplexor 155-1 and each of the C2 capacitors is connected to a respective input of a second multiplexor 155-2.
• the outputs from the two multiplexors 155 are input to the switch 157 which switches between the outputs from the two multiplexors.
• the switch 157 is also controlled by the sample switch signal and when the sample switch signal is high, the switch 157 connects the output from multiplexor 155-2 through to the input of the analogue to digital converter 13. When the sample switch signal is at a low value, the switch 157 connects the output from multiplexor 155-1 through to the input of the analogue to digital converter 13.
• the output of multiplexor 155-1 is open circuit when not connected to the analogue to digital converter by the switch 157. Therefore, when the output from the amplification and filtering circuits 83 are being charged onto the C1 capacitors, the multiplexor 155-1 connected to the C1 capacitors is open circuit at the switch 157 and thus will not affect the charging of the C1 capacitors. Similarly, when the signals from the amplification and filtering circuits 83 are being charged onto the C2 capacitors, the multiplexor 155-2 connected to the C2 capacitors is open circuit at the switch 157.
• Figures 17a and 17b also show the multiplexor control signals (in5 and in6) used to select which input of the multiplexors 155 is passed through to the output of the multiplexor 155. As shown, the following table shows the relationship between the values of these control signals to the selected multiplexor input.
• Figure 17b also shows the ADC trigger signal used to trigger the analogue to digital converter 13 to convert the output from the sample and hold circuitry 15 into a corresponding digital value.
• the ADC trigger signal has four pulses spaced during the relevant measurement interval so that the signal from each amplification and filtering circuit 83 will be sampled in turn.
• the excitation and control signal logic 1 1 operates independently of the measurement processing unit 19 and operates cyclically in a free running manner to produce the same control signals - measurement cycle after measurement cycle.
• Figure 18 is a block diagram that illustrates the main components of the excitation and control signal logic 1 1 used in this embodiment. As shown, the excitation and control signal logic 1 1 includes nineteen free running synchronised timers that are each clocked by a master clock signal and that each output one of the above described control signals.
• timers are just counters that output a suitably frequency reduced version of the master clock frequency, whereas other timers output a Pulse Width Modulated (PWM) signal (in particular the timers used to generate the enable signals and the multiplexor select signals used in the detection switching blocks).
• PWM Pulse Width Modulated
• Figure 19 is a flow chart illustrating the way in which the measurement processing unit 19 operates to process the measurement data stored in memory 17. This process is typically software controlled. As shown, in step s1 , the measurement processing unit 19 waits to receive the next frame reference signal 22 from the excitation and control signal logic 1 1 . When the frame reference signal 22 is received, the processing proceeds to step s3, where the measurement processing unit 19 reads the new ADC data from memory 17. This data will include a set of differential measurements, each measurement involving different combinations of mutual capacitances formed at four cross-over points between the selected excitation conductors 5 and the selected detection conductors 7. In step s5, the measurements are pre-processed to put them in a form that makes them more suitable for position sensing measurement.
• this preprocessing may simply involve subtracting a background value (a value unperturbed by a user's finger or stylus etc) from each of these measurements.
• the measurement processing unit 19 maintains a respective background value for each measurement point.
• this pre-processing of the measurement data may process the measurement data to determine separate measurements of the mutual capacitance between excitation conductor 5 and detection conductor 7 pairs.
• the measurement processing unit 19 processes at step s7 the adjusted measurements to determine if there are any areas of the digitiser 1 that have been touched, for example, by a user's fingers (or a stylus).
• step s9 the measurement processing unit 19 updates the background value for each raw measurement data point.
• the measurement processing unit 19 updates the background value for each raw measurement data point.
• an update of the background values will involve a digital filtering (smoothing) with a long time constant of the order of several minutes to avoid unwanted quick adjustment of the background values which can potentially trace and remove the effect of a slowly moving finger approaching the digitiser surface.
• step s7 the measurement processing unit 19 determines that there are areas of the digitiser 1 that have been touched, then the processing proceeds to step s1 1 where the measurement processing unit 19 determines if a current touched area relates to a touch by a small separate object (such as a finger or a stylus) or a touch by a large object (such as the palm of a user's hand or closely located multiple fingers). The measurement processing unit 19 then calculates position data for a small separate object in step s13 or calculates position data for a large object in step s15, depending on the determination made at step s1 1 . Areas of touch by small objects will be characterised by signals similar to those illustrated in Figure 16.
• the signals from large objects can be processed using an algorithm that aims for more crude position information compared with the algorithms used for determining the position of smaller separate objects, which typically should be positioned with 1 mm accuracy.
• the position of a small object can be calculated as a centre of the gravity of all the measurement data in the area of touch; and the position of more closely spaced fingers can be calculated by using a multiple peak fit to the measurement data.
• Distinguishing between small and large objects allows the digitiser 1 to report the different types of touches that have been detected which therefore allows a host processor (not shown) to take different control actions depending on whether or not the detected object is a small separate object or a large object. For example, if the host processor is running a drawing program, then detection of the large object can be used as an "eraser" function in the drawing program. In this way, the user experience of the electronic digitiser can be made similar to the normal use of a conventional "white board".
• step s17 the measurement processing unit 19 determines if there are any additional areas of the digitiser 1 that have been touched. If there are, then the processing returns to step s11 as before.
• step s19 the measurement processing unit 19 reports the position data to the host processor (not shown) via the host interface unit 21 . The processing then returns to step s1 where the measurement processing unit 19 awaits the next frame reference signal 22 indicating that the next set of measurements have been stored in the memory 17 and are ready to be processed.
• the excitation and control logic 1 1 operates autonomously with respect to the measurement processing unit 19; and in a "free running" manner.
• the excitation and control logic can be configured with simple clock circuits that can generate the required control signals in the required cyclic manner, without software processor control.
• Adjacent excitation conductors are energised in an overlapping manner so that during each excitation interval two adjacent excitation conductors are driven with complementary (180° phase shifted) excitation signals, allowing for a reduction in electromagnetic emissions by the digitiser grid 3 that might cause interference to other nearby electronic circuits.
• Detection conductors are sequentially switched through the measurement channels such that during the detection intervals, the signals from two detection conductors are passed through each detection switching block, from which differential measurements can be obtained - allowing for a reduction in noise picked up from the LCD screen or another external noise source.
• Each excitation conductor is energised during one period of the polarity signal, which cancels low frequency components in the signals measured with the amplification and filtering circuits. This also allows measurements to be obtained from each detection conductor for both polarities of the excitation signal and together with the overlapping selection of the excitation conductors allows for optimum measurement update rates.
• the excitation electronics are arranged so that at the end of one detection interval (excitation cycle) and at the start of the next detection interval, there are no overlapping excitation signals - as this helps to reduce the bandwidth requirements of the amplification and filtering circuit(s) used to amplify and filter the signals obtained from the detection conductors, which in turn reduces the noise contained in the final measurements.
• Figures 21 and 22 illustrate the case where the frequency of the excitation signal is the same as the frequency of the polarity control signal (i.e. 135kHz);
• Figures 23 and 24 illustrate the operation when the frequency of the excitation signal is twice the frequency of the polarity control signal (i.e. 270kHz);
• Figures 26 and 27 illustrate the case where the excitation frequency is three times the frequency of the polarity control signal (i.e. 405kHz);
• Figures 28 and 29 illustrate the situation where the excitation frequency is four times the frequency of the polarity control signal (i.e. 540kHz).
• Figure 21 illustrates the way in which the excitation signals are applied sequentially to the adjacent excitation conductors X0, X1 , X2, etc.
• a _e the excitation signal applied to one excitation conductor transitions from a one to a zero and the excitation signal applied to an adjacent excitation conductor transitions from a zero to a one.
• complimentary excitation signals are still being applied to adjacent excitation conductors. This is true for all excitation intervals except for the transitions at the start and end of the last excitation interval (Mk_e) of a given excitation cycle. As discussed above, this is because there is no excitation conductor Xmax connected to the last excitation switching block 50-Mmax.
• Figure 22 illustrates the voltages V1 to V4 generated in the amplification and filtering circuit 83 shown in Figure 20 (with voltages V1 and V2 multiplied by 240 and with voltage V3 multiplied by 2.5 - for ease of visualising the signals).
• the voltage V1 corresponds to the A* input to the amplification and filtering circuit 83
• the voltage V2 corresponds to the B* input to the amplification and filtering circuit 83.
• the output from the XOR gate 100 shown in Figure 1 1 will be a constant and therefore switch 99 will not change position (i.e. there is no demodulation in this example).
• the input signal V1 appearing at the A* input of the amplification and filtering circuit 83 will rise to a peak positive value with the rising edge of the clock signal (excitation signal) and will then decay until the falling edge of the clock signal at which point it will go to a peak negative voltage and then decay over time.
• This V1 voltage is amplified and filtered by the first stage of the amplification circuitry to generate the voltage V3.
• This V3 voltage is then amplified and filtered again through the remaining amplification and filtering circuit to generate the output voltage V4 that is a smoother sinusoidal voltage at the frequency of the polarity control signal (135kHz).
• Figure 22 also shows the sample switch signal used to control the sampling of the signals by the sample and hold circuitry 15. As shown, the sample switch signal is phase shifted from the polarity and the excitation signals so that the voltage V4 is sampled closer to its peak values during the corresponding excitation intervals.
• the rejection of external noise is not optimum as all noise signals within the range 2kHz to 200kHz will pass through the amplification and filtering circuit 83. This can be disadvantageous especially when the digitiser 1 is for use with an LCD display where it is not uncommon to have LCD switching noise at approximately 30kHz and power supply switching noise at approximately 100kHz.
• Figures 23 and 24 illustrate the signals obtained when the excitation frequency is twice the frequency of the polarity control signal.
• the odd numbered conductors have been held at Vcc when not selected for excitation. Therefore, when the excitation signal that is applied to excitation conductor X0 transitions from zero to one at the end of excitation interval Ati_e the excitation signal applied to the adjacent excitation conductor X1 transitions from a one to a zero. If excitation conductor X1 had not been held at Vcc, then the only opposing transition would occur in the middle of the excitation interval Ah_e.
• Figure 24 illustrates the voltages V1 , V2, V3 and V4 for this case where the excitation frequency is twice that of the polarity control signal.
• the dashed vertical lines shown in Figure 24 correspond to the transitions of the excitation signal.
• the excitation signal ex_clock
• the voltage V1 increases in amplitude and then decays during the first half of the clock period.
• the voltage output from amplifier 97-1 is switched onto the B* input to the amplification and filtering circuit 83 and therefore appears at V2.
• Figure 24 also shows the filtered signal V3 obtained by amplifying and filtering the difference between V1 and V2; and V4 shows the further amplified and filtered signal at the output of the amplification and filtering circuit 83.
• the output signal V4 is still a substantially sinusoidal signal at a frequency corresponding to the polarity control signal.
• Figure 24 also shows the sample switch control signal used to control the sampling of the signal output from the amplification and filtering circuit 83. As shown, the sample switch signal is shifted relative to the polarity signal so that the output V4 is sampled close to its peak value.
• Figure 25 illustrates a modified version of Figure 5 showing one way in which this can be achieved.
• the frequencies that will pass through the amplification and filtering circuit 83 include those between 70kHz and 470kHz (+-200kHz around 270kHz). Therefore, noise at a frequency of 100kHz will still pass through the amplification and filtering circuit 83.
• Figures 26 and 27 illustrate the operation when the excitation frequency is three times the frequency of the polarity control signal. As shown in Figure 26, in this case, there is no need to hold the odd numbered excitation conductors at Vcc. This is true in all cases where there is an even number of transitions in the excitation signal during each excitation interval Therefore, with this excitation frequency, there is no need to change the biasing scheme and the circuitry shown in Figure 5 can be used.
• the frequencies that will pass through the amplification and filtering circuit 83 include those between 205kHz and 605kHz (+-200kHz around 405kHz). Therefore, with this excitation frequency the 100kHz interfering signal will be filtered to a certain extent by the amplification and filtering circuit 83.
• Figure 28 and 29 illustrate the operation when the excitation frequency is four times the frequency of the polarity control signal.
• the odd numbered excitation conductors 5 should (preferably) be held at Vcc to optimise the number of opposing transitions of the excitation signal on adjacent excitation conductors.
• the pass band of the amplification and filtering circuit 83 corresponds to 340kHz to 740kHz (+-200kHz around 540kHz). In this case, sources of external noise at about 100kHz will be efficiently filtered out by the amplification and filtering circuit 83.
• the frequency of the excitation signal may be any integer multiple of the frequency of the polarity control signal.
• the integer chosen depends on the particular application and the noise sources that may be present.
• the inventor has found that an optimum ratio for the multiplexing strategy used in this embodiment is where the excitation frequency is about seven times the frequency of the polarity control signal. This gives an excitation frequency of 945kHz for the case where the polarity signal has a frequency of 135kHz.
• the excitation and detection conductors are formed from copper (or other low resistance material) operation of the digitiser at 945kHz is practical even for digitisers designed for use with large diagonal screens (having for example a diagonal of 203cm (80inches) or more).
• the excitation frequency should be restricted to about 70kHz for screens having a diagonal of about 75cm (30inches) to keep the amount of cross talk noise below 10% .
• the excitation frequency for such ITO based digitisers has to decrease further.
• reducing the excitation frequency also has the effect of reducing the amplitude of the signals that are being measured. This can be seen by comparing the amplitudes of the V4 signal shown in Figures 22, 24, 27 and 29.
• the amplitude of the V4 signal increases. As those skilled in the art will appreciate, this is because the measured signal caused by the mutual capacitive coupling depends linearly on the excitation frequency. Of course, whilst it is possible to reduce the frequency of the polarity control signal (in order to reduce the bandwidth of the filtering circuit which will also reduce the noise), doing so reduces the rate at which the new measurements can be obtained. As discussed above, the measurement update rate must be sufficient to allow the tracking of objects over the digitiser 1 and therefore, the frequency of the polarity control should be kept as high as possible - especially for large sized digitisers 1 .
• step s5 of Figure 19 the pre-processing performed on the raw measurement data in step s5 of Figure 19 simply involved the subtraction of a background value.
• a description will now be given of a more complex pre-processing that can be performed in step s5, which aims to derive measurements of the perturbation (change) of the mutual capacitive coupling between individual excitation and detection conductor pairs caused by a touch event, which provides a greater flexibility for dealing with complex touch objects.
• this more complex pre-processing does not determine these mutual capacitive coupling values for all cross-over points of the grid, only for the cross-over points where it is determined that the digitiser has been touched.
• each measurement value obtained from the above sensing algorithm provides a "double differential" measurement representing the difference in mutual couplings between two adjacent excitation conductors 5 and two adjacent detection conductors 7.
• Mij represents the mutual capacitive coupling between excitation conductor i and detection conductor j.
• the term in the first brackets represents the signal generated in detection conductor (j+1 ) as a result of driving adjacent excitation conductors (i and i-1 ) with opposite polarity excitation signals (ex+ and ex- ); and the term in the second bracket represents the signal generated in detection conductor (j) as a result of driving the same adjacent excitation conductors (i and i-1 ) with the same opposite polarity excitation signals (ex+ and ex-).
• the terms in the two brackets are subtracted from each other as a result of applying the signals from the two adjacent detection conductors to the different inputs of the differential amplifier 1 15 in the amplification and filtering circuit 83.
• each data value represents a combined effect from four adjacent cross-over points in the digitizer grid 3.
• Figure 30a shows part of the digitizer grid 3 around excitation conductors labeled i-1 , i and i+1 and detection conductors labeled j and j+1 .
• the dashed box 150-1 encloses the four cross-over points represented by the above double differential measurement.
• the scanning process selects excitation conductor i+1 instead of excitation conductor i-1 and the polarity control signal changes, so that the double differential measurement obtained at this time represents:
• Vi+i j (Mi+i j+1— Mij+i) - (M.+1J— Mij)
• the dashed box 150-2 shown in Figure 30a encloses the four cross-over points represented by this new double differential measurement.
• a new double differential measurement is obtained.
• the next detection conductor in this example j+2
• the values in each row representing the measurement values obtained for a given pair of detection conductors and the values in successive positions in the row correspond to the different measurement values obtained as a result of the successive switching of the excitation conductors from one excitation interval to the next.
• M-i is the effect of the missing wire (X ma x) which is equal to zero
• Mo is the effect of excitation conductor Xo.
• maxj M 0,maxj+1 - Mo.maxj which corresponds to the detection between detection conductors Ymax and Ymax-1 .
• maxj depends on how many differential measurements are obtained from the grid of detection conductors. In the embodiment described above where a differential measurement is obtained between each adjacent pair of detection conductors, maxj will be equal to the number of detection conductors minus two.
• M ma xi is the effect from the missing excitation conductor (X ma x) and is therefore equal to zero; and Mmaxi-i is the effect from excitation conductor X ma x-i .
• maxi is equal to the number of excitation conductors.
• each detection switching block 80 obtains signals to be amplified and filtered (before measuring) from seven pairs of detection conductors (this is illustrated in Figure 12 - by the seven different detection intervals) and so each matrix will have seven rows of values.
• each row will have values obtained when adjacent pairs of excitation conductors are energized and also when the last excitation conductor (5-X ma x-i) is energized on its own - so the matrix will have one more column than the number of excitation conductors 5.
• the following matrices will be produced:
• Figure 30b is a flowchart illustrating the processing steps performed by the measurement and processing unit 19 when this more complex pre-processing is performed in step s5 of Figure 19 in this embodiment.
• a respective background value is subtracted from each raw measurement value.
• the measurement and processing unit 19 stores a set of twenty four matrices (B m ) of background values that correspond to the above matrices of measurement values (V m ), such that the measurement values can have the corresponding background values subtracted from them by performing a matrix subtraction operation as follows:
• the values stored in the background compensated matrices V m comp identify how each measured value deviates from the corresponding background value (or unperturbed value).
• the values in all of these background compensated matrices should be very close to zero.
• this affects the capacitive coupling between the excitation conductors and the detection conductors in the vicinity of the finger, styli or other object and the corresponding values in the background compensated matrices will be much larger in magnitude.
• the signal measurements include a positive and negative spike in values next to each other (as illustrated in Figure 16) due to the differential nature of the measurements.
• a peak of one polarity will be observed at one edge of the object and a peak of opposite polarity will be observed at the other edge. Again, this is because the measurements represent differential changes in the capacitive coupling. So in the middle of the object, adjacent conductors are subject to similar conditions, and therefore the difference between the signals produced by them will be small.
• the processing described below aims to identify the characteristic positive and negative peaks associated with the presence of objects.
• the algorithm considers each row in each background compensated matrix (V m comp ) in turn; and a detection block index (m) and a row index pointer (j) that are used to control this processing are initialised to zero in steps s5-02 and s5-03 respectively.
• the measurement and processing unit 19 reads the values in the row pointed to by the row index (j) in the matrix pointed to by detection block index (m).
• step s5-05 the measurement and processing unit 19 compares the magnitude of each value in the selected row against a threshold value, in order to identify areas of possible touch inside the row where the magnitudes are greater than the threshold value.
• a threshold value a threshold value
• Such a simple selection requires further adjustment as this process might select, as separate touched areas, the opposite edges of the same large object. For instance, the differential measurements at the first boundary of a large object can provide high positive values; the middle of the object can result in nearly zero values and the opposite edge can provide large negative values.
• the measurement and processing unit 19 iteratively analyses the selected areas of possible touch (identified in step s5-05) in order to combine, if necessary, nearby possible touch areas together to capture touches from such large objects.
• step s5- 06 calculates a control parameter ⁇ which is equal to the sum of the differential measurement values in the initially selected area (or currently selected area if this is a subsequent iteration) of touch divided by the sum of the modulus of those differential measurement values.
• the calculated control parameter ⁇ should be close to zero. Large values of the control parameter ⁇ , especially values close to +1 or -1 , indicate that the initially selected possible touch area is incorrectly selected.
• the measurement and processing unit 19 finds the nearest touch area having a large control parameter value ⁇ with opposite polarity and merges the corresponding touch areas together (including all points between them) in order to minimise the value of the control parameter ⁇ for the new merged possible touch area.
• step s5-06 may join together touched areas which should be treated as separate ones. However, this is not a problem as all measurement values below the threshold value are later replaced with zero values to facilitate a more precise selection of individual touched areas in step s1 1 of Figure 19.
• the purpose of identifying the possible touched areas at this stage is to identify the parts of the background compensated matrices (V m comp ) that are to be processed to determine values representative of the change in mutual coupling between individual excitation conductor / detection conductor pairs (rather than the raw double differential measurements that are available in the background compensated matrices
• the algorithm then processes, in steps s5-07 to s5-09, the double differential measurement values within each area of possible touch to integrate the values along the row within each area of possible touch.
• the measurement and processing unit 19 determines if there are any more areas of possible touch (in the current row being processed) that have not been processed through steps s5-08 and s5-09. If there are, then in step s5-08 the measurement and processing unit 19 determines the start point (nstan) in the row and the end point (n en d) in the row of the area of possible touch to be processed. These start and end points are the first and last values in the area of possible touch whose values exceed the threshold value.
• step s5-09 the measurement and processing unit integrates the values between the start and end points and stores the integrated values in corresponding positions of a new row of a new matrix (U m ) having one less measurement, such that the number of columns in the new matrix equals the number of excitation conductors 5.
• Step s5-09 calculates such integrated values between n s tart and n e nci. More specifically, in this embodiment the following integrated values are calculated:
• the exact value of the constant Ko depends on the transient response of the amplification and filtering circuit 83 (which is shown in Figure 40c and will be described in more detail later).
• the signals received by the detection conductors will charge up dc blocking capacitors forming part of the amplification and filtering circuit 83.
• the amplification and filtering circuit 83 will not relax to the mid-rail voltage but to a midpoint level that deviates from the mid-rail by an amount that depends on the time constant of the amplification and filtering circuit 83 (which depends on the frequency of the polarity modulation signal and on the value of the low frequency corner of the amplification and filtering circuit 83).
• the constant Ko can be set close to 1 .04.
• the signal related to the same excitation conductor will be inversed at the input of the amplification and filtering circuit 83 and it will cause the amplification and filtering circuitry to relax to an opposite midpoint value.
• the two perturbations to the midpoint level from the positive and negative parts of the polarity period related to the signal from the same excitation conductor will cancel each other almost completely - only about 0.06% from the signal amplitude from the excitation conductorwill be left as a composite net perturbation to the midpoint level (and that net perturbation will relax to the mid-rail with a time constant determined by the low-frequency corner of the amplification and filter circuit 83).
• the measured value of the second amplitude of this AC signal will be about 4% higher compared to the first amplitude (and will have the opposite sign).
• multiplying the previous value by 1 .04 will compensate for this transient effect in the measurements.
• step s5-07 This completes the processing of the current area of possible touch and a similar process is performed for the next area of possible touch until it is determined in step s5-07 that there are no more areas of possible touch in the current row of raw double differential measurements being processed.
• the processing proceeds to step s5-10, where all empty cells (elements in the row for which the above integration process was not performed) in the current row of the corrected matrix are set to zero. Similarly, all cells having values (u orr ' m ij) that are less then the above (or similar) threshold value are also set to zero. This helps to separate out the touched areas which were not properly split out by the algorithm in step s5-06.
• Steps s5-1 1 , s5-12 and s5-13 ensure that the measurement and processing unit 19 repeats the above integration process for each row of each background compensated matrix V m comp .
• the result of such integration of the raw data is a set of new data matrices U m CO rr.
• the data in different columns correspond to the effect of individual different excitation conductors X, instead of the data in the initial set of matrices V m in which the data in most columns related to the differential effect of adjacent excitation conductors Xi and X,+i .
• step s5-14 shown in Figure 30c in which the m matrices (U m CO rr) are concatenated together to form a new data matrix LLited such that each column in the new matrix LLited corresponds to the effect of a particular excitation conductor X, and combines together consecutive differential measurements with pairs of the adjacent detection conductors Yk and Yk+i .
• the algorithm also reverses the sign of the data u orr ' m ij for each even detection interval j in each separate detection block m taking into account that the polarity of the differential detection of each detection conductor shown in Figure 12 remains constant during the time when such detection conductor is selected by the detection switching circuitry 80.
• the subsequent steps of the more complex pre-processing aim to integrate the values along each column of the united matrix (LLited) in a manner similar to the way in which the values in the rows of V m comp were integrated in step s5-09. Integrating along the columns is slightly more complex than the integration along the rows because the values at the start and end of each column correspond to differential measurements. This was not the case for the rows - as the first and last values of a row correspond to a situation when only one excitation conductor is being energised (see excitation intervals Ati_e and A _e in Figure 9). The effect of this is that if an object is placed over the top or bottom edge of the digitizer grid, only one of the characteristic positive and negative peaks will be found in the data values for that area of touch.
• a column index pointer (i) is initialised to zero.
• the measurement and processing unit 19 reads the values in the column pointed to by the column index pointer (i).
• the measurement and processing unit 19 compares the magnitude of each value in the selected column against a threshold value, in order to identify areas of possible touch within the column where the magnitudes are greater than the threshold value. Each area is identified by a start point (n s tart) and an end point (n en d).
• step s5-18 the measurement and processing unit 19 iteratively analyses the selected areas of possible touch (identified in step s5-17) in order to combine, if necessary, nearby possible touch areas together to capture touches from large objects.
• a control parameter ⁇ is calculated which is equal to the sum of the differential measurement values in the initially selected area (or currently selected area if this is a subsequent iteration) of touch divided by the sum of the modulus of those differential measurement values.
• the calculated control parameter ⁇ should be close to zero. Large values of the control parameter ⁇ , especially values close to +1 or -1 , indicate that the initially selected possible touch area is incorrectly selected.
• the measurement and processing unit 19 finds the nearest touch area having a large control parameter value ⁇ with opposite polarity and merges the corresponding touch areas together (including all points between them) in order to minimise the value of the control parameter ⁇ for the new merged possible touch area.
• step s5-18 the values within each area of touch are integrated from the start point to the end point and the integrated values are stored in corresponding positions of a new column of a new matrix (W) having one more row than matrix LLiteci.
• the values in the matrix LLited represent the difference in mutual coupling between an excitation conductor (i) and two adjacent detection conductors.
• the value at the start of the area of possible touch can be represented by:
• Wi,nstart+2 Ui, nstart+1 + Ui,nstart
• the coefficient Ko is not applicable for this calculation as adjacent data in the column represent measurements obtained in adjacent detection intervals and during the time between these intervals any transients will have settled to zero.
• the calculation of new values continues in this way until the end of the selected touch area is reached.
• the calculated value of Wi, ne nd+i should equal zero - because it should equal Mi, ne nd+i and this value should be zero as it forms part of u ne nd+i which is zero.
• Wi, nen d+i calculated in this way will not equal zero due to the cumulative effect of noise in the measurements and due to the slow shift of the mid-rail level from its previous value.
• step s5-19 a check is made in step s5-19 if there are any more areas of possible touch that have to be processed in the current column. If there are, then the processing proceeds to step s5-20 where the start point (ristart) and the end point (n en d) for the next area of possible touch are determined/retrieved.
• step s5-21 the measurement and processing unit 19 determines if the data points at the start of the column are included in the current area of possible touch.
• step s 5-22 the integration is performed in step s 5-22 starting from the end point (n en d) and working back to the start of the column; and the integrated values that are determined are stored in corresponding positions of a corresponding column of the new matrix (W orr ).
• step 5-21 If the measurement and processing unit 19 determines, at step 5-21 , that the area of possible touch does not include data points from the start of the column, then the processing proceeds to step s5-23 where the measurement and processing unit 19 determines if the data points at the end of the column are included in the current area of possible touch. If they are, then the integration is performed in step s 5-24 starting from the start point (n s tart) and working to the end of the column. No gradient correction is performed in this case as there is no zero boundary condition at the end of the column; and therefore the integrated values that are determined are stored in corresponding positions of the corresponding column of the new matrix (W orr ).
• step 5-23 If the measurement and processing unit 19 determines, at step 5-23, that the area of possible touch does not include data points from the end of the column, then the processing proceeds to step s5-25 where the measurement and processing unit 19 performs the integration starting from the start point (n s tart) and working to the end point (n en d). The integrated values thus determined are then corrected using the above gradient correction and the corrected values are stored in corresponding positions of the corresponding column of the new matrix (W orr ).
• step s5-19 the processing is repeated for all other areas of possible touch in the current column, until there are no more areas of possible touch in the current column still to be processed.
• the processing proceeds from step s5-19 to step s5-26, where all cells in the current column of W orr that do not contain a value and any cells of W orr for which the calculated value is less than the threshold value, are set to the value zero.
• the processing then proceeds to step s5-27 where the measurement and processing unit 19 increments the column index pointer (i) and then checks to see if the column index pointer has exceeded the limit - maxi (indicating that all columns of LLited have been processed).
• step s5-16 If the limit has not been exceeded, then the processing returns to step s5-16 and the process is repeated for the next column of values read from LLited. Once all columns have been processed in this way the pre-processing ends and the result is a new matrix W orr in which data in different rows now corresponds to the effect of each individual detection conductor 7 and the data in different columns now corresponds to the effect of each individual excitation conductor 5. The processing then resumes from step s6 in Figure 19 using the newly generated matrix W orr .
• the advantage of this pre-processing illustrated in Figure 30 is that a more accurate determination of the position of the touched area can be determined from the change in mutual capacitance values contained in W orr than can be obtained from the raw double differential measurements. Additionally, by identifying the start and end points where there are possible areas of touch, changes in mutual capacitance values are only calculated for a very small proportion of measurement points (1 to 5% of all measurement points, depending on the number of touches) thus improving both the processing speed and the signal to noise ratio for the calculated answers.
• a dynamic selection of the zero boundary conditions was implemented at steps s5-05 and s5-06 prior to the integration process being implemented at steps s5-08 and s5-09 (see Figure 30b).
• the integration process decides that the integration has crossed the first boundary of the touch area and is progressing inside the actual area of touch. Thus, the integration process starts monitoring the condition corresponding to reaching the second boundary of the touch area. To do this the integration process further compares the magnitude of each calculated value u m j with the second (larger) threshold and the value of v m P j with the first (smaller) threshold. If the magnitudes of both u m j and v m P j fall below the corresponding thresholds, the measurement and processing unit 19 makes a determination that the second zero boundary of the touch area has been crossed and assigns n en d to equal the current value of p. In the next step the algorithm determines the start position of the area of touch n s tart in order to apply the gradient correction to the already calculated data inside the just determined touch area in the manner similar to that used in step s5-09 in the first embodiment:
• ucorr,m kJ u m k . _ ⁇ *( ⁇
• the corrected value u orr ' m j is equal to zero and is used to continue the integration process until the end of the row is reached.
• the algorithm further takes into account that the last data point u m maxij — V m maxij Ko*u m maxi-i j must be equal to zero as it is related to the effect of the missing conductor X ma x.
• the integration along the columns performed in steps s5-22, s5-24 or s5-25 might fail as all the inputs of the detection switching blocks 80 are connected to detection conductors 7.
• Such a change in the wiring of the detection circuitry will allow to provide well defined zero boundary conditions for the integration of the data similar to the one used in the step s5-09 or to the alternative embodiment with seed integration point described in the previous paragraph.
• a "missing" excitation conductor can be introduced in each excitation switching block 50.
• one (or more) conductor in each detection switching block 80 can be connected to the mid-rail instead of to the grid 3 (further, in such an embodiment there is no need to share detection conductors between adjacent switching blocks).
• Such "missing" conductors not connected to the sensor grid 3 will split the measurement matrix of the grid 3 into multiple blocks with well defined zero boundary conditions for integration. Effectively in such an embodiment a significant number of excitations will be carried out non-differentially and a substantial number of measurements will be taken non-differentially. As will be apparent from the previous discussion, the data corresponding to such non-differential measurements will make the integration task more straightforward.
• each detection switching block 80 The number of conductors inside the integration area of each multiple block is reduced and therefore a better signal to noise ratio can be achieved.
• a significant number of non-differential excitations used during the excitation cycle can cause a significant increase in the amount of electromagnetic radiation from the grid 3 of the digitiser.
• a large number of non-differential measurements carried out by each detection switching block 80 will increase the efficiency of coupling of external noise into the measurement circuitry thus reducing the achievable signal to noise ratio. While such increase in the EMI is insignificant for small diagonal size systems with 30cm diagonal or less, it becomes a major issue for larger digitisers having, for example, a 2 meter diagonal size.
• a polarity control signal was applied to (multiplied with) the signal obtained from each selected detection conductor.
• This polarity control signal was applied by the demodulating switch 99.
• the polarity control signal may be applied to the excitation signal before it is applied to each excitation conductor 5.
• Figure 31 a illustrates one way in which this may be achieved. As shown in Figure 31a, the positive excitation signal (ex+) is formed by taking the exclusive-or (XOR) of the polarity control signal and the ex_clock signal. Similarly, the negative excitation signal (ex-) is obtained by taking the exclusive-or of the inverted polarity signal and ex_clock.
• Figure 31 b illustrates the form of the excitation signals applied to the selected excitation conductors.
• the excitation signal is applied to each excitation conductor in turn and in an overlapping manner.
• the excitation signal applied to each excitation conductor is applied for two consecutive excitation intervals and ⁇ , + ⁇ _ ⁇ ). Further, the polarity of the excitation signal applied to each excitation conductor is inverted between the two excitation intervals. This inversion of the excitation signal is caused by the use of the polarity control signal in the excitation circuitry.
• Figure 31 b illustrates the case where there are 16 excitation periods per period of the polarity control signal. However, due to the polarity control signal being applied on the excitation side, one excitation pulse is lost and so only 15 pulses are applied to each excitation conductor. Therefore, in this sense, applying the polarity control signal on the excitation side is less efficient than applying it on the detection side.
• Figure 32 illustrates the case where there are 17 periods per polarity period, but due to the polarity signal, one excitation pulse is lost and so only 16 pulses are actually applied.
• Figure 33 illustrates the detection switching block 80 used in this alternative embodiment.
• the demod signal corresponds to the ex_clock_shifted signal of the first embodiment.
• the output from the amplification and filtering circuit 83 is the same as in the first embodiment for a case where there is a user's finger and where there is no finger present adjacent the conductors being interrogated. Therefore, the polarity control signal can be applied either on the detection side or on the excitation side of the circuitry, without materially affecting the operation of the embodiment.
• the outputs from four amplification and filtering circuits were passed through a sample and hold circuit 15.
• the ADCJrigger signal causes the ADC to sample the output from the sample and hold circuitry 15 at regularly spaced intervals during the excitation intervals.
• Figures 36 and 37 illustrate an alternative embodiment where there are fewer amplification and filtering circuits and where the ADCJrigger signal causes the ADC 13 to convert the output from the sample hold circuitry 15 at the beginning of each excitation interval.
• the C1 and C2 capacitors are connected to different inputs of a 4-input 1 -output multiplexor 155.
• the ADCJrigger signal is generated by the trigger_clock signal that is selectively switched via the switch 156; and the position of the switch 156 is controlled by the in7 control signal.
• Figure 38 illustrates an alternative embodiment where the missing excitation conductor Xmax is included and connected to the last excitation switching block 50-Mmax.
• the polarity control signal is applied on the excitation side of the digitiser electronics rather than on the detection side as per the first embodiment.
• the polarity control signal is applied does not affect the operation of the embodiment.
• Figure 40b also illustrates, by the dashed line 193, the bandwidth of the amplification and filtering circuits 83 used in the first embodiment.
• the additional excitation conductor connected in the manner shown in Figure 38 results in a significant increase in the bandwidth of the amplification and filtering circuits 83, which in turn increases the amount of noise that will pass through the amplification and filtering circuits and into the measurements that are obtained.
• the signal caused by the excitation conductor X ma x at the beginning of the excitation cycle will perturb the instantaneous value of the midpoint for subsequent signals which will be output from the amplification and filtering circuits 83.
• the perturbation of the midpoint level will be about 4% of the amplitude of the signal related to the excitation conductor X ma x.
• the transient perturbation can be reduced down to 0.2% if the low corner frequency of the filter is reduced to about 1 :2,000 of the frequency of the polarity modulation signal bringing it close to several hundred Hz.
• the small level of transient perturbation in such case is close to the noise level and can be neglected in the data processing steps of the measurement processing unit 19.
• the transient perturbation of the midpoint level caused by the signal from conductor X ma x will relax over time with a time constant determined by the low corner frequency of the filter circuit 83 and will decay almost to zero by the time it can be compensated by the opposite polarity signal related to the excitation conductor X ma x at the end of the given excitation cycle. Whilst there will be a similar perturbation as a result of energising the other excitation conductors, those conductors will be energised with opposite polarity signals in the next excitation interval and so the perturbations will substantially cancel each other out.
• Figure 40c is a plot that illustrates the way in which a voltage generated in the amplification and filtering circuit 83 rises to a peak value of uy (corresponding to the differential mutual capacitive coupling My+i - Mij) and then, once the next excitation conductor is selected, the voltage drops (not to the mid-rail level) but to a level of (Ko-1 )Uij. This forms the basis of the above described transient perturbation that will decay almost to zero during the time interval corresponding to the single excitation cycle.
• FIG. 40d illustrates the perturbation—(Ko-1 )u ma xi,j-i from the preceding excitation cycle that is present at the beginning of the current excitation cycle - when excitation conductor X max is energised again.
• energising X ma x results in a new transient perturbation (Ko-1 )u ma xi,j that is opposite in sign to the perturbation from the preceding excitation cycle.
• the net perturbation is [(Ko- 1 )Umaxij - (Ko-1 )Umaxij-i] multiplied by an exponential term (as the perturbations decay over time).
• these perturbations will have decayed to substantially zero and a new perturbation -(Ko-1 )u m axi j will be generated that will feed into the next excitation cycle.
• this perturbation to the midpoint level caused by the excitation signal being applied to the conductor X ma x can be taken into account and partially removed by the measurement and processing unit 19 by modifying the more complex pre-processing performed in step s5 described above with reference to Figure 30b - and this modified process is illustrated in Figure 40e.
• the same reference numerals as those used in Figure 30b are used in Figure 40e to refer to steps that have not changed.
• the effect caused by the unperturbed mutual capacitance (i.e. when there is no object near conductor Xmax) between the conductor X ma x and corresponding detection conductors is a stable (reproducible from measurement cycle to measurement cycle) unwanted signal. It will cause a static shift of the midpoint level in the consecutive measurement points which will have the same value each measurement cycle. Such a static effect is fully removed by subtracting the background values in step s5-01.
• the dynamic effect of the variation to the signal from the conductor X ma x caused by the presence of a target like a finger(s) or a stylus can be calculated approximately using an integration algorithm with zero boundary conditions.
• each row of the background compensated matrices will start from the differential excitation between the conductors Xmax and Xo and will finish with the differential excitation between the conductors X ma x-i and X ma x.
• excitation conductor X ma x is energised at both the beginning and the end of the excitation cycle, the value of the signal related to the excitation of conductor X ma x can be calculated by identifying areas with small perturbation adjacent to the end of the current row being processed.
• the measurement and processing unit 19 processes the data in step s5-30 to find the zero boundary region (area of possible touch) at the end of the row. It does this in a similar manner to the way in which the measurement and processing unit 19 identifies the areas of possible touch in steps s5-05 and s5-06, except in this step the processing focusses on the data at the end of the row and possible touch areas at the start and end of the row can be combined into one possible area of touch.
• step s5-31 the measurement and processing unit 19 checks to see if the data at the end of the row is in an area of possible touch.
• step s5-31 the measurement and processing unit 19 determines that the data at the end of the row is in an area of possible touch, then a different correction (correction B) is performed at step s5-33 using the perturbation caused by exciting X ma x at the end of the previous excitation cycle (-(Ko-1 )u m axij-i) and the perturbation caused by exciting X ma x at the start of the current excitation cycle ((Ko-1 )u m axij). Details of the corrections applied in steps s5-32 and s5-33 will now be given. Correction A
• V ⁇ rr,m i 0 v m. cope . ( Ko-1 )[ jjm ⁇ . Q . U m ma xijmax]exp(i/A) for 0 ⁇ i ⁇ maxi
• step s5-05 the measurement and processing unit 19 processes the now corrected data to identify areas of possible touch, as before these areas are potentially combined in step s5-06' in order to minimise the control parameter ⁇ for each area of possible touch.
• the processing performed in step s5-06' is arranged to consider joining together possible touched areas located at the beginning and the end of the row. In all other aspects step s5-06' is identical to step s5-06 of Figure 30b.
• the enable control signals and the multiplexor select signals (in 1 , in2, in1_shifted and in2_shifted) have half the frequency than those used in the first embodiment. Therefore, during the first excitation interval (Ati_e) and during the last excitation interval (Atk_e) for the same configuration of detection conductors, the signal applied to conductor X ma x has both positive and negative versions of the excitation clock signal. As a result, the frequency spectrum of the signals obtained in this embodiment correspond with those shown in Figure 14a and therefore, amplification and filtering circuits 83 having narrower pass bands can be used. However, as those skilled in the art will appreciate, with this modification, the update rate of the system is reduced by two without any sizeable improvement in the signal to noise ratio.
• Figures 41 and 42 show that during each excitation interval (M,_e) the system is now measuring an AC type of signal, with both a positive and negative voltage level per configuration of excitation and detection conductors. This is more clearly seen in Figure 42 - which shows the output from the amplification and filtering circuit 83 in the presence of a user's finger.
• the excitation signal is scanned along the excitation conductors 5 from one side of the grid 3 to the other side. This is because the Xo conductor is located at one side of the grid 3 and the Xmax (or X ma x-1 ) conductor is located at the opposite side of the grid 3.
• the excitation signal may be scanned across the gird two or more times.
• Figure 43 illustrates an embodiment where the excitation signal is scanned from right to left across the grid from conductor Xo to conductor X and is then scanned from left to right from conductor Xi+i to conductor Xmax.
• the complex pre-processing of the measurement data performed by the measurement and processing unit 19 in step s5 will result in adjacent columns of matrix LLited generated in step s5-14 not relating to immediately adjacent excitation conductors.
• the data in the matrix LLited will be in two halves, with the data from the first half corresponding to the scan in one direction and the data in the second half corresponding to the scan in the opposite direction.
• the data in the matrix LLited is preferably rearranged so that adjacent columns in LLited do correspond to the effect of immediately adjacent excitation conductors 5. This will involve reversing the order of the columns in the second half of LLited and interleaving them between the columns in the first half of LLited. The processing can then proceed as before. Alternatively, this rearranging of the columns can be performed on the columns of W orr after the data values in each column have been integrated.
• Figure 43 shows the excitation switching blocks 50 on each side of the excitation conductors 5, this is shown for ease of illustration.
• the excitation circuitry that is used to apply the excitation signals to the excitation conductors 5 is preferably provided on one side of the excitation conductors 5, like the arrangement shown in Figure 3.
• the processing of the signals from the detection conductors may also be scanned from one end of the array of detection conductors to the other and then back to the starting end (any integer number of times).
• detection conductor Y ma x is also input to detection switching block 80_0 and detection conductor Yk is also connected to detection switching block 80_k+1 and thus the scanning is circular in nature.
• This arrangement may be particularly useful when combined with the alternative illustrated in Figure 43 in order to provide similar differential scanning processes for both the excitation and detection conductors.
• the inventor has found that taking differential measurements between detection conductors that are not immediately adjacent each other (but still close by) helps to increase the signal levels and hence the signal to noise ratio obtained. Further, the integration process described above allows these differential measurements to be combined to obtain measurements in respect of each individual detection conductor 7. This is similarly true for the excitation conductors 5.
• each detection switching block 80 is connected to detection conductors that are more widely separated along the grid 3 than in the first embodiment (see Figure 10).
• detection switching block 80_1 is connected at one end to the thirteenth detection conductor in the grid 3 (labelled ⁇ ) and at the other end to the twenty seventh detection conductor in the grid 3 (labelled Y13). If the spacing between adjacent conductors is 5mm, then the detection switching block 80_1 will span 70mm. In the first embodiment, each detection switching block 80 only spanned 35mm.
• This embodiment therefore requires longer signal lines to connect the detection conductors 7 to the corresponding detection switching blocks 80, which introduces more noise into the signal measurements (compared with the noise introduced in the first embodiment) and will require the use of wider PCBs for the detection switching blocks 80.
• the inventor has realised that it is possible to perform the above type of circular scanning process to obtain differential measurements between detection conductors that are not immediately adjacent each other whilst keeping the more compact layout of Figure 10. This is achieved by modifying the wiring of the individual detection conductors 7 to the multiplexors 91 inside the individual detection switching blocks 80, such as in the manner shown in Figure 44b.
• Figure 44c illustrates a timing diagram for an overall detection cycle in which differential measurements are obtained between pairs of detection conductors when connected to the multiplexors 91 in the manner shown in Figure 44b.
• Figure 44c shows that during the first and the last detection intervals Ati_d and Ats_d the amplifiers 97 are connected to adjacent conductors.
• the rows of the matrix W orr should be re-arranged to take into account the circular nature of the scanning detection process before the data in W orr is processed to identify locations of touch in step s13 or step s15 of Figure 19. In the case where the scanning process scans from one end of the grid 3 to the other and back again only once in each detection cycle, this will involve reversing the order of the rows in the second half of the matrix W orr and then interleaving those rows between the rows of the first half of the matrix W orr .
• the columns of W orr should also be re- arranged in the manner discussed above with reference to Figure 43.
• the result of this processing will be a matrix of values where the rows represent the effect of a single detection conductor and the columns represent the effect of a single excitation conductor, such that each value in the matrix represents the change in mutual capacitance (over the unperturbed state) between the corresponding excitation/detection conductor pair, which facilitates the subsequent determination of the location of any objects touching the digitiser.
• a pair of detection conductors 7 was selected by each detection switching block 80 and then the excitation signals were sequentially applied in the above described overlapping manner to the excitation conductors 5. Once all of the excitation conductors have been energised, the excitation cycle ends and the next pair of detection conductors for each detection switching block were then selected.
• the excitation signals may be applied to a selected pair of excitation conductors and the pairs of detection conductors 7 may be sequentially switched through the detection switching blocks 80 before changing to the next pair of excitation conductors and cycling through the detection conductors 7 again. Timing diagrams illustrating the operation of such embodiment are shown in Figures 45 and 46.
• the excitation interval is given by During each excitation interval, the excitation signals (ex+ and ex-) are applied to the same selected pair of excitation conductors (in this example conductors X n and X n +i). Each excitation interval is divided into a number of detection intervals (Atj_d) - in this case eight detection intervals, during each of which a different pair of detection conductors is selected by each detection switching block 80.
• FIG. 45 shows excitation performed with an excitation switching block shown in the Figure 25, which allows to pull excitation conductors sequentially either to the ground or to the power supply voltage in order to achieve the timing diagram of excitation signals illustrated in Figure 45.
• Figure 46 shows that once all the pairs of excitation conductors 5 have been selected for excitation, at the end of the excitation cycle (T_ ec ), the frame reference signal 22 is generated and then the processing begins again.
• FIG 47a illustrates a preferred form of the detection switching block 80 used in this embodiment.
• the structure of the detection switching block 80 is similar to the detection switching block structure used in the first embodiment except that input 3 of the multiplexor 91 -2 (which was connected to conductor Y m +7 in Figure 1 1 ) is now held at the mid-rail voltage level.
• each detection switching block 80 only has seven input conductors Y m to Y m +6, and in this case conductor Y m and conductor Y m +6 are not shared with the adjacent detection switching blocks 80 (as it can be considered that the conductor connected to the mid-rail is shared with the adjacent detection switching blocks instead). Therefore, in this embodiment, the same twenty four detection switching blocks 80 would be required to process the signals from one hundred and sixty eight detection conductors 7.
• Figure 47a also illustrates a possible modification to the analogue circuitry of the switching block 80.
• This modification can provide a better rejection of external common mode noise and reduces the overall power consumption of the analogue circuitry due to the simplification of the amplification and filtering block 83 as discussed below.
• a new fully differential amplifier 97 is used to amplify the differential current between the terminals A and B.
• the common mode current in terminals A and B is grounded via the set of capacitors 95 as the virtual resistance of the fully differential amplifier 97 for the common mode current is infinitely high.
• the virtual input resistance to the differential current is quite low (the differential input voltage must be almost zero for an amplifier with a high open loop gain) and therefore the differential current is mainly flowing via the feedback resistors R with only a small amount of current diverted to ground via the set of capacitors 95.
• the circuitry provides a band pass filter with amplification based on a simplified version of a third-order MFB (multiple feedback) low-pass filter coupled with a second-order high pass filter.
• the modified amplification and filtering circuitry 83-1 requires only two amplifiers 1 15 and 121 compared with the previous version (shown in Figure 20) which was based on three amplifiers.
• FIG 48 illustrates the way in which the signals are switched through the switching blocks 80.
• each detection cycle (T_dc) is split into eight detection intervals (Ati_d to Ats_d).
• each of the detection conductors Y m to Y m +6 is connected through the detection switching block 80 for two consecutive detection intervals and in an overlapping manner.
• one detection interval corresponds to half the period of the polarity control signal.
• the polarity control signal is either used on the excitation side or on the detection side to invert the polarity of the received signal.
• each detection conductor 7 is switched through the detection switching block 80 for two consecutive detection intervals, a measurement can be obtained from each detection conductor for both polarities. It is desirable that the signals obtained from each detection conductor 7 include both polarities so that no low frequency components are introduced into the measured signals from each detection conductor 7.
• Figure 48 also shows the output from the associated amplification and filtering circuit 83 when there is no finger or object adjacent the selected excitation and detection conductors; and Figure 49 shows a similar plot to that shown in Figure 48, except showing a typical response that will be obtained from the output of the amplification and filtering circuits 83 when there is a finger or other object adjacent currently selected excitation and detection conductors.
• each detection switching block 80 will switch seven detection conductors through the same amplification and filtering circuit. As these conductors are relatively closely spaced, it is likely that the presence of a finger will affect the signals obtained from the conductors connected to the same detection switching block 80.
• the finger is likely to be centered over detection conductor Y m +3, corresponding to the peak signal that is generated and also corresponding to the conductor where the polarity of the output signal changes.
• the integration is performed first with respect to the columns of the background compensated matrices (V m comp ) and then with respect to the rows. Also, as each background compensated matrix (V m comp ) has known non-differential measurements at the start and end thereof, the integration can be performed along the entire column (so there is no need to look for areas of potential touch first). In particular, because in the first and last detection intervals (Ati_d and ⁇ &_ ⁇ ) one of the inputs to the amplifier and filtering circuit 83 is connected to the mid-rail voltage, the measurement value generated during these detection intervals is not a differential measurement and can be used to seed or initiate the integration process as follows:
• w m ij ma x should equal to zero (as it corresponds to an input that is permanently connected to the mid-rail voltage), but in practice due to noise etc the calculated value of w m ij ma x is unlikely to be equal to zero and it can be used to perform a similar gradient correction to that performed in the first embodiment to produce a corrected column of values w corr ' m i, j .
• an alternative approach for integrating such differential measurement data can be implemented using an integration algorithm similar to steps s5-05 to s5-10 described for the first embodiment with reference to Figure 30b (which identifies possible areas of touch and then integrates the data within those areas).
• this approach might be especially useful for analysing data from detection switching blocks having a large number of individual conductors. For instance, it can be successfully used for the case when fifteen detection conductors are multiplexed through the same detection switching block with the sixteenth input to the multiplexor 91 being connected to the reference voltage.
• the integration algorithm can be further modified in order to compare at each integration step the result (w m i, p+ i) with a threshold value. For any result with a magnitude below the threshold value the result (w m i, p+ i) is nulled out (set to zero). This helps to avoid accumulation of measurement noise from areas outside of the touch area and is especially useful if the detection conductor related to the result w m i,o is outside of the actual area of touch.
• the integration algorithm of this embodiment will keep all calculated results (w m i, p+ i) at zero until the actual touch area is met.
• the excitation scanning process used in this embodiment is a circular scanning process (like in embodiment described with reference to Figure 43)
• the order of the rows is re-arranged with a view to match it with the actual order of the excitation conductors 5 in the grid 3.
• this requires the following rearrangement of the rows: uo, u ma xj, Ui, u ma xj-i, u 2 ... U( ma xj + 3)/2, u( ma xj-i)/2, U(maxj+i)/2.
• the final matrix U corr will hold data values uy that corresponds to the perturbation of the mutual capacitance of the cross-over point between an excitation conductor i and detection conductor j.
• Such additional frequency component 201 is much closer in frequency to the frequency of the polarity control signal (compared to the additional frequency component 189 shown in Figure 40a) because there are only four periods of the polarity control signal within each detection cycle. This in turn is because there are fewer detection conductors 7 and these are being multiplexed through parallel detection switching blocks 80. Therefore, as shown in Figure 51 b, if all of the multiplexor inputs of the detection switching blocks 80 are connected to detection conductors, then the amplification and filtering circuits 83 will require a frequency response 203 that has a wider pass band than the filter response 193 required when one of the multiplexor inputs of the detection switching blocks 80 is held at the mid-rail voltage level.
• holding one of the inputs into the detection switching block to the mid-rail voltage level is analogous to the "missing" conductor of the last excitation switching block 50-Mmax of the first embodiment.
• the main difference is that in the first embodiment, only one output from the last excitation switching block 50-Mmax was not connected to an excitation conductor.
• one of the inputs to each of the detection switching blocks 80 should be connected to the mid-rail voltage if the additional frequency component 201 is to be avoided.
• the frequency of the additional frequency component 201 is relatively close to the main peak of the desired signal at the frequency of the polarity signal, it may be preferable to connect the detection conductors through the detection switching blocks 80 in the manner shown in Figure 33 (if the polarity signal is being applied on the excitation side) or Figure 1 1 (if the polarity signal is being applied on the detection side); by performing all measurements as differential detection such an arrangement provides better rejection of common mode noise that may be picked-up by the detection conductors 7 from the switching events in the electronics of an LCD screen that is provided under the grid 3.
• detection conductor Y m shown in Figure 33 is shared with the previous detection switching block 80-L-1 and if both detection switching blocks 80 are connected in the same way, then during the first detection interval (Ati_d) conductor Y m will be connected to the A output of multiplexor 91 - 1 in switching block 80-L and will be connected to the B output of multiplexor 91 -2 in detection switching block 80-L-1 .
• such a dual connection through two detection switching blocks 80 will cause erroneous measurements to be obtained from conductor Y m .
• adjacent detection switching blocks 80 should be configured differently so that the same detection conductor is not switched through two switching blocks at the same time.
• Figure 52a is a block diagram illustrating the way in which this can be achieved for a preceding detection switching block 80-L-1 which connects to detection conductors Y m to Y m -7; and Figure 52b is a timing diagram illustrating the timing of when the signals from the detection conductors Y m to Y m -7 are connected through the detection switching block 80-L-1 during one detection cycle.
• detection conductor Y m is now connected through detection switching block 80-L-1 during detection intervals A _d and Ats_d and this does not conflict with the connection of conductor Y m through detection switching block 80-L (shown in Figure 33 or 1 1 ).
• Figure 53 illustrates an alternative way to solve the problem of additional frequency components in the measurement signals and that allows all of the detection switching blocks 80 to have the same configuration similar to one shown in Figure 1 1 or Figure 33.
• the frequency of the multiplexor select signals (in3, in4, in3_shifted and in4_shifted) has been reduced compared to those shown in Figure 48b.
• the frequency of these multiplexor select switches is such that during each detection interval (Ati_d) the polarity control signal cycles through one period and therefore, the detection signals received during each detection interval will include both polarities and will not, therefore, include the above described low frequency component that would be present if there is only one polarity.
• the multiplexors 91 -1 and 91 -2 were switched at different moments in time. Namely, multiplexor 91 -1 was switched on the negative edges of the polarity signal and multiplexor 91 -2 was switched on the positive edges of the polarity signal.
• a small amount of charge is always injected into the switching channel via capacitive coupling between the channel and the gates in the transistors. Typical values of the charge injection are about 5pC and in most analogue measurement circuits such charge injection does not cause any issues.
• the frequency of the polarity modulation control signal can be as high as 250kHz in order to achieve a measurement rate of 100Hz in spite of the large number of cross-over sensing nodes.
• the filtering of the charge injection current becomes much less efficient due to the increase in the high frequency corner of the filter 83 and care should be taken to reduce such unwanted charge injection into the detected signal before it is applied to the amplification and filtering circuitry 83.
• One way to reduce the effect of the switching current injected by the multiplexors is to use the switching circuitry shown in the Figure 55a which is arranged to switch the signals through the multiplexors 91 -1 to 91 -4 in the manner shown in Figure 55b.
• the switching events are now arranged symmetrically - the detection conductors connected to channels A and B are switched simultaneously at each positive and negative edge of the polarity signal (shown in previous embodiments).
• the explicit polarity signal in the embodiment of Figure 55a.
• FIG. 56a Another way of reducing the effect caused by the charge injection from the multiplexor 91 is shown in the Figure 56a.
• the demodulation multiplexor 99 has an additional enable input signal "blanked-off".
• This new control signal "blanked-off” is used to disconnect the amplification and filtering circuitry 83 from the detection switching block 80 for a short period of time when the unwanted injected current from the multiplexor 91 would otherwise be passed through from the fully differential amplifier 97.
• This embodiment is cheaper to implement compared to the solution of Figure 55a as it does not require any extra electronic components (analogue switches).
• the blanked-off signal should disable multiplexor 99 at each edge and immediately after each edge of the polarity modulation signal.
• the duration of the blanked-off signal pulse can be equal to or slightly smaller than half the period of the excitation clock (ex).
• the duration of the blanked-off pulse can be equal to 250ns, which is enough to let the output of the fully differential amplifier 97 to relax to its unperturbed value.
• the blanked-off signal disconnects the amplification and filtering circuitry 83 from the detection switching block 80 during the time when no excitation edges are applied to the system - excitation signals ex+ and ex- themselves have the missing transition edge at each positive and negative edge of the polarity signal.
• the usage of the blanked-off signal does not change any signals measured by the amplification and filtering circuitry, and it can eliminate almost completely the effect of the unwanted charge injection from the multiplexor 91 .
• the charge injection in the demodulation multiplexor 99 is not relevant to the actual performance of the measurement circuitry; the effect of the unwanted charge injection at this point in the circuitry does not typically exceed 10 -5 of the value of the maximum measured signals.
• excitation signals ex+ and ex- are created from a digital (square wave) signal. They are applied symmetrically in the opposite phase to each other and thus do not provide significant levels of electromagnetic radiation. Nevertheless it might be advantageous to filter- out high frequency harmonics in the excitation signals ex+ and ex- in order to suppress even more efficiently the frequency components above 30MHz which potentially can be radiated via very long excitation conductors. Such filtering can modify slightly the exact level of low and high signals in the ex+ and ex- channels such that the deviation can be of the order of 1% or more.
• Such an uncompensated jump for the voltage level can represent an additional perturbation of the midpoint level of the signal in the amplification and filtering circuitry 83 from the mid-rail level.
• the blanked-off signal disconnects the amplification and filtering circuitry 83 from the detection switching block 80 at and immediately after each edge of the polarity signal. By coincidence, it will also blank- off the signal related to this extra jump in the voltage of the excitation conductor as the edges of the excitation window are fully aligned with the edges of the polarity modulation control signal.
• detection conductors 7 and excitation conductors 5 were grounded using low impedance capacitors 63 (see Figure 5) and 95 (see Figure 1 1 ).
• the low impedance to ground for excitation or detection conductors which are not selected in the excitation and measurement interval reduces unwanted effects of mutual capacitive coupling between adjacent excitation conductors or between adjacent detection conductors. If non-selected conductors are left floating they can introduce significant crosstalk between signals measured at adjacent crossover points.
• the capacitance of the capacitors 63 or 95 provided by the electronics located on a PCB board is connected in parallel to the capacitance from the conductor in question to all other non-floating conductors in the grid as well as to the capacitance between the conductor in question and the ground plane of the LCD screen (or the metallic walls of the whiteboard display).
• the net capacitance of the conductor in question to ground might become several times larger compared to the capacitance of the capacitors 63 or 95.
• capacitors 63 and 95 with a capacitance of the order of five times larger compared to the unwanted capacitive coupling between adjacent parallel conductors in order to reduce such crosstalk; or in terms of impedance requires the impedance presented by the capacitors 63 and 95 to be of the order of five times smaller than the impedance between adjacent conductors.
• the overall resistance of the conductors can become very large and thus will be the main limiting factor for increasing the excitation frequency.
• the combined impedance of the capacitors 63 and resistors 61 should not exceed twice the impedance of the conductors in order to avoid introducing even further limitation to the value of the excitation frequency which can be used with the grid.
• the termination capacitors 63 and 95 filter high frequency signals induced on the conductors during charge injection by the multiplexors and thus help with EMC compliance for the electronics of the digitiser.
• FIG. 56c An alternative embodiment for grounding the detection conductors is shown in Figure 56c (a similar arrangement can be used to ground the excitation conductors).
• a dedicated pair of switches per detection conductor is used to connect the detection conductor either to the mid-rail voltage level or to the detection switching block amplifier 97 under the control of digital signals (swO to sw7).
• the switching can be arranged to keep the same timing sequence as shown in previous Figures. However in this embodiment it is achieved using more digital control signals and twice the number of analogue multiplexors compared to the embodiments described above.
• FIG 57b is a block diagram of a detection switching block 80 that may be used in such an embodiment.
• the detection switching block 80 includes one multiplexor 91 that selectively couples one of the four input detection conductors through to the differential amplifier 97 and the demodulating switch 99.
• the digitiser 1 was arranged with excitation channels 23 connected only at one end of the grid 5.
• the same excitation channel circuitry may be connected to both ends of the excitation conductors 5 by using an additional set of electronics 210 to duplicate the excitation channels as shown in Figure 58a.
• each excitation conductor 5 will be selected by the corresponding excitation blocks 50 belonging to excitation channels 210 and 23 simultaneously at both ends and additionally each excitation conductor 5 will be grounded at both ends via capacitors 63 as shown for each excitation block 50 in Figure 5.
• capacitive crosstalk between excitation conductors can be reduced by a factor ranging from two to four depending on the overall resistance of the excitation conductors.
• the resistance of the excitation conductors is high, the crosstalk between excitation conductors is usually quite large, and this embodiment will achieve a fourfold reduction in the crosstalk.
• the reduction in the crosstalk allows the use of a higher excitation frequency and thus allows an increase in the measurement speed of each detection switching block 80.
• more detection conductors can be multiplexed via the existing detection switching blocks 80. This can reduce the cost of the overall system as the cost of the analogue parts used in the detection circuitry (measurement channels 25) is substantially higher than the cost of the digital parts used in the excitation channel circuitry 210.
• the digitiser 1 was arranged to detect objects that affect the mutual capacitance between the selected excitation and detection conductors.
• the digitiser 1 may also be arranged to detect resonant target objects that inductively couple with the conductors in the digitiser.
• Such a dual capacitive and inductive digitiser embodiment preferably operates where the detection intervals are shorter than the excitation intervals - i.e. where the excitation signals are fixed and the detection conductors are multiplexed through the detection switching blocks before the excitation conductors are changed and the multiplexing of the detection conductors starts again.
• the polarity modulation signal in this embodiment is preferably applied on the detection side (in the detection switching blocks 80) in the manner shown in Figure 1 1 , in order to avoid continuous perturbation to the phase of the excitation signals.
• inductive resonant target based digitisers tend to require a relatively stable excitation signal to be applied to the excitation conductors in order to achieve a steady state level of energising an inductive resonant target with relatively high Q-factor located in the vicinity of the digitiser.
• the excitation conductors need to be able to carry AC excitation current with which the inductive resonant target can couple via mutual inductance.
• Figure 58b illustrates that this can be achieved by adding ex+/ex- reversal signal 215 to the electronics of the duplicate excitation channel 210.
• the ex+/ex- reversal signal 215 can be applied instead of the polarity modulation signal for the embodiment of the excitation channel circuitry 210 shown in the Figure 31 a.
• the excitation and control signal logic 1 1 can configure the excitation and measurement channels 210, 23, and 25 to make the desired scanning of excitation/detection conductors for inductive sensing. Namely, during the first mode of operation the AC voltages at both ends of an excitation conductor selected simultaneously by the excitation circuitry 210 and 23 will have the same phase during the measurements of capacitive coupling at all cross-over points as described in the embodiment of Figure 58a. No net current is carried by the excitation conductors selected by the excitation circuitry 210 and 23 during this first mode of operation.
• the polarity of ex+ and ex- signals is reversed in the excitation channels 210 using control signal 215.
• Such polarity reversal caused by the signal 215 is constant during the second mode of operation; the signal 215 is provided to the measurement processing unit 19 to inform the processing algorithm that the second mode of operation is selected during the present set of measurements.
• a positive AC voltage will be applied at one end of the first excitation conductor selected by the excitation circuitry 23 and a negative AC voltage is simultaneously applied at the opposite end of the same excitation conductor by the excitation circuitry 210.
• a significant AC current of the order of few mA will flow through the excitation conductor selected by the excitation channels 210 and 23.
• the amplitude of the AC current is determined mainly by the value of the resistance of the conductors 5 and only partially to its self inductance.
• the resistance of the excitation conductors varies from 100 Ohms to 400 Ohms depending on the size of the digitiser.
• an AC current of the order of 10 mA can be applied to the excitation conductors without the need to use a large excitation AC voltage.
• the AC current in the second (adjacent) excitation conductor that is simultaneously selected by the circuitry 210 and 23 will be excited in the opposite polarity to the AC current excited in the first excitation conductor described above.
• excitation conductors selected simultaneously by the circuitry 210 and 23 are used to generate an AC magnetic field in the vicinity of the excitation conductors.
• This AC magnetic field can couple to a resonant inductive target located near the selected conductors.
• a resonant target energised in this way can be arranged to generate its own AC electric field which can then be sensed by measuring the AC electric current generated by the resonant target in the detection conductors.
• the resonant target may generate its AC electric field by applying an AC voltage between the outer surface of the stylus (capacitively coupled to the ground via the user palm) and an electrode at the tip of the resonant target; the AC voltage source may be powered directly by an inductor coil that inductively couples with the magnetic field generated by the selected excitation conductors or can be further amplified using power from an internal battery.
• the amplification circuitry inside the stylus can provide further active filtering of the external noise coupled to the resonant circuit outside of the excitation frequency pass band and can provide additional adjustment to the phase shift for the amplified AC voltage signal applied to the electrode at the tip of the stylus.
• the internal battery can be disconnected from the amplification circuitry most of the time until the minimum level of AC voltage is developed in the resonant circuit due to the inductive coupling to the excitation channel of the digitiser or/and until the tip of the stylus is pushed against the surface of the digitiser to activate a pressure sensitive electronic switch.
• an active stylus can have additional circuitry that transmits with a slow update rate of several Hz via an additional wireless channel (e.g. using short-wavelength radio or ultrasonic transmissions) additional information such as pressure applied to the tip of the stylus and even the orientation of the stylus if the stylus includes a built in accelerometer.
• Such additional information can be used to correct the apparent position of the stylus (using angular data) and to emulate in software a true natural drawing experience achieved with the active stylus.
• the battery of the stylus can be recharged wirelessly in a cradle mounted at the edge of the digitiser using an inductive power link between the AC power source operating at the excitation frequency of the digitiser and the resonant inductive circuitry of the stylus.
• An AC electric field energised in such a manner by the internal coil of the resonant target can be measured by the detection circuitry via an AC current generated in the detection conductors caused by the mutual capacitive coupling between the tip of the resonant target and the detection conductors.
• the excitation signals ex+ and ex- can be applied to the excitation circuitry 210 and 23 during this second mode of operation in a PWM (Pulse Width Modulation) manner with short excitation intervals followed by short silent intervals during which no excitation signals are applied to the grid 3.
• PWM Pulse Width Modulation
• Such PWM modulation can be implemented inside the excitation and control signal logic 1 1 or outside of the microcontroller by using periodic analogue or digital switching of the ex+ and ex- signal lines to the ground or Vcc level respectively during the silent intervals.
• the measurement of induced signals in such an embodiment is performed during time intervals when no excitation signal is applied to the excitation conductors 5.
• Such a new measurement mode during the silent intervals of the excitation signal can be facilitated by using the blanked off signal at the demodulation multiplexor as shown in the Figure 56a.
• the excitation signal sequence before starting the detection cycle in the second mode, it might be necessary to run the excitation signal sequence for some time to stabilise the level of the AC current induced in the resonant target. This allows all detection signals to be measured under similar conditions when the amount of energy received by the resonant target during the excitation interval is equal to the AC energy loss from the resonant target during the silence interval.
• the way in which such signals relating to the inductive coupling should be processed by the measurement processing unit 19 will be familiar to those skilled in the art and a further description will not be given here.
• the raw measurements can be taken during the time when excitation current is applied to the excitation conductors - thus removing the need to have silent intervals and allowing for increased measurement speed.
• the unwanted contribution due to the capacitive coupling of objects other than the inductively coupled stylus can be removed by the measurement processing unit 19.
• the matrix W cap acitive may be calculated during step s-05 for the capacitive measurement mode and the matrix Winductive may be calculated during step s-05 for the inductive measurement mode.
• the values in matrix Winductive can then be further corrected to reduce the effect of objects other than the inductive object of interest using the matrix W capa citive.
• Winductive orr the corrected matrix for the inductive measurements
• coefficient ⁇ is a constant that is close to one; and is used to take into account a ratio between the maximum voltage applied to the end of the excitation conductor during the inductive measurement mode and the voltage applied to the excitation conductor during the capacitive measurement mode.
• missing excitation conductors or non-connected inputs to the measurement channels were used to reduce the bandwidth requirements of the amplification and filtering circuitry.
• a similar effect can be achieved without these "missing connections" by controlling the multiplexors using modified control signals - that achieves the same switching timings approach with reduced low frequency harmonics in the received signals as illustrated in the Figures.
• this can be achieved by simply increasing the length of the excitation cycle T_ec shown in Figure 8 by one excitation interval M_e (see Figure 9) in order to align the falling edge of the signal enable1_0 with the rising edge of the signal enable1_shifted_Mmax.
• this modification to the control signals will shift the timing diagram for the conductors X0, X1 , X2, etc. selected during the consecutive excitation cycle by one excitation interval and thus will allow activation of the conductor Xmax with the excitation signal.
• such an embodiment is not preferred as it also requires a change of the phases of the control signals in1 , in2, in1_shifted, and in2_shifted at the start of each excitation cycle T_ec, which requires more complex control signal logic that uses more PWM signals, digital switches and logic gates to form the desired control signals.
• the excitation cycle can be extended by a multiple of eight excitation intervals thus keeping signals in1 , in2, in1_shifted, and in2_shifted as free running clock signals without the need to adjust their phases.
• the excitation cycle T_ec might even become much longer than the corresponding detection interval ⁇ _ ⁇ (see Figure 8).
• Such an embodiment can be useful when the grid of conductors 3 is integrated within the structure of the LCD screen itself. In particular, when the grid 3 is integrated with an LCD display, this usually results in an increased level of switching noise picked up by the detection conductors of the digitiser due to the LCD drive signals used to drive the LCD display.
• Adding in such additional excitation intervals allows for a time division multiplexing between the digitiser electronics and the electronics of the LCD screen. For instance, by doubling the length of the excitation cycle T_ec and keeping the same length for the detection interval ⁇ _ ⁇ it is possible to keep the first half of the excitation cycle for the measurements of the signals from the digitiser, and the second half of the excitation cycle T_ec can be used to switch signals that control the operation of the LCD screen.
• a control signal i7 shown in the embodiment of the sample and hold circuitry 15 of Figures 36 and 37 can be used to disable the ADC controller during the second half of the excitation cycle T_ec.
• signals delayl and delay2 were used in the delay line circuit 55 to control the timing of the enable signals provided to various switching blocks 50.
• the frequency and the phase of such delayl and delay2 signals are similar to those of the in1 and in1_shifted signals.
• signals in 1 and in1_shifted both for controlling the excitation switching blocks 50 and the delay line circuits 55.
• sample and hold circuitry 15 was used to facilitate the measurement of the signal level in different measurement channels at the same moment in time.
• An alternative approach will now be described with reference to Figure 59a.
• new dedicated delay circuitry 14 is introduced in order to control the timing of the different measurement channels with a view to generate signal forms AF_out with exact phases shifted between consecutive amplification and filtering circuits 83.
• the shifted phase approach explained below allows to multiplex analogue signals AF_out_L consecutively using a simple analogue switch 16 instead of the more complex sample and hold circuitry 15 of the main embodiment described above.
• an extra enable signal enb2 is introduce to control the multiplexors 91 as shown in Figure 59b.
• enb2 signal is pushed to a high level at the end of each active detection cycle in order to create an extra detection interval (Atg_d shown in Figure 59c).
• the input multiplexors 91 are disconnected from the grid 7 during this new detection interval and thus a zero differential value is measured during this interval regardless of the excitation signals applied at the excitation channels.
• This extra detection interval Atg_d allows the introduction of a de-phasing between the edges of the detection cycle Tjc shown in Figure 59c and the excitation window ⁇ ⁇ + ⁇ _ ⁇ shown in the same Figure.
• the switching of one of the excitation conductors in the excitation pair occurs during the detection interval Atg_d of the current detection cycle and detection interval Atg_d of the previous detection cycle.
• the exact phase of the synthesised signal AF_out depends on the phase of seven control signals like polarity, in3, in4, in3_shifted, in4_shifted, enb2, and blanked-off (not shown). These signals can be shifted from one detection switching block 80_k to the next detection switching block 80_k+1 using latches in a manner similar to that used for phase shifting the enable signals applied to the excitation switching blocks using the circuitry shown in Figures 6 and 7.
• Figure 59d shows an arrangement for using latches 77 to delay the polarity control signal between adjacent detection switching blocks 80.
• two already generated signals - ex_clock_sh ifted and ex_clock (used in the excitation channels) with dissimilar phases are used to shift the polarity control signal by one period of the excitation cycle at each delay block 14_m. All other control signals should be taken through similar delay blocks to achieve synchronous delay for all control signals for the same detection switching block 80 except the signal ex_clock_shifted.
• a typical ADC can perform the analogue to digital conversion of the input signal during one period of the excitation signal.
• the approach described above will allow measurement of consecutively different analogue outputs AF_out via the same ADC channel without the need for the sample and hold circuitry 15.
• a new pair of signals delay3 and delay4 can be used to take the role of signals exc_clock_sh ifted and ex_clock used in the latches shown in Figure 59d.
• the update rate is slightly reduced due to the introduction of the extra detection interval Atg_d.
• the exact order of switching of the detection conductors at the boundary of the detection cycle is modified between adjacent detection cycles.
• the detection cycle shown in Figure 59c begins with the detection pair Y m and Y m +7.
• the next detection cycle will start from detection conductor pair Y m and Y m +i which have been selected during the detection window At 2 _d in the current detection cycle. Consequently the next detection cycle will be finished by measuring at interval Ats_d the detection conductor pair Y m and Y m +7 which have been selected during the detection window Ati_d in the current detection cycle.
• Such shift will be repeated cyclically at each consecutive detection cycle.
• these changes to the detection sequences can be taken into account in the software.
• the signal to noise ratio can be improved via increasing the excitation power - for instance by increasing the amplitude of the excitation voltage from 3V to 12V and/or by increasing the excitation frequency.
• a practical example discussed below relates to a measurement system using two separate excitation sources with different frequencies.
• the first half of the excitation switching blocks 50 are connected to the first excitation source having a first excitation frequency and the second half of the excitation switching blocks 50 are connected to the second excitation source having a second excitation frequency.
• Each of the two halves of the excitation channels created this way are treated as fully separate excitation grids and are run in parallel using the same control signal enable1_0 (shown in Figure 8) which is separately delayed in the delay circuitries 55 of each of two halves of the excitation channels.
• the measurements acquired by the differential amplifiers 97-1 and 97-2 will contain signals related to the two pairs of excitation conductors.
• One pair of excitation conductors (from the first half of the excitation grid) is excited at the first frequency and the other pair of excitation conductors (from the second half of the excitation grid) is excited at the second excitation frequency.
• the signals from the amplifiers 97-1 and 97-2 should be taken into two separate demodulators 99.
• the first demodulator 99-1 is designed to demodulate (and polarity modulate) at the first excitation frequency and the second demodulator 99-2 is designed to demodulate (and polarity modulate) at the second excitation frequency.
• the two signals demodulated at either demodulator are then passed through separate amplification and filtering circuits 83 and are measured as two separate signals by the ADC 13.
• an unwanted signal with a frequency equal to the difference between the first excitation frequency and the second excitation frequency (hereafter referred to as the differential frequency), will be created by the demodulators 99; but it can be efficiently filtered if this differential frequency is at least several times larger (preferably at least three times larger) compared to the high frequency corner of the amplification and filtering circuitry 83.
• the differential frequency should be at least eight times larger than the frequency of the sample switch control signal (shown in Figure 17a) (or the polarity control signal if one is used) and can be for instance achieved by making the first excitation frequency equal to 32 times the frequency of the sample switch control signal and by making the second excitation frequency equal to 40 times the frequency of the sample switch control signal.
• the reduction might be about 1 :600 and thus there will be no or substantially no detectable crosstalk between simultaneous measurements undertaken with the two dissimilar excitation frequencies applied to the different parts of the grid.
• the differential frequency is equal to four times the frequency of the sample switch control signal (which can be achieved, for example, by setting the first excitation frequency to be twenty times the frequency of the sample switch control signal and the second excitation frequency to be 16 times (or 24 times) the frequency of the sample switch control signal)
• the reduction of the unwanted signal at the differential frequency by the filtering circuitry 83 might be about 1 :16 and this is not enough to prevent significant crosstalk between simultaneous measurements with two dissimilar excitation frequencies being introduced into the measured signals.
• additional measures (described below) can be taken to reduce the crosstalk interference caused by this unwanted signal.
• the charge applied to the DC blocking capacitors during one half period of the sample switch control signal will have the same polarity as the charge applied during the previous (and next) half period of the sample switch signal.
• a substantial accumulation of overall charge can happen which will result in unwanted DC transients passing through the amplification and filtering circuitry 83 to the sampling circuitry 15.
• the polarity of the charge injected in the DC blocking capacitors in the amplification and filtering circuitry 83 will be the same in all sample switch half periods. Consequently, if the polarity control signal is being used then the same charge injection will have opposite polarity in adjacent half periods of the sample switch control signal. Thus the total charge injected into the DC blocking capacitors will be fully compensated during each period of the sample switch signal if the differential frequency is equal to an even multiple of the frequency of the sample switch control signal and if the polarity control signal is used (on the excitation side or on the detection side).
• the sample switch control signal is phase aligned with the unwanted signal at the differential frequency so that the switching points of the sample switch control signal correspond to when the unwanted signal passes through zero, then the effect of the unwanted signal in the measurements obtained by the sample and hold circuitry 15 can be significantly reduced - and this is possible when the phase of the unwanted signal is approximately 90° shifted from the phase of the desired signal output from the amplification and filtering circuitry 83.
• the exact phase of the unwanted signal at the differential frequency that is output by the amplification and filtering circuitry 83 (and thus the phase difference between it and the phase of the desired signal) will depend on the design of the amplification and filtering circuitry 83 and the frequency difference between the two signals. Therefore, for some differential frequencies it is possible to achieve the desired phase alignment, whilst for others it will not be.
• the outputs obtained by digitizing the analogue signals from the output of the amplification and filtering circuits 83 with the ADC controller 13, will contain very little crosstalk between the two different excitation sources.
• the inventor has found that by making the first excitation frequency equal to ten times the frequency of the sample switch control signal and by making the second excitation frequency equal to eight times (or alternatively twelve times) the frequency of the sample switch control signal, it is possible using this phase alignment approach to isolate the signals from the first half of the excitation channels (excited at the first excitation frequency) from the signals from the second half of the excitation channels (excited at the second excitation frequency).
• the degree of such isolation depends only on the reproducibility of the phase shift for the signals passed via different amplification and filtering circuits 83 and is limited to about 1 :80 in a practical design. This acceptable isolation of two measurement channels is achieved in spite of the fact that the differential frequency is located near the high frequency corner of the pass band of the amplification and filtering circuitry 83 and thus the amplitude of the unwanted signal output from the filtering circuitry 83 might still be comparable to the amplitude of the desired signal.
• the amplification and filtering circuitry 83 can be modified to use an integrator stage at the front end with the integration time set to be equal to half the period of the sample switch control signal.
• the integrators would integrate out the unwanted signal as long as the differential frequency is an even multiple of the frequency of the sample switch control signal.
• this crosstalk can be reduced by subtracting from the measurement matrix (V 1 ) obtained for the measurement channels demodulated at the first excitation frequency a weighted measurement matrix (Vy 11 ) obtained for the measurement channels demodulated at the second excitation frequency, and vice versa:
• Vy'corrected Vy'— O " Vy"
• components vy 1 and vy" are related to signals from the same pair of detection conductors originated from the same detection switching block 80 but demodulated with demodulator 99-1 and demodulator 99-2 respectively, and where coefficient ⁇ is related to the parameters of the amplification and filtering circuitry 83 and may be found through calculation or experimentation to find the optimum value.
• the matrix Vy" related to the measurement channels demodulated at the second excitation frequency is further normalized via the coefficient f/f" in order to take into account the change of the amplitude response of the capacitive coupling between excitation and detection conductors with the value of the excitation frequency.
• the same value of the coefficient ⁇ can be applied to all corrections, but in practice since each measurement channel will have slightly different frequency characteristics due to the tolerance of passive and active components, the optimum value for the coefficient ⁇ might vary between amplification and filtering circuits 83.
• the inventor has found that this numerical compensation can provide reliable isolation of the different measurement channels of the order of 1 :200 for a differential frequency equal to four times the frequency of the sample switch control signal.
• the above embodiment allows the frequency of the sample switch control signal to be halved and the high frequency corner of the band-pass filter reduced two times while maintaining the same update rate as before.
• the number of amplification and filtering blocks 83 and the number of signal channels measured by the ADC 13 is doubled however without increasing the number of the required detection switching blocks 80. This saves the cost of extra amplifiers 97-1 and 97-2 and reduces the complexity of the layout of the PCB.
• V 'corrected Vy '— O " Vy "
• the excitation grid can be divided into four consecutive separate blocks of equal length with each block served by its own and dissimilar excitation frequency source.
• the lowest excitation frequency source to serve the furthest block of the excitation grid 5 with regard to the position of the detection switching blocks 80; and the highest excitation frequency source to serve the closest block of the excitation grid 5.
• each excitation conductor can be wired to one of the four different excitation sources and different excitation conductors connected to different excitation sources interposed between adjacent excitation conductors connected to the same excitation source, so that each fixed frequency excitation channel covers the whole length of the excitation grid 5 but with only one quarter of the excitation conductors included in it.
• two (or more) excitation sources can be connected using extra multiplexors located at each input of the excitation switching blocks in a way so that each excitation source is utilised for scanning the whole length of the excitation grid during one excitation cycle.
• a first set of excitation conductors that will be energised by the first excitation source should be shifted by half of the period of the excitation cycle from the second set of excitation conductors that will be energised by the second excitation source so that two scanning sequences from both excitation sources can co-exist on the grid during the same excitation cycle.
• Such an embodiment is specifically useful for the case when the first excitation frequency corresponds to the resonant frequency of the inductive stylus described above with a reference to Figure 58b.
• the polarity of the excitation signal applied by the first excitation source to the first end of the selected excitation conductor should be opposite to the polarity of the excitation signal applied to the second end of the same excitation conductor.
• the second excitation frequency of the second excitation source will have its frequency outside of the resonance response of the inductive stylus and is used to measure conductive objects like fingers or conductive stylus using capacitive coupling of such objects to the grid of the digitiser.
• Such dual mode of operation is very similar to the embodiment described in Figure 58b with the only difference that the measurements related to the first (inductive) and second (capacitive) mode of operations are taken now simultaneously via the same detection switching blocks but via a different pair of amplification and filtering circuits connected to two dissimilar demodulators 99.
• Figure 60a shows a typical physical arrangement for the sensing wires used in the currently available commercial digitisers based on using thin copper wires.
• the plurality of thin copper wires forming the X-Y grid are typically laminated between two thin sheets of plastic and can be further laminated to the glass screen or between two sheets of glass.
• the virtual flat cables 288 and 286 are arranged by routing thin wires to the same region of the plastic sheet where the sensing wires are terminated on a flexible PCB (Printed Circuit Board).
• PCB Print Circuit Board
• the flexible PCB flat cables 288 and 286 are in turn connected to a rigid PCB 290 with the measurement electronics via a standard ZIF connector 289 and 287.
• the cost of routing all thin copper wires in order to form the virtual flat cable 286 and 288 and the extra cost of terminating each individual wire on the rigid PCB 290 forms a major part of the cost of the total build.
• all available commercial providers are forced to use about 20 mm separation between adjacent wires for large diagonal digitisers - which reduces the number of required individual electrical terminations.
• Such a large separation between adjacent conductors in the X-Y grid restricts the achievable accuracy of the commercially available copper wire based digitisers to about 5 mm for measuring the exact location of a finger or a conductive stylus.
• Another disadvantage of the common geometry of the sensing grid shown in Figure 60a is related to the increased length of wires, especially for wires which are close to the corners of the screen.
• the mutual capacitance between adjacent conductors imposes a major limitation for the excitation frequency which can be used to measure signals from the X-Y digitiser.
• this limitation becomes important with diagonal sizes above 40" (100cm) and is indeed a major limiting factor with diagonal sizes of about 80" (200cm).
• the inventor has realised, therefore, that it is highly desirable to use a concept of distributed electronics arranged around the periphery of the digitiser in order to shorten the active length of the individual wires in the X-Y array.
• PVB Poly Vinyl Butyral
• the typical thickness of the PVB foil interlayer used in the windscreen glass lamination is 0.030 in. (0.76 mm); a larger thickness of 0.060 in. (1 .52 mm) is used for burglar resistance architectural glass.
• the PVB foil with a thickness of 0.015 in. (0.38mm) is used predominantly for less demanding safety glass applications.
• the minimum thickness of the tungsten wires used for the heated glass is about 17 microns; the standard thickness is about 22 microns.
• the tungsten wires are typically coated in black to reduce their visibility in reflected light against a dark background. Straight sections of wire 294 might become highly visible due to the moire effect caused by the intersection of the straight wire with the nearly parallel features present in the field of view of the driver (e.g fencing bars).
• This moire effect is substantially reduced by laying out the wire 294 in a wiggle pattern as shown in the Figure 60b with sinusoidal modulation with amplitude ranging from ⁇ 0.5mm up to ⁇ 1 .5mm and a period of about 5mm.
• the set of wires 294 is closely wound with a distance of about 4 mm between adjacent arms of the wire.
• the wires are wound between two copper busbars 296 and 298 which are served as electrical terminals (see Figure 60b).
• the standard copper busbar is made out of 50 or 75 ⁇ thick copper foil, with the most common width of 3, 5, 6 and 9 mm.
• the copper busbar has a conductive adhesive layer on the top surface which allows a good ohmic contact between the busbar and the tungsten wires 294 to be obtained during the process of laying out the wires between the two busbars 296 and 298. Additional busbars 296-1 and 298-1 (not shown in Figure 60b) with an adhesive conductive layer are attached on top of each of the two initial copper busbar 296 and 298 in order to seal the electrical connection between the busbar and the tungsten wires.
• the PVB foil 292 is finally laminated between two glass sheets. The glass lamination is carried out at an elevated temperature of about 130 °C, which is just above the PVB melting point, for a period of about 60 minutes.
• the PVB interlayer 292 becomes optically clear and binds the two panes of glass together.
• two separate copper busbars 296 and 298 stick out of the laminated glass windscreen and are connected to the source of electrical energy.
• a voltage between the busbars 296 and 298 electric current flows through the integrated wires 294 and the glass is heated in order to control condensation, de-mist and de-icing of the automotive windscreen to improve visibility and safety.
• the inventor has found that the above automotive manufacturing process for heated laminated glass is useful for the production of cheap digitizer systems.
• several changes are required due to the dissimilarity between the physical arrangement for the automotive heated windscreen and the digitiser conductors.
• a digitiser for an interactive display will have a flat glass layer while the windscreen will typically use curved glass.
• the heated windscreen illustrated in Figure 60b is based on a nearly parallel set of wires but a digitiser functions using an X-Y array of intersecting wires (see Figure 1 ) to establish crossing nodes distributed over the whole surface.
• the heated windscreen application requires only two electrical connections to send the electrical current through the set of the wires connected in parallel to each other in order to heat the glass.
• a preferred method for manufacturing the digitiser grid using thin metallic wires having a diameter between 10 micron and 30 micron integrated in a glass LCD display screen with a diagonal size ranging from 12" (30cm) to 120" (305cm) will now be described with reference to Figures 61 to 66.
• step S301 a first adhesive copper busbar strip 305 is applied to the PVB sheet 303 along the Y-direction.
• step S303 a thin 20 micron tungsten wire 309 is bonded onto the surface of the PVB sheet (see Figure 62a) using a heat source with a temperature of about 130 °C which is sufficient to locally melt the surface of the PVB foil.
• the wire 301 is laid along the predefined serpentine pattern along the X-direction of the PVB sheet 303 substantially perpendicular to the first copper busbar 305.
• Straight sections of wire 301 might become highly visible due to the moire effect caused by the intersection of the straight wire with nearly parallel vertical or horizontal edges of the pixels of the LCD display.
• This moire effect can be substantially reduced by laying out the wire 301 in a undulating pattern with sinusoidal modulation of the order of about ⁇ 0.5mm or larger and a period of about 5mm (preferably between 3mm and 7mm).
• the spacing between adjacent conductors of the X-Y grid should be equal to the period of the sinusoidal undulations or should be an integer multiple of it to reproduce the geometry of the intersecting set of wires 301 and 302 at each node of the X-Y grid.
• the most appropriate conductor spacing for the X-Y grid ranges from five to six millimetres in order to provide better than one millimetre accuracy for the location of various targets ranging from a large diameter adult finger to a narrow tip of a conductive stylus.
• step S305 an additional conductive adhesive copper busbar strip 305-1 is applied on the top of the first copper busbar 305 in order to sandwich the thin tungsten wire between the two copper strips.
• step S307 the PVB sheet 303 is turned over in order to expose the opposite surface of the PVB foil.
• a second copper busbar strip 306 is attached to the PVB sheet along the X-direction, substantially perpendicular to the first busbar 305 (see Figure 62b).
• step S309 using robotic arm 308 a tungsten wire 302 is thermally bonded onto the PVB sheet 303 into the predefined serpentine pattern along the Y direction substantially perpendicular to the second copper busbar 306.
• the first set of wires 301 are represented in the Figure as straight dotted lines ignoring the original undulating pattern.
• step S31 1 the PVB sheet 303 is cut to the desired size.
• the PVB is preferably cut flush to the edges of the first and second copper busbars.
• step S313 a wider conductive adhesive copper strip 307 (see Figure 63b) is applied on the top of the second busbar 306 and the remaining width of this wider copper strip is tucked in underneath the PVB sheet 303 to present an electrical contact surface for the second busbar 306 on both surfaces of the PVB material.
• Figure 63a shows thai both sets of wires 301 and 302 can be electrically contacted via the busbar 305 and 307 on the same side of the PVB foil 303.
• step S315 the individual wires from the set of wires 301 and 302 are electrically insulated (isolated) from their neighbours by physically removing narrow strips of the copper busbar between adjacent arms of the thin wire 301 and 302 (see Figure 64). This can be done, for example, by punching through the PVB foil 303 with an appropriate dice or using a laser cutter or suitable etching or the like. As a result of this procedure a set of electrically isolated contact pads 315 and 317 is created - this way a dedicated contact pad is made for each individual wire belonging to the X-Y wire grid.
• step S317 the PVB foil 303 is placed between two sheets of glass of slightly dissimilar size in such a manner that the PVB foil is left exposed near the areas with the contacts pads 315 and 317 created out of the first and second busbars 305 and 307.
• the bottom glass 311 shown in the Figure 65a has a size similar to the size of the PVB foil 303 itself.
• the top glass 310 is slightly undersized to leave sufficient space for the placement of the first and second PCB 312 and 313 above the contact pads 315 and 317 after the lamination step.
• the glass thickness for glass 310 and glass 311 is typically chosen from 1 mm or 4mm; larger thicknesses are undesirable as they increase the overall weight of the laminated glass screen.
• the bottom glass is for placement facing the LCD display (not shown) and the top glass is provided for the user touch screen.
• step S319 a temporary adhesive strip is applied to conceal the exposed areas of the PVB foil and the exposed contact pads 315 and 317.
• the strip is made from a material like polyimide which will not bond permanently to the PVB at elevated temperatures used during the lamination process.
• the whole assembly is placed in a vacuum bag and air is evacuated from it.
• the micro-rough surface of the PVB foil 303 provides efficient channels for evacuating air from the inside of the sandwiched construction.
• the assembly is heated to about 130°C and after a holding time at the elevated temperature, the glass is cooled down and the temporary adhesive strip is removed exposing the contact pads 315 and 317. This heating step melts the PVB and bonds the glass panels 310 and 31 1 together sandwiching the wires 301 and 302 in place.
• step S321 first and second digitiser PCBs 312 and 313 (carrying digitiser electronics) are attached on the top of the contact pads 315 and 317 (see Figure 65b).
• the contact pads 315 and 317 are soldered to corresponding contact pads 322 and 323 of the first and second PCBs 312 and 313, as illustrated in more detail for one of the PCBs (313) in Figure 66a.
• the PCB 313 is prepared with contact pads 323 on both surfaces of the PCB with the copper plated though hole 321 of about 1 mm in diameter arranged in the middle of the contact pads 323.
• the PCB is then cut to size through the middle of the holes 321 thus opening up the vertical conductive strips at each solder joint location.
• the other PCB 312 is prepared is a similar way.
• the solder joints between the PCB and the X-Y wire grid are created by soldering the contact pads 315 and 317 to the first and second PCBs 312 and 313 (respectively) with the main solder joint established between the vertical surfaces of the half-hole 321 and the edge of the corresponding contact pad 315 or 317.
• the electronic components carried by the PCBs are soldered to one side of the first and second PCBs 312 and 313.
• a cable connector 319 is attached between the second PCB 313 and the first PCB 312 to provide a path for digitiser control signals (see Figure 65b). It is preferable to keep the microcontroller physically on the same PCB as is connected to the set of wires used for the detection conductors in order to avoid using the cable connector 319 to carry the analogue measurement signals to the microcontroller for analogue to digital conversion (to avoid noise being introduced through the connector 319).
• the detection conductors will be connected along the shorter dimension of the screen as it is preferable to have fewer detection conductors than there are excitation conductors on a typical interactive display.
• the detection PCB also has an additional generic host connector (such as a USB connector) in order to provide a communication path to the host computer.
• additional busbars may be provided on the other edges of the PVB foil and then cut and attached to the excitation/detection circuitry in the manner described above.
• an additional conductive adhesive copper busbar strip 305-1 was applied on the top of the first copper busbar 305 in order to sandwich the thin tungsten wire between the two copper strips.
• the ohmic contact between the tungsten wire and the copper busbar 305 can be further improved before applying the additional copper busbar strip 305-1 .
• This can be done, for instance, by applying a small amount of solder paste via the solder mask and by heating the exposed areas containing the solder paste with an infrared (or other) heat source. The infrared heating can be done via the metallic foil mask in order to prevent unnecessary heat treatment of the PVB foil.
• step S305 Such an additional manufacturing step added to step S305 will allow the soldering of the tungsten wire in the exposed spots to the copper busbar 305 and thus to assure a mechanically stable and low resistance connection between the electronic circuitry located on the PCBs 312 and 313 and each tungsten wire belonging to the grid 301 and 302.
• a tungsten wire was used to form the excitation and detection conductors 301 and 302.
• Tungsten wire is preferred because of its low electrical resistance and high mechanical strength.
• the ultimate tensile strength (the maximum stress that a material can withstand while being stretched or pulled before breaking) for tungsten is about seven times larger than for copper, while its resistivity is only about three times higher than that of a copper wire.
• the increase in crosstalk for long wires is caused by the increasing ratio between the self resistance of the wires and the frequency dependant impedance caused by the mutual capacitance between adjacent parallel wires.
• conductors were arranged in perpendicular regular arrays.
• the excitation and detection conductors do not have to be provided in such regular and perpendicular arrays.
• the spacing between the conductors may be non-uniform; and/or one or more of the conductors may have one or more curves along their lengths; and/or the conductors may lie at an angle other than 90 degrees to each other.
• the processing electronics can determine the desired locations.
• each of these PCBs might be made of several pieces connected together via a suitable connector. This indeed might be practically required for large diagonal sizes of digitiser where the total length of each of the first and second PCB 312 or 313 might exceed one meter.
• the top 310 and bottom 31 1 glass panels had different sizes in order to provide support for the exposed area of the PVB film with the contact pads 315 and 317.
• This support for the PVB film is required during the lamination step and the attachment of the first PCB 312 to the contact pads 315 and the attachment of the second PCB 313 to the contact pads 317.
• the embodiment shown in Figure 66b shows that during such manufacturing steps it is possible to use a temporary support structure 325, for example made of non-stick material.
• the non-stick support 325 can be manufactured from material like polyimide which does not bond to the PVB material at elevated temperatures of about 130 °C used during the lamination process.
• the support 325 can then be removed after the whole system is assembled leaving rigid PCBs 312 and 313 on a free standing PVB film 303 which retains enough flexibility and mechanical stability after the lamination process.
• This allows glass panels of the same size to be used for the top and bottom in the manufacture of the digitiser.
• it is possible to mount the PCBs 312 and 313 at a relatively large angle to the surface of the glass.
• Figure 67a shows an arrangement for forming a large bending radius for the PVB foil using top support 327 and bottom support 326.
• the top support 327 is removed after the lamination step and the first PCB 312 is attached and soldered to the contact pads 315, while the second PCB 313 is attached and soldered to the contact pads 317. Following this step the bottom support 326 is removed and the first PCB 312 and the second PCB 313 can be moved further to their mounting position inside the display mechanical support structure (not shown).
• the PCBs 312 and 313 can be mounted perpendicular to the surface of the glass.
• Figure 68 shows the preferred geometry for this arrangement.
• the second PCB 313 shown in this Figure is soldered directly to the contact pads 317.
• the liquid solder material will be pulled by surface tension into the copper cavity formed by the walls of the copper plated half-hole 321 and the surface of the contact pad 317.
• An extra mass of solder material will also help to make the electrical contact between the contact pads 317 and 323.
• the provision of the copper plated half-hole at the edge of the PCB during soldering provides an optimum mechanical and electrical contact between the contact pads 323 located on the PCB and the contact pads 317 located on the PVB.
• the surface of the bottom glass 31 1 will provide a surface for interacting with a user finger and the surface of the top glass 310 will be facing the LCD matrix display (not shown).
• the set of wires 301 and 302 forming the X-Y grid structure were laid down on opposite surfaces of the same PVB foil 303.
• two separate PVB foils may be used, each carrying its own set of wires - set 301 or set 302.
• the two PVB foils can then be mounted on top of each other during the lamination process so that the sets of wires 301 and 302 can be placed orthogonally to each other.
• Such construction is very similar to the one shown in the Figures 63, 64 and 65 but can be implemented without using the wide busbar 307 which was used to provide electric contacts on both sides of the single PVB foil 303.
• this modification is likely to result in higher overall costs due to the need to double the amount of the utilised PVB material.
• the bottom glass 31 1 was facing an active LCD matrix.
• the array of X-Y wires (actively grounded through the capacitors 63 (see Figure 5) and 95 (see Figure 1 1 )) provides some electrostatic shielding for the electrical switching noise originated in the driving circuitry of the LCD matrix.
• each excitation and detection conductor is grounded in the excitation and detection circuitry via a pair of capacitors and resistors and thus the capacitive coupling between this additional electrostatic shield and all the excitation and detection conductors combined together is capable of providing an adequately low impedance coupling of the conductive layer to the ground of the detection circuitry.
• an actual Ohmic contact can be made between the conductive layer and the measurement electronics using a dedicated conductor located underneath the PCB boards 312 and 313.
• the signal level can be optimized by placing the excitation conductor grid on the side of the PVB foil facing the free surface of the digitizer and by placing the detection conductor grid on the side of the PVB sheet facing the conductive shielding (ITO film).
• the actual signal to noise ratio in this case can be improved by increasing the thickness of the bottom glass 31 1 compared to the thickness of the top glass 310.
• the PVB foil 303 was sandwiched between the top glass 310 and the bottom glass 31 1 .
• only one glass panel may be used.
• a non-stick support 326 may be used instead of the bottom glass 31 1 or a non-stick support 325 may be used instead of the top glass 310.
• the non-stick support is removed after the lamination and the attachment of the first and second PCBs 312 and 313 to the contact pads 315 and 317.
• top 310 and the bottom 31 1 panels were made from glass.
• optical grade polycarbonate panels can be used for lamination. Polycarbonate panels are more easily handled even for panels with relatively small thickness down to 0.5mm.
• the surface of the polycarbonate material can be hard coated to provide improved hardness and scratch resistance.
• the polycarbonate density is about two times less than the density of the glass and its dielectric constant is also about two times smaller compared to the dielectric constant of glass. This allows for the manufacture of significantly thinner and lighter mechanical laminate constructions and simultaneously to reduce slightly the unwanted capacitive coupling between adjacent wires in the grid.
• PVB foil 303 was used as an interlayer for the lamination process.
• Other lamination materials could be used instead of PVB, including thermoplastic glass lamination materials such as EVA (Ethyl Vinyl Acetate) and TPU (thermoplastic Polyurethane).
• EVA has emerged as a good alternative to PVB.
• the strong affinity to moisture makes PVB film difficult to be stored and processed without particular concerns on humidity.
• EVA adhesive film is non-sticky and inert to water moisture.
• production equipment and relevant processes for EVA glass lamination may, in some cases, be easier and simpler than conventional PVB lamination.
• EVA lamination interlayer film allows a PET layer to be laminated on the digitizer instead of the glass sheet. This enables the construction of a fully flexible laminated touch overlay or the ability to have a thinner glass laminate structure with one sheet of glass replaced with the PET layer.
• the commercially available rear projection PET film can be laminated in order to create virtual touch sensitive rear projection displays which are translucent when no image is being projected from the back.
• the actual separation between the centres of the detection or excitation conductors may be as large as 10mm, which will enable to construct each detection or excitation conductor as a pair of individual conductors spaced by 5mm and connected to the same individual contact pads 315 or 317 of the grid 303.
• the main method of manufacture discussed above is specific to the manufacturing of the digitiser in the form of a transparent interactive glass screen overlay.
• Another example of the required digitiser includes interactive whiteboard digitisers connected to a computer.
• a projector mounted on the ceiling projects the computer's desktop display onto the whiteboard's surface where users control the computer using a finger, stylus, or other device.
• the white surface of the board could be made out of a sheet of formica, melamine or polycarbonate with a typical thickness of less than 1 .25mm.
• a thin sheet digitiser can be mounted underneath the white surface of the board.
• a first layer of double-sided mounting adhesive is applied on a surface of cardboard.
• the cardboard with a thickness of about 0.9mm is served as a support for the wire grid and electronics and is chosen for its low cost. It is preferred to use brown kraft paper slip sheets due to their non-porous, moisture and bacteria resistance properties.
• the double-sided mounting adhesive with a thickness of about 25 ⁇ is a standard product widely used for the lamination of the printed materials.
• step S325 a first conductive adhesive copper busbar strip 355 is applied to the cardboard 353 along the Y-direction.
• the busbar used in this embodiment is of the same type as was described previously for the heated glass automotive windscreen technology.
• step S327 a thin copper wire 359 with a diameter of approximately 100 ⁇ is placed on a surface of the adhesive by a robotic arm 358 into a predefined serpentine pattern along the X-direction of the cardboard 353 substantially perpendicular to the first copper busbar 355.
• the undulating pattern shown for the transparent glass overlay digitiser in Figure 62 as the wire grid pattern of the whiteboard digitiser is completely concealed underneath the opaque surface of the whiteboard.
• the capability of using straight sections of the wire 351 simplifies the laying process by pulling the wire 351 between the posts 362 and 364 as shown in the Figure 70a. After bonding the wire 351 to the first adhesive layer the cardboard 353 with the bonded wires 351 can be pulled out of the manufacturing rig with integrated posts 362 and 364 and a new sheet of cardboard 353 can be inserted in the rig for wiring the next digitiser.
• step S329 a second double-sided mounting insulating adhesive is applied over the array of bonded thin copper wires 351 , whilst avoiding to cover the first copper busbar 355.
• step S331 a second conductive adhesive copper busbar strip 356 is applied to the cardboard 353 along the X-direction (see Figure 70b).
• step S333 a thin copper wire 352 is placed on a surface of the second adhesive by the robotic arm 358 into the predefined serpentine pattern along the Y-direction of the cardboard 353 perpendicular to the second copper busbar 356.
• the wire 352 is pulled between the posts 366 and 368 as shown in the Figure 70b.
• the cardboard 353 with the bonded wires 351 and 352 can be pulled out of the manufacturing rig with the integrated posts 366 and 368 and a new sheet of the cardboard 353 can be inserted between the posts for wiring the next digitiser.
• the second copper wire 352 does not electrically contact the first copper wire 351 because of the insulating second adhesive layer that sits between the two wires.
• the cardboard 353 is cut to the desired size, thereby simultaneously separating originally continuous wires 351 and 352 onto individual pieces of straight wire.
• a couple of wider conductive adhesive copper strips 355-1 and 356-1 are applied on the top of the first and second busbars 355 and 356 respectively.
• step S339 the first and second copper busbars 355 and 356 are punched through (or otherwise cut/etched) between adjacent arms of the thin wires 351 and 352 with an appropriate dice in order to create electrically isolated contact pads 365 and 367 for each wire belonging to the X-Y wire grid (see Figure 71 a).
• step S341 a third double sided mounting adhesive film is applied over the array of bonded wires, this time also covering the contact pads 365 and 367.
• the cardboard 353 with integrated X-Y wire grid is then attached to the inner surface of the whiteboard 360 in step S343.
• step S345 the first and second PCBs 362 and 363 are attached on the top of the cardboard over the contact pads 365 and 367 (see Figure 71 b).
• the contact pads of the PCB are soldered to the contact pads 365 and 367 using the same approach as was described previously with reference to Figure 66a. In this approach the copper plated half-hole at the edges of the PCBs 362 and 363 serve as additional vertical contact pads for soldering to the contact pads 365 and 367 of the X-Y grid.
• step S345 an electric cable 369 is connected between the first and second PCBs to supply control signals for operating the digitiser.
• the detection PCB carries the microcontroller and also has an additional generic host connector (such as a USB connector) in order to provide a communication path to the host computer.
• a copper wire with diameter of approximately 100 ⁇ was used to form the excitation and detection conductors 351 and 352. It is possible to use copper wire with either larger (e.g. 200 ⁇ ) or smaller diameter; however special care should be taken for large diagonal digitisers as using larger diameters of wire can increase unwanted capacitive coupling between adjacent wires. Other materials like tungsten can also be used instead of copper; however it is likely that copper wire will be the cheapest wire for manufacturing such digitisers.
• step 337 a couple of wider conductive adhesive copper strips 355-1 and 356-1 were applied on the top of the first and second busbars 355 and 356 respectively. The remaining width of these wider copper strips were then tucked in underneath the cardboard to present electrical contact surfaces for the first and second busbars 355 and 356 on both surfaces of the cardboard 353.
• a fourth layer of double-sided mounting adhesive is applied on a back surface of the cardboard and a thin aluminum foil is attached to such exposed adhesive surface covering all areas of the cardboard except two narrow strips along two edges of the cardboard.
• step 337 allows the integration of a conductive screen onto the surface of the cardboard substrate opposite the surface of the cardboard used for the attachment of the excitation and detection wires.
• such a conductive screen located at a distance between one millimeter and five millimeters away from the grid 3 of the digitizer allows to substantially reduce the unwanted capacitive coupling between adjacent wires, to reduce the sensitivity of the digitizer to hovering fingers, and to improve signal to noise ratio in very noisy environments.
• Such electrically floating conductive screen will be connected to the electrical ground of the measurement system of the digitizer via the capacitive coupling between the metallic foil and all the conductors belonging to the grid.
• the impedance of such coupling is of the order of several Ohms at the excitation frequency and thus there is no need for establishing an active grounding connection to such a conductive screen.
• the conductive foil can be connected to the electrical ground of the PCBs 362 and 367 via a dedicated link which can be established, for instance, by using additional copper busbars attached to the ground plane of the PCBs and to the surface of the metallic foil of the conductive screen.
• the direct Ohmic contact can be used to remove the low frequency noise coupled to the otherwise floating conductive screen.
• the cardboard used in the above embodiment had a thickness of about 0.9mm. Other thicknesses up to about 5mm can easily be used. Other non-conductive substrates like plastic film can be used instead of cardboard; however this might result in increased difficulties in handling the assembled digitiser and/or increase the cost of its manufacture.
• the wide conductive adhesive copper strip 355-1 was attached to the first busbar 355 in the step S337 simultaneously with a similar wide conductive copper strip 356-1 attached to the second busbar 356.
• the second double sided mounting adhesive can be applied to the whole surface of the cardboard 353 including the surface of the first busbar 355-1 thus simplifying the manufacturing process.
• an extra spacer layer may be provided between the sets of wires 351 and 352 in order to make their mutual self-capacitance (without the presence of the target) more reproducible across the surface of the X-Y digitiser.
• Such an extra spacer layer may be made of plastic with a thickness of about 0.4mm and can be applied to the surface of the first adhesive just before step S329, in which the second double-sided mounting adhesive is applied over the first set of wires 351 . It is also possible to use the cardboard 353 as a spacer between the wires in the X-Y grid.
• the wires 351 and 352 would be bonded to opposite surfaces of the cardboard 353 in a manner similar to the one described for the main manufacturing method illustrated in the Figure 61 .
• the cardboard thickness should be restricted to about 1 mm.
• the set of detection wires are preferably mounted on the surface of the cardboard 353 which closest to the writing surface of the whiteboard 360.
• an optically clear plastic film instead of the cardboard 353 and by using an optically clear double-sided mounting adhesive film it is possible to construct an optically transparent thin digitiser with integrated X-Y wire grid and electronics. It is then possible to mount this thin film digitiser onto a rear- projection (diffusion) film in order to create a thin rear-projection digitiser which can be mounted on any glass surface - for instance it can be placed on a store window to transform the window into an Interactive Digital Signage. In this case the opposite surface of the window glass can be used by the general public to interact with the image displayed using a finger.
• the thickness of the conductive wires are preferably reduced to about 20 microns to make them practically invisible to the naked eye.
• step s101 a clear double-sided mounting adhesive 221 is applied to the surface of a protective glass substrate 223.
• step s103 a first printed circuit board (PCB) 225 is attached along the Y edge of the glass substrate 223.
• step s105 a robotic arm 227, with multiple feeds of wires 229, bonds a regular (uniform) array of thin copper wires 230 along the X-direction of the glass substrate, perpendicular to the first PCB 225.
• PCB printed circuit board
• each wire from the created first array of thin wires is terminated at the first PCB using an ultrasonic wedge bonder 231 to cut and bond the wire 230 to a gold plated copper based PCB pad 233.
• Each copper wire 230 is glued along the X-direction of the glass substrate by the adhesive layer 221 .
• Ultrasonic bonding is a process that involves the use of force, time and ultrasonics to join two materials.
• the wire is pressed against the surface (both at ambient temperature) at low force and vibrated for a limited period of time to achieve the bond.
• Ultrasonic energy when applied to the metal to be bonded, renders it temporarily soft and plastic. This causes the metal to flow under pressure.
• the acoustic energy frees molecules and dislocates them from their pinned positions and that allows the metal to flow under the low compressive forces of the bond.
• heat at the bond site becomes a bi-product of the bonding process and so external heat is not necessary.
• Such ultrasonic bonding is also called a "cold weld".
• ultrasonic bonding there are two types of ultrasonic bonding: wedge bonding and tape automated bonding (TAB). Either may be used although in this embodiment, a wedge bonder 231 is preferred as there is more control over the placement of the wires by the robotic arm 227 (in TAB bonding, the wire is already pre-aligned over the pad to which it is to be bonded).
• TAB tape automated bonding
• step s109 where another optically clear double-sided mounting adhesive 237 is applied over the array of bonded wires 230.
• a second PCB 239 is attached along the X edge of the glass substrate 223.
• the robotic arm 227 is again used to create a second array of thin wires 241 that extend along the Y-direction perpendicular to the second PCB 239. The second array of wires 241 is held in place by the adhesive layer 237.
• each wire in the second array of wires 241 is terminated at the second PCB 239 using the ultrasonic wedge bonder 231 onto a gold plated copper based PCB pad 233.
• an optically clear UV curable liquid lamination 245 is sprayed over the second array of thin copper wires 241 in order to seal the exposed adhesive layer 237.
• This UV curable laminate layer is then cured with UV light to form a smooth clear optical surface for the display screen.
• extra adhesive is provided around the termination points that terminate the arrays of conductor wires to the first and second PCBs 225 and 239.
• a cable connector 243 is attached between the second PCB 239 and the first PCB 225 to provide a path for the control signals for the excitation channels. It is preferable to keep the microcontroller physically on the same PCB as the wires used for the detection conductors 7 in order to avoid using the cable 243 to carry the analogue measurement signals to the microcontroller for analogue to digital conversion (in order to avoid noise being introduced through the connector 243).
• the detection conductors will extend along the shorter dimension of the screen and therefore will be connected to the first PCB 225 (as it is preferable to have fewer detection conductors than there are excitation conductors on a typical television screen).
• the first PCB 225 also has an additional generic host connector (such as a USB connector) in order to provide a communication path to the host computer.
• copper wire was used to form the excitation and detection conductors. Copper wire is preferred because of its low electrical resistance and therefore its ability to be used at higher excitation frequencies for large digitiser dimensions.
• ultrasonic bonding with copper wire can be troublesome due to heavier oxidation of the surface of the copper wire and unwanted material build up on the wedge bonder caused by these residuals sticking to the surface of the wedge bonder. Therefore, instead of using thin copper wires, thin aluminium wires may be used instead.
• the aluminium wires have diameters between l Omicrons and 20microns so that they are practically invisible to the human eye at a distance exceeding 10cm.
• ultrasonic bonding was used to attach a piece of wire to the contact pads of the PCB. It might be advantageous to use ultrasonic soldering instead.
• Ultrasonic bonding uses ultrasonic energy to join parts without adding any kind of filler material while ultrasonic soldering uses a filler material, namely solder, to form a joint.
• An intensified ultrasonic beam generates micro vibrations with a 'brushing effect', which results in a complete removal of the oxide layer for immediate wetting with the solder alloy on the surface of the substrate. This means that the use of any 'flux' is no longer required.
• Ultrasonic soldering can be assisted by tinning the contact pads of the PCB before attaching PCBs 225 and 239 to the substrate 223.
• Indalloy 1 E Indium-tin eutectic 52% In 48% Sn
• Field's alloy eutectic alloy of bismuth, indium, and tin: 32.5% Bi, 51% In, 16.5% Sn
• a melting point of about 62 °C it might be possible to make a solder joint using mainly frictional self-heating of the solder junction caused by the dissipation of the ultrasonic energy.
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors;
• excitation circuitry is arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which complementary excitation signals are applied,
• the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry,
• the excitation circuitry is arranged to polarity modulate each excitation signal using a polarity control signal so that the polarity of the excitation signal applied to a selected conductor changes during a time that the excitation conductor is selected, or wherein the measurement circuitry is arranged to polarity modulate a detection signal obtained from each selected detection conductor using a polarity control signal so that the polarity of the detection signal changes during a time that the detection conductor is selected; and wherein the polarity control signal is a periodic signal and wherein half the period of the polarity control signal is less than or equal to the shorter of the excitation interval and the detection interval.
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors;
• the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry, wherein the measurement circuitry is arranged to select neighbouring detection conductors during plural consecutive detection intervals in an overlapping manner such that during a first detection interval a given selected detection conductor is paired with a first neighbouring detection conductor and during a second detection interval the given selected detection conductor is paired with a second neighbouring detection conductor, wherein the measurement circuitry is arranged to determine differential measurements of signals obtained from the selected pairs of neighbouring detection conductors and wherein the measurement circuitry is arranged to select the detection conductors such that a detection conductor selected during a last detection interval of a detection cycle neighbours a detection conductor selected by the measurement circuitry during a first detection interval of the detection cycle.
• a digitiser according to clause 2 wherein the measurement circuitry is arranged to polarity modulate a detection signal obtained from each selected detection conductor using a polarity control signal so that the polarity of the detection signal changes during a time that the detection conductor is selected.
• a digitiser according to clause 3 wherein the polarity control signal is periodic and wherein the time that a detection conductor is selected is an integer multiple of the period of the polarity control signal.
• a digitiser according to any of clauses 2 to 4 wherein the measurement circuitry is arranged so that, during an initial detection interval of a detection cycle, detection conductors are selected without overlap with detection conductors selected in a final detection interval of a preceding detection cycle. 6. A digitiser according to any of clauses 2 to 5, wherein the excitation circuitry is arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry. 7.
• each detection interval corresponds in duration to one excitation interval or wherein each excitation interval corresponds in duration to one detection cycle.
• the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the corresponding subset during a detection cycle.
• the measurement circuitry comprises sample and hold circuitry for sampling and holding measurements obtained from each measurement channel and an analogue to digital converter for converting measurements held by the sample and hold circuitry into corresponding digital values
• the sample and hold circuitry comprises a plurality of first and second capacitors, each first and second capacitor being associated with a respective measurement channel, wherein the sample and hold circuitry is arranged such that during first measurement intervals, signals from the measurement channels are applied to the associated first capacitors and during second measurement intervals, signals from the measurement channels are applied to the associated second capacitors, and wherein during the first measurement intervals the sample and hold circuitry is arranged to couple signals stored on the second capacitors to the analogue to digital converter for conversion into corresponding digital values and during the second measurement intervals the sample and hold circuitry is arranged to couple signals stored on the first capacitors to the analogue to digital converter for conversion into corresponding digital values.
• a digitiser according to any of clauses 2 to 10, comprising control circuitry for generating control signals for controlling selection of the excitation conductors by the excitation circuitry and for generating control signals for controlling selection of the detection conductors by the measurement circuitry.
• control circuitry is arranged to generate said control signals on a cyclic basis and in a free running manner independently of said processing circuitry and is arranged to send a signal to the processing circuitry each measurement cycle to inform the processing circuitry that measurements are ready to be processed by the processing circuitry.
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors;
• the excitation circuitry is arranged to operate in a cyclic manner to select each of said excitation conductors during an excitation cycle, wherein an excitation cycle comprises a sequence of excitation intervals during each of which a different pair of neighbouring excitation conductors is selected by the excitation circuitry and to which excitation signals with opposite polarity are applied, wherein the excitation circuitry is arranged to select neighbouring excitation conductors during plural consecutive excitation intervals in an overlapping manner such that during a first excitation interval a given selected excitation conductor is paired with a first neighbouring excitation conductor and during a second detection interval the given selected excitation conductor is paired with a second neighbouring excitation conductor and wherein the excitation circuitry is arranged to select the excitation conductors such that an excitation conductor selected during a last excitation interval of an excitation cycle neighbours an excitation conductor selected by the excitation circuitry during a first excitation interval of the excitation cycle.
• a digitiser according to any of clauses 13 to 17, wherein the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry.
• each detection interval corresponds in duration to one excitation interval or wherein each excitation interval corresponds in duration to one detection cycle.
• the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the corresponding subset during a detection cycle, wherein the measurement circuitry comprises sample and hold circuitry for sampling and holding measurements obtained from each measurement channel and an analogue to digital converter for converting measurements held by the sample and hold circuitry into corresponding digital values, wherein the sample and hold circuitry comprises a plurality of first and second capacitors, each first and second capacitor being associated with a respective measurement channel, wherein the sample and hold circuitry is arranged such that during first measurement intervals, signals from the measurement channels are applied to the associated first capacitors and during second measurement intervals, signals from the measurement channels are applied to the associated second capacitors, and wherein during the first measurement intervals the sample and hold circuitry is arranged to couple signals stored on the second capacitors to the analogue
• the control circuitry is arranged to generate said control signals on a cyclic basis and in a free running manner independently of said processing circuitry and is arranged to send a signal to the processing circuitry each measurement cycle to inform the processing circuitry that measurements are ready to be processed by the processing circuitry.
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors;
• the measurement circuitry is arranged to operate in a cyclic manner to select each of said detection conductors during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the detection circuitry, wherein the detection circuitry is arranged to select the detection conductors sequentially and in an overlapping manner from a start detection conductor to an end detection conductor and wherein the start detection conductor neighbours the end detection conductor within said grid.
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• measurement circuitry for obtaining measurements from selected detection conductors; and processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors;
• the measurement circuitry comprises a plurality of measurement channels each arranged to obtain measurements from a different subset of the detection conductors, wherein each measurement channel is arranged to operate in a cyclic manner to select each of the detection conductors within the corresponding subset during a detection cycle, wherein a detection cycle comprises a sequence of detection intervals during each of which a different pair of neighbouring detection conductors is selected by the measurement circuitry; wherein the measurement circuitry comprises sample and hold circuitry for sampling and holding measurements obtained from each measurement channel, wherein the sample and hold circuitry comprises a plurality of first and second capacitors, wherein each measurement channel has an associated first and second capacitor, wherein the sample and hold circuitry is arranged such that during first measurement intervals signals from the measurement channels are applied to the associated first capacitors and during second measurement intervals signals from the measurement channels are applied to the associated second capacitors, and wherein during the first measurement intervals the sample and hold circuitry is arranged to couple signals stored on the second capacitors to an analogue to digital converter for conversion into corresponding
• a digitiser comprising:
• a grid of conductors comprising a plurality of excitation conductors and a plurality of detection conductors
• excitation circuitry for applying excitation signals to selected excitation conductors
• control circuitry for generating control signals for controlling selection of the excitation conductors by the excitation circuitry and for generating control signals for controlling selection of the detection conductors by the measurement circuitry;
• processing circuitry for processing measurements obtained by the measurement circuitry to detect one or more objects positioned adjacent the grid of conductors
• control circuitry is arranged to generate said control signals on a cyclic basis and in a free running manner independently of said processing circuitry and is arranged to send a signal to the processing circuitry each measurement cycle to inform the processing circuitry that measurements are ready to be processed by the processing circuitry.

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