EP2731150B1 - Light emitting device - Google Patents

Light emitting device Download PDF

Info

Publication number
EP2731150B1
EP2731150B1 EP13192259.3A EP13192259A EP2731150B1 EP 2731150 B1 EP2731150 B1 EP 2731150B1 EP 13192259 A EP13192259 A EP 13192259A EP 2731150 B1 EP2731150 B1 EP 2731150B1
Authority
EP
European Patent Office
Prior art keywords
type semiconductor
semiconductor layer
emitting device
concave pattern
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP13192259.3A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP2731150A2 (en
EP2731150A3 (en
Inventor
Ye Seul Kim
Shin Hyoung Kim
Kyoung Wan Kim
Yeo Jin Yoon
Jun Woong Lee
Tae Gyun Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seoul Viosys Co Ltd
Original Assignee
Seoul Viosys Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=49554122&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP2731150(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Seoul Viosys Co Ltd filed Critical Seoul Viosys Co Ltd
Publication of EP2731150A2 publication Critical patent/EP2731150A2/en
Publication of EP2731150A3 publication Critical patent/EP2731150A3/en
Application granted granted Critical
Publication of EP2731150B1 publication Critical patent/EP2731150B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body

Definitions

  • the present invention relates to a light emitting device and, more particularly, to a light emitting device having improved current dispersing performance and luminous efficacy, and a method of fabricating the same.
  • a light emitting device includes an N-GaN layer, an active layer and a P-GaN layer, which are sequentially formed on a substrate such as a sapphire substrate, a p-electrode formed on the P-GaN layer, and an n-electrode formed on the N-GaN layer.
  • the n-electrode is formed on a portion of the N-GaN layer, which is exposed by partially etching the active layer and the P-GaN layer.
  • a transparent electrode layer is formed on the P-GaN layer.
  • the transparent electrode layer is formed to achieve uniform spreading of electric current on the P-GaN layer having very high resistance.
  • the light emitting device is operated by connecting an external power source to the p-electrode and the n-electrode, such that light is generated in the active layer.
  • an external power source to the p-electrode and the n-electrode, such that light is generated in the active layer.
  • a substantial amount of the light may be absorbed by the sapphire substrate and semiconductor layers, causing optical loss.
  • a high index of refraction of the GaN layer may cause total internal reflection at a surface of the GaN layer, causing loss of light inside the GaN layer instead of allowing emission of light to the outside.
  • a light emitting device capable of being operated by a high electric current of 1 A or more has been developed. Upon operation of the light emitting device under high current conditions, the light emitting device may suffer from severe current crowding. Therefore, there is a need for a light emitting device having improved current dispersing performance.
  • Patent document US 2005/082562 discloses a LED comprising a rough surface 122 realized on an exposed portion of the N layer 12, in particular between an electrode 16 and the active region 13.
  • Patent document US 2010/0243987 discloses a manufacturing method in which a metallic mask 206 is partially melted at a temperature of 650-950 °C so as to form a mask sphere layer 206a, which is then used for etching of the underlying semiconductor layer, so as to result in a plurality of pillars (cf. Fig. 2B-2D ).
  • Patent document US 2010/0006884 discloses a light emitting device comprising (cf. Fig. 5 ) a semiconductor layer 2 having a rough structure, on which an electrode 508, 509 is deposited.
  • Exemplary embodiments of the present invention provide a light emitting device having improved current dispersing performance.
  • Exemplary embodiments of the present invention also provide a light emitting device having improved luminous efficacy.
  • Exemplary embodiments of the present invention also provide a light emitting device having not only improved luminous efficacy but also improved current dispersing performance.
  • a light emitting device includes a first conductivity-type semiconductor layer disposed on a substrate; an active layer disposed on the first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer disposed on the active layer; and an irregular convex-concave pattern disposed on a surface of the first conductivity-type semiconductor layer.
  • the irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths.
  • the first conductivity-type semiconductor layer including the irregular convex-concave pattern is exposed from the active layer and the second conductivity-type semiconductor layer.
  • the description furthermore discloses a method of forming a light emitting device includes: sequentially growing a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate; exposing the first conductivity-type semiconductor layer by partially removing the active layer and the second conductivity-type semiconductor layer through photolithography and etching; forming a protective layer and a mask metal layer on the active layer and the second conductivity-type semiconductor layer and on the exposed the first conductivity-type semiconductor layer; forming a mask in a structure of agglomerated particles by heating the mask metal layer to a first temperature; forming an irregular convex-concave pattern on the exposed first conductive type semiconductor layer by forming a photosensitive pattern on the mask; and removing the protective layer and the mask through etching, wherein the irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths.
  • spatially relative terms such as “beneath”, “below”, “lower”, “above”, “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
  • Figure 1 is a schematic plan view of a light emitting device according to a first exemplary embodiment of the invention
  • Figure 2 is a sectional view of the light emitting device taken along line I - I' of Figure 1
  • Figure 3 is a sectional view of the light emitting device taken along line II - II' of Figure 1 .
  • the light emitting device includes a substrate 110, a buffer layer 120, a first conductive type semiconductor layer 130, an active layer 140, a second conductive type semiconductor layer 150, a transparent electrode layer 160, a first electrode pad 170, a second electrode pad 180, first electrode legs 171, and second electrode legs 181.
  • the substrate 110 may be a growth substrate, such as a sapphire substrate, spinel substrate, gallium nitride substrate, silicon carbide substrate or silicon substrate, which can be used for growth of gallium nitride compound semiconductor layers, without being limited thereto.
  • a growth substrate such as a sapphire substrate, spinel substrate, gallium nitride substrate, silicon carbide substrate or silicon substrate, which can be used for growth of gallium nitride compound semiconductor layers, without being limited thereto.
  • the active layer 140 and the first and second conductive type semiconductor layers 130, 150 may be formed of a gallium nitride compound semiconductor material, for example, (Al, In, Ga)N.
  • a composition of the active layer 140 is determined such that light having a desired wavelength, for example UV light or visible light, can be emitted therefrom.
  • the active layer 140 and first and second conductive type semiconductor layers 130, 150 may be formed by MOCVD or MBE.
  • the first conductive type semiconductor layer 130 is an n-type nitride semiconductor layer
  • the second conductive type semiconductor layer 150 is a p-type nitride semiconductor layer.
  • Each of the first and second conductive type semiconductor layers 130, 150 may include a single layer or multiple layers.
  • the transparent electrode layer 160 may be formed of a transparent oxide such as ITO, or Ni/Au, and is in ohmic contact with the second conductive type semiconductor layer 150.
  • the first electrode pad 170 and the first electrode legs 171 are formed on the first conductive type semiconductor layer 130, and the second electrode pad 180 and the second electrode legs 181 are formed on the second conductive type semiconductor layer 150.
  • the first electrode pad 170 and the first electrode legs 171 are formed on a region of the first conductive type semiconductor layer 130, which is exposed by partially etching the second conductive type semiconductor layer 150 and the active layer 140.
  • the first electrode legs 171 are bifurcated from the first electrode pad 170 and the second electrode legs 181 extend from the second electrode pad 180.
  • the first and second electrode legs 171, 181 are alternately arranged with reference to a horizontal line of the light emitting device, and are formed at constant intervals.
  • the first electrode legs 171 are bent in an edge region of the light emitting device and extend in a first direction.
  • the second electrode legs 181 are bent in the edge region of the light emitting device and extend in an opposite direction to the first direction to be parallel to the first electrode legs 171.
  • the first conductive type semiconductor layer 130 has an irregular convex-concave pattern 190 formed on a surface thereof.
  • the irregular convex-concave pattern 190 may include convex portions and concave portions, and may have a protruding structure, for example, a conical shape, which protrudes in an upper direction of the first conductive type semiconductor layer 130.
  • the irregular convex-concave pattern 190 is formed on the region of the first conductive type semiconductor layer 130, which is exposed by partially etching the second conductive type semiconductor layer 150 and the active layer 140.
  • the irregular convex-concave pattern 190 enhances light extraction efficiency by refracting light entering the exposed surface of the first conductive type semiconductor layer 130.
  • the mesa area includes a slanted plane having a predetermined inclination.
  • the slanted plane has an inclined angle of 20 to 50° with respect to the exposed surface of the first conductive type semiconductor layer 130.
  • the irregular convex-concave pattern 190 can solve the problem of current crowding in a region to which the first electrode pad 170 and the active layer 140 are closest.
  • the convex portions and concave portions of the irregular convex-concave pattern 190 prevent carriers (electrons) from moving from the first electrode pad 170 to the active layer 140 along the surface of the first conductive type semiconductor layer 130, whereby electric current can be distributed over a wide area of the first conductive type semiconductor layer 130.
  • the irregular convex-concave pattern 190 may be formed over the exposed upper surface of the first conductive type semiconductor layer 130. In addition, the irregular convex-concave pattern 190 may be formed between the first conductive type semiconductor layer 130 and the first electrode pad 170, and between the first conductive type semiconductor layer 130 and the first electrode legs 171.
  • the irregular convex-concave pattern 190 may be formed in the edge region of the light emitting device.
  • the first conductive type semiconductor layer 130 is exposed by etching.
  • the first conductive type semiconductor layer 130 is exposed by etching the second conductive type semiconductor layer 150 and the active layer 140 for extraction of light.
  • the irregular convex-concave pattern 190 may be formed on the exposed surface of the first conductive type semiconductor layer 130 corresponding to the edge region of the light emitting device.
  • a corner region may have a wider width (W2) than a width (W1) of a lateral region excluding the corner region.
  • the second electrode legs 181 have a round shape in the corner region of the light emitting device in order to maintain a constant lateral distance to the first electrode legs 171.
  • the corner region of the light emitting device may have a greater etching margin than a lateral region of the light emitting device due to the round shape of the second electrode legs 181.
  • the first conductive type semiconductor layer 130 exposed in the corner region of the light emitting device has an exposed structure corresponding to the shape of the second electrode legs 181 in the corner region of the second electrode legs 181. In this way, in the edge region of the light emitting device, the light emitting device may maximize extraction of light by adjusting the width (W2) of the corner region according to the structure of the second electrode legs 181.
  • the mesa area has a lateral height (a), which is greater than a total height of the active layer 140 and the second conductive type semiconductor layer 150.
  • the lateral distance (d) between the first electrode pad 170 and the transparent conductive layer 160 is closely related to current dispersing performance.
  • the distance (d) between the first electrode pad 170 and the transparent conductive layer 160 is at least 5 ⁇ m or more.
  • an upper limit of the lateral distance is not particularly limited, the lateral distance (d) may have an upper limit of less than 50 ⁇ m in order to prevent reduction in luminous area.
  • the irregular convex-concave pattern 190 has a height (b), which is lower than a height (c) of the first conductive type semiconductor layer 130 where the irregular convex-concave pattern 190 is not formed. That is, in the exposed region of the first conductive type semiconductor layer 130, the region of the first conductive type semiconductor layer 130, on which the irregular convex-concave pattern 190 is formed, has a smaller thickness than a region of the first conductive type semiconductor layer 130 under the irregular convex-concave pattern 190.
  • the irregular convex-concave pattern 190 may have a height (b) of 160 nm or more for extraction of light. Referring to Figures 4a and 4b , when the irregular convex-concave pattern 190 reaches a low-density doped N-GaN layer, the irregular convex-concave pattern 190 may have a height of less than 3 ⁇ m.
  • Figure 4a and Figure 4b are sectional views of the first conductive type semiconductor layer on which the irregular convex-concave pattern of Figure 1 is formed.
  • the irregular convex-concave pattern 190 is formed on an upper side of the first conductive type semiconductor layer 130, and may include a plurality of layers having different doping densities.
  • the first conductive type semiconductor layer 130 includes n-type nitride semiconductor layers, which include a high-density doped first N-GaN layer 131, a low-density doped second N-GaN layer 133, and a high-density doped third N-GaN layer 135.
  • high-density doping and low-density doping indicate relative doping densities of the first and third N-GaN layers 131, 135 with respect to the second N-GaN layer 133, instead of absolute doping densities.
  • N-type impurities when N-type impurities are doped in an amount of 5E17/cm or more, this can be considered high-density doping, and when the N-type impurities are doped in an amount of 5E17/cm 3 or less or when the impurities are not doped, this can be considered low-density doping.
  • the first N-GaN layer 131 includes a high doping density of impurities.
  • the second N-GaN layer 133 includes a low doping density of impurities.
  • the third N-GaN layer 135 includes a high doping density of impurities for ohmic contact with the electrode pad.
  • the first and third N-GaN layers 131, 135 include high doping densities of impurities to have lower resistance than the second N-GaN layer 133, thereby allowing easy flow of electric current therethrough.
  • the irregular convex-concave pattern 190 has a structure wherein the convex portions having a peak shape and the concave portions having a valley shape are irregularly formed. That is, in the irregular convex-concave pattern 190, the convex portions have irregular heights and the concave portions have irregular depths.
  • the irregular convex-concave pattern 190 may be formed on the third N-GaN layer 135, in which the concave portions reach the second N-GaN layer 133. That is, the concave portions may have a depth extending to the second N-GaN layer 133, thereby suppressing current flow through the third N-GaN layer 135.
  • the second N-GaN layer 133 has a low doping density, thereby allowing current dispersion by inducing electric current to flow through the first N-GaN layer 131.
  • the first conductive type semiconductor layer 130 is formed with the irregular convex-concave pattern 190 on the third N-GaN layer 135, which has a high doping density and is provided for ohmic contact with the electrode pad, and allows light entering the irregular convex-concave pattern 190 within a predetermined range of incident angles to be spread therethrough, thereby improving light extraction efficiency.
  • the concave portions extend to the second N-GaN layer 133 having a low doping density and suppress concentration of current flow on the third N-GaN layer 135, thereby allowing electric current to be dispersed to the first N-GaN layer 131 having a high doping density. Accordingly, the light emitting device according to the present exemplary embodiment may enhance current dispersing performance.
  • the first conductive type semiconductor layer 130 has the same structure as that shown in Figure 4a except for the depth of the concave portions in the irregular convex-concave pattern 190. Thus, detailed descriptions of the respective components will be omitted.
  • the concave portions of the irregular convex-concave pattern 190 extend from the third N-GaN layer 135 to the first N-GaN layer 131.
  • the concave portions of the irregular convex-concave pattern 190 extend to a portion of the first N-GaN layer 131. That is, the concave portions of the irregular convex-concave pattern 190 have a depth extending from the third N-GaN layer 135 to the first N-GaN layer 131.
  • the concave portions of the irregular convex-concave pattern 190 may have a depth extending to an upper portion of the first N-GaN layer 131 for efficient current distribution.
  • the irregular convex-concave pattern 190 can improve light extraction efficiency by spreading light entering within a predetermined range of incident angles, and the concave portions of the irregular convex-concave pattern extend to the upper portion of the first N-GaN layer 131 such that electric current can be dispersed through the first N-GaN layer 131, thereby maximizing current dispersing performance.
  • Figures 5a to 5g are sectional views illustrating a method of fabricating the light emitting device.
  • a buffer layer 120, a first conductive type semiconductor layer 130, an active layer 140 and a second conductive type semiconductor layer 150 are sequentially formed on a substrate 110.
  • the substrate 110 may be at least one selected from among a sapphire substrate, spinel substrate, Si substrate, SiC substrate, ZnO substrate, GaAs substrate, and GaN substrate.
  • a sapphire substrate is used as the substrate 120.
  • the buffer layer 120, the active layer 140, and the first and second conductive type semiconductor layers 130, 150 may be formed by various deposition and growth processes, such as Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and the like.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • MBE Molecular Beam Epitaxy
  • HVPE Hydride Vapor Phase Epitaxy
  • the first conductive type semiconductor layer 130 may be a GaN layer into which N-type impurities are implanted.
  • the second conductive type semiconductor layer 150 may be a GaN layer into which P-type impurities are implanted.
  • the N-type impurities may be Si.
  • the P-type impurities may be Mg.
  • the present invention is not limited thereto and various semiconductor material layers may be used.
  • the active layer 140 may have a multi-quantum well structure in which quantum well layers and barrier layers are alternately formed.
  • the first conductive type semiconductor layer 130 is partially exposed by a patterning process, for example, photolithography and etching, using masks.
  • a photosensitive film is deposited onto the second conductive type semiconductor layer 150 and is selectively cured through the mask to form a photosensitive film pattern.
  • the photosensitive film pattern has a structure in which a region of the photosensitive film corresponding to a region of the first conductive type semiconductor layer 130 to be exposed is removed from the photosensitive film.
  • etching is performed using the photosensitive layer pattern as a mask such that the second conductive type semiconductor layer 150 and the active layer 140 are partially removed to expose the first conductive type semiconductor layer 130.
  • etching may be dry etching or wet etching.
  • a protective layer 201 is formed on the second conductive type semiconductor layer 150 and on the exposed first conductive type semiconductor layer 130.
  • the protective layer 201 is also formed on a lateral side of the active layer 140 and a lateral side of the second conductive type semiconductor layer 150.
  • the protective layer 201 may be formed of SiO 2 and may have a thickness of 300 ⁇ .
  • a mask metal layer 202 is formed on the protective layer 201.
  • the mask metal layer 202 may be formed of Ni.
  • the mask metal layer 202 may have a thickness of, for example, 100 ⁇ .
  • the protective layer 201 serves to prevent contamination of the second conductive type semiconductor layer 150 due to diffusion of N to the surface of the second conductive type semiconductor layer 150 upon formation of the mask pattern of the mask metal layer 202.
  • the mask metal layer 202 is heated to a predetermined temperature or more to form a mask 203, which has a structure of agglomerated particles.
  • the mask 203 may be formed using self-assembled characteristics by surface energy of the mask metal layer 202 (see Figure 5c ) and interface energy of a lower layer.
  • the mask 203 may be formed by heating the mask metal layer to a critical point of 400°C ⁇ 900°C to obtain self-assembled characteristics. That is, when the structure of agglomerated particles is formed by heating the mask metal layer 202 (see Figure 5c ) to a critical point (500°C ⁇ 600°C) at which self-assembled characteristics start, it is possible to form a dense and highly concave-convex pattern.
  • a photosensitive film is deposited onto the mask 203, and the second conductive type semiconductor layer 150 and the active layer 140 are partially etched to form a photosensitive pattern PR, through which an upper region (r) of the exposed first conductive type semiconductor layer 130 is exposed.
  • the photosensitive film pattern (PR) opens the upper region (r) of the exposed first conductive type semiconductor layer 130.
  • the mask 203 and the protective layer 201 on the upper region (r) are removed by etching, for example, wet etching or dry etching, and an irregular convex-concave pattern 190 is formed on the first conductive type semiconductor layer 130.
  • etching for example, wet etching or dry etching
  • an irregular convex-concave pattern 190 is formed on the first conductive type semiconductor layer 130.
  • the height of the convex portions and the depth of the concave portions may be varied according to etching conditions.
  • a transparent conductive layer 160 is formed on the second conductive type semiconductor layer 150.
  • the transparent conductive layer 160 may be formed of a transparent metal or transparent conductive oxide.
  • first and second electrode pads 170, 180 are formed on the transparent conductive layer 160 and the irregular convex-concave pattern 190, respectively.
  • first electrode legs 171 (see Figure 1 ) and second electrode legs 181 (see Figure 1 ) may be formed at the same time, as shown in Figure 1 .
  • Figure 6 is a sectional view of a light emitting device according to a second embodiment of the invention
  • Figure 7 is a detailed sectional view of a portion of a first conductive type semiconductor layer, on which an irregular convex-concave pattern of Figure 6 is formed.
  • the light emitting device according to the second embodiment includes the same components as those of the light emitting device according to the first embodiment except for a location of an irregular convex-concave pattern 290.
  • the same components will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted.
  • the irregular convex-concave pattern 290 is formed on a region of the first conductive type semiconductor layer 130, which is exposed by partially etching the second conductive type semiconductor layer 150 and the active layer 140.
  • a region of the first conductive type semiconductor layer 130, on which the irregular convex-concave pattern 290 is formed, is defined as a first region (r1).
  • the exposed region of the first conductive type semiconductor layer 130 includes not only the first region (r1) but also a second region (r2) on which a first electrode pad 170 will be formed.
  • a third region (r3) is provided as a process margin for forming a photosensitive film pattern, which will be used to form the irregular convex-concave pattern 290.
  • the second region (r2) is a region on which the first electrode pad 170 is formed, and a region of the first conductive type semiconductor layer 130 corresponding to the second region (r2) has a flat surface 130a.
  • each of the convex portions has one end, which is disposed below the active layer 140 and coplanar with or below the flat surface 130a.
  • one end of each of the convex portions of the irregular convex-concave pattern 290 may be disposed below the active layer 140 and above the flat surface 130a.
  • the irregular convex-concave pattern 290 is formed only between the mesa area and the first electrode pad 170, thereby further improving electrical properties.
  • Figure 8 is a graph depicting electrical properties of the light emitting devices according to the first and second embodiments of the invention.
  • the light emitting device according to the second embodiment has a lower voltage that the light emitting device according to the first embodiment. This result shows that, in the light emitting device according to the second embodiment, surface resistance of the first electrode pad 170 and the first conductive type semiconductor layer 130 is lower than that in the light emitting device according to the first embodiment.
  • the light emitting device according to the second embodiment requires low operation voltage at the same electric current, thereby exhibiting excellent electrical properties.
  • the light emitting device according to the second embodiment includes the first electrode pad 170 formed on the flat surface 130a and thus reduces surface resistance and heat generation due to creation of cavities at an interface between layers and due to a rough interface, thereby improving electrical properties and reliability.
  • Figure 9 is a schematic plan view of a light emitting device according to a third embodiment of the invention.
  • the light emitting device according to the third embodiment includes the same components as those of the light emitting devices according to the first embodiment except for a location of an irregular convex-concave pattern 390.
  • the same components will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted except for the irregular convex-concave pattern 390.
  • the irregular convex-concave pattern 390 includes a first irregular convex-concave pattern 391 overlapping the first electrode legs 171 to be parallel thereto, a second irregular convex-concave pattern 392 extending from the first irregular convex-concave pattern 391 towards second electrode legs 181, and a third irregular convex-concave pattern 393 formed in an edge region of the light emitting device.
  • first and second electrode legs 171, 181 are alternately formed to be parallel to each other in a first direction
  • the second irregular convex-concave pattern 392 extends from the first and second electrode legs 171, 181 in a second direction perpendicular to the first direction in plan view.
  • the second irregular convex-concave pattern 392 includes plural concave portions and convex portions between the first and second electrode legs 171, 181, thereby maximizing light extraction efficiency.
  • the second irregular convex-concave pattern 392 is formed in a perpendicular direction with respect to the first irregular convex-concave pattern 391 parallel to the first electrode legs 171 in plan view, thereby further improving light extraction efficiency.
  • Figure 10 is a schematic plan view of a light emitting device according to a fourth embodiment of the invention.
  • the light emitting device according to the fourth embodiment includes the same components as those of the light emitting devices according to the second embodiment except for first and second electrode pads 270, 280.
  • first and second electrode pads 270, 280 the same components will be denoted by the same reference numerals, and detailed descriptions thereof will be omitted except for the first and second electrode pads 270, 280.
  • Each of the first and second electrode pads 270, 280 has a dome structure.
  • the dome structures of the first and second electrode pads 270, 280 minimizes reflection of light traveling towards an outside of the mesa area by the electrode pads 270, 280, and thus can minimize optical loss due to reflection of light into the semiconductor layers by the electrode pads 270, 280.
  • the light emitting device according to this embodiment has further improved light extraction efficiency.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
EP13192259.3A 2012-11-09 2013-11-11 Light emitting device Active EP2731150B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020120126903A KR102013363B1 (ko) 2012-11-09 2012-11-09 발광 소자 및 그것을 제조하는 방법

Publications (3)

Publication Number Publication Date
EP2731150A2 EP2731150A2 (en) 2014-05-14
EP2731150A3 EP2731150A3 (en) 2016-01-20
EP2731150B1 true EP2731150B1 (en) 2020-01-08

Family

ID=49554122

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13192259.3A Active EP2731150B1 (en) 2012-11-09 2013-11-11 Light emitting device

Country Status (4)

Country Link
US (1) US9269867B2 (ja)
EP (1) EP2731150B1 (ja)
JP (1) JP6324706B2 (ja)
KR (1) KR102013363B1 (ja)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9768357B2 (en) 2013-01-09 2017-09-19 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US10276749B2 (en) 2013-01-09 2019-04-30 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
WO2014110197A1 (en) 2013-01-09 2014-07-17 Sensor Electronic Technology, Inc. Ultraviolet reflective rough adhesive contact
US20150171274A1 (en) * 2013-12-17 2015-06-18 Industrial Technology Research Institute Led structure
KR102256590B1 (ko) * 2014-07-31 2021-05-26 서울바이오시스 주식회사 발광 다이오드
CN110676367B (zh) * 2014-07-31 2023-03-24 首尔伟傲世有限公司 发光二极管
WO2016032192A1 (ko) * 2014-08-27 2016-03-03 서울바이오시스 주식회사 발광 다이오드 및 그 제조 방법
KR20160025456A (ko) 2014-08-27 2016-03-08 서울바이오시스 주식회사 발광 다이오드 및 그 제조 방법
US9905729B2 (en) 2015-03-27 2018-02-27 Seoul Viosys Co., Ltd. Light emitting diode
US9627224B2 (en) * 2015-03-30 2017-04-18 Stmicroelectronics, Inc. Semiconductor device with sloped sidewall and related methods
DE102016112587A1 (de) * 2016-07-08 2018-01-11 Osram Opto Semiconductors Gmbh Strahlungsemittierender Halbleiterchip
JP7060508B2 (ja) * 2016-08-26 2022-04-26 スタンレー電気株式会社 Ｉｉｉ族窒化物半導体発光素子および該素子構成を含むウエハ
TWI753106B (zh) * 2017-02-16 2022-01-21 韓商Ｌｇ伊諾特股份有限公司 半導體裝置
KR102601417B1 (ko) * 2017-09-28 2023-11-14 서울바이오시스 주식회사 발광 다이오드 칩
KR102450150B1 (ko) 2018-03-02 2022-10-04 삼성전자주식회사 반도체 발광소자
JP7096489B2 (ja) * 2018-09-20 2022-07-06 日亜化学工業株式会社 半導体素子の製造方法
JP6708270B2 (ja) * 2019-01-15 2020-06-10 信越半導体株式会社 発光素子
CN110010728B (zh) * 2019-03-25 2021-05-18 大连德豪光电科技有限公司 发光二极管芯片的制备方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2331625B (en) * 1997-11-19 2003-02-26 Hassan Paddy Abdel Salam led Lamp
JP2001217456A (ja) * 2000-02-03 2001-08-10 Sharp Corp 窒化ガリウム系化合物半導体発光素子
JP2002016312A (ja) * 2000-06-27 2002-01-18 Sanyo Electric Co Ltd 窒化物系半導体素子およびその製造方法
JP3782357B2 (ja) * 2002-01-18 2006-06-07 株式会社東芝 半導体発光素子の製造方法
US7193245B2 (en) 2003-09-04 2007-03-20 Lumei Optoelectronics Corporation High power, high luminous flux light emitting diode and method of making same
WO2005004247A1 (en) * 2003-07-03 2005-01-13 Epivalley Co., Ltd. Iii-nitride compound semiconductor light emitting device
US20050082562A1 (en) * 2003-10-15 2005-04-21 Epistar Corporation High efficiency nitride based light emitting device
JP2005217331A (ja) * 2004-01-30 2005-08-11 Nichia Chem Ind Ltd 半導体発光素子
JP4977957B2 (ja) * 2004-03-29 2012-07-18 日亜化学工業株式会社 半導体発光素子
TWM265766U (en) * 2004-09-16 2005-05-21 Super Nova Optoelectronics Cor Structure of GaN light emitting device
JP4980615B2 (ja) * 2005-02-08 2012-07-18 ローム株式会社 半導体発光素子およびその製法
KR100631971B1 (ko) * 2005-02-28 2006-10-11 삼성전기주식회사 질화물 반도체 발광 소자
JP2007059518A (ja) * 2005-08-23 2007-03-08 Showa Denko Kk 半導体発光素子
JP4986445B2 (ja) * 2005-12-13 2012-07-25 昭和電工株式会社 窒化ガリウム系化合物半導体発光素子
JP5326225B2 (ja) * 2006-05-29 2013-10-30 日亜化学工業株式会社 窒化物半導体発光素子
JP4922404B2 (ja) * 2006-09-25 2012-04-25 ソウル オプト デバイス カンパニー リミテッド 電流分散のための電極延長部を有する発光ダイオード
JP2008270416A (ja) * 2007-04-18 2008-11-06 Sanken Electric Co Ltd 物体に粗面を形成する方法
US20100006884A1 (en) * 2007-08-07 2010-01-14 Epistar Corporation Light Emitting Device and Manufacturing Method Therof
JP4804444B2 (ja) * 2007-10-31 2011-11-02 泰谷光電科技股▲ふん▼有限公司 発光ダイオードの構造及びその製造方法
KR100903103B1 (ko) * 2007-12-05 2009-06-16 우리엘에스티 주식회사 화합물 반도체를 이용한 발광소자
JP5429770B2 (ja) * 2008-02-07 2014-02-26 シャープ株式会社 半導体発光素子の製造方法
TWI394296B (zh) * 2008-09-09 2013-04-21 Bridgelux Inc 具改良式電極結構之發光元件
TWI469382B (zh) * 2009-03-30 2015-01-11 Ind Tech Res Inst 發光二極體結構與元件以及其製造方法
KR101654340B1 (ko) * 2009-12-28 2016-09-06 서울바이오시스 주식회사 발광 다이오드
JP5197654B2 (ja) * 2010-03-09 2013-05-15 株式会社東芝 半導体発光装置及びその製造方法
KR101028327B1 (ko) * 2010-04-15 2011-04-12 엘지이노텍 주식회사 발광소자, 발광소자 제조방법 및 발광소자 패키지
KR101673955B1 (ko) * 2010-07-02 2016-11-08 삼성전자주식회사 반도체 발광소자 및 이를 제조하는 방법
TW201248725A (en) * 2011-05-31 2012-12-01 Aceplux Optotech Inc Epitaxial substrate with transparent cone, LED, and manufacturing method thereof.

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
EP2731150A2 (en) 2014-05-14
KR20140060149A (ko) 2014-05-19
KR102013363B1 (ko) 2019-08-22
JP6324706B2 (ja) 2018-05-16
US20140131731A1 (en) 2014-05-15
JP2014096592A (ja) 2014-05-22
EP2731150A3 (en) 2016-01-20
US9269867B2 (en) 2016-02-23

Similar Documents

Publication Publication Date Title
EP2731150B1 (en) Light emitting device
US10756237B2 (en) Light emitting diode and light emitting diode package
US7919784B2 (en) Semiconductor light-emitting device and method for making same
US7436001B2 (en) Vertical GaN-based LED and method of manufacturing the same
KR100638732B1 (ko) 수직구조 질화물 반도체 발광소자의 제조방법
WO2007036164A1 (en) Semiconductor light-emitting device and method for making same
JP2008529271A (ja) 電流閉じ込め構造および粗面処理を有するｌｅｄ
US9306120B2 (en) High efficiency light emitting diode
TWI624080B (zh) 發光二極體晶片
KR100601144B1 (ko) 질화갈륨계 반도체 발광소자
KR100756842B1 (ko) 광추출용 컬럼들을 갖는 발광 다이오드 및 그것을 제조하는방법
KR20150121968A (ko) 발광 소자 및 그것을 제조하는 방법
KR20170112752A (ko) 자외선 발광 소자

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20131111

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 33/22 20100101ALI20151214BHEP

Ipc: H01L 33/14 20100101AFI20151214BHEP

Ipc: H01L 33/38 20100101ALI20151214BHEP

R17P Request for examination filed (corrected)

Effective date: 20160720

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20180405

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 33/38 20100101ALI20190508BHEP

Ipc: H01L 33/32 20100101ALN20190508BHEP

Ipc: H01L 33/22 20100101ALI20190508BHEP

Ipc: H01L 33/14 20100101AFI20190508BHEP

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 33/32 20100101ALN20190520BHEP

Ipc: H01L 33/22 20100101ALI20190520BHEP

Ipc: H01L 33/38 20100101ALI20190520BHEP

Ipc: H01L 33/14 20100101AFI20190520BHEP

INTG Intention to grant announced

Effective date: 20190605

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602013064802

Country of ref document: DE

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1223780

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200215

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20200108

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200531

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200408

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200409

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200408

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200508

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602013064802

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1223780

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200108

26N No opposition filed

Effective date: 20201009

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201111

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20201130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201111

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200108

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20230920

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20230920

Year of fee payment: 11