EP2548158A1 - Laminataufbau für eine chipkarte und verfahren zu dessen herstellung - Google Patents

Laminataufbau für eine chipkarte und verfahren zu dessen herstellung

Info

Publication number
EP2548158A1
EP2548158A1 EP11707081A EP11707081A EP2548158A1 EP 2548158 A1 EP2548158 A1 EP 2548158A1 EP 11707081 A EP11707081 A EP 11707081A EP 11707081 A EP11707081 A EP 11707081A EP 2548158 A1 EP2548158 A1 EP 2548158A1
Authority
EP
European Patent Office
Prior art keywords
layer
chip module
adhesive material
cover layer
transponder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP11707081A
Other languages
German (de)
English (en)
French (fr)
Inventor
Rungnattha Katworapattra
Edith Genevieve Therese Dangeard
Egon Konopitzky
Mitchell Peter Deyoung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smartrac IP BV
Original Assignee
Smartrac IP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smartrac IP BV filed Critical Smartrac IP BV
Publication of EP2548158A1 publication Critical patent/EP2548158A1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07722—Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • Object of the present invention is therefore to propose a laminate structure for a smart card and a method for its production, which or the production of chip cards with improved crack resistance and thus increased life allows.
  • the laminate structure according to the invention has the features of claim 1.
  • the inventive method has the features of claim 1 1.
  • FIG. 3 shows the laminate structure shown in FIG. 1 after insertion of the chip module and before the lamination process is carried out
  • Transponder layer 35 individually manageable component of the laminate structure 30th On the transponder layer 35 is a cover layer 39 which is provided in register with the window opening 38 of the transponder layer 35 with a window opening 40.
  • a chip housing 41 of the chip module 32 projects into the window opening 40 and accommodates a chip, which is not shown here, so that a receiving space 41 formed by the window openings 38 and 40 receives the chip module 32.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Credit Cards Or The Like (AREA)
EP11707081A 2010-03-15 2011-02-17 Laminataufbau für eine chipkarte und verfahren zu dessen herstellung Ceased EP2548158A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102010011517A DE102010011517A1 (de) 2010-03-15 2010-03-15 Laminataufbau für eine Chipkarte und Verfahren zu dessen Herstellung
PCT/EP2011/000752 WO2011113511A1 (de) 2010-03-15 2011-02-17 Laminataufbau für eine chipkarte und verfahren zu dessen herstellung

Publications (1)

Publication Number Publication Date
EP2548158A1 true EP2548158A1 (de) 2013-01-23

Family

ID=44012473

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11707081A Ceased EP2548158A1 (de) 2010-03-15 2011-02-17 Laminataufbau für eine chipkarte und verfahren zu dessen herstellung

Country Status (11)

Country Link
US (1) US20130277432A1 (es)
EP (1) EP2548158A1 (es)
JP (1) JP2013522738A (es)
KR (1) KR20130012019A (es)
AU (1) AU2011229541A1 (es)
BR (1) BR112012023155A2 (es)
CA (1) CA2790932A1 (es)
DE (1) DE102010011517A1 (es)
MX (1) MX2012010460A (es)
WO (1) WO2011113511A1 (es)
ZA (1) ZA201206797B (es)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015014408A1 (de) 2015-11-06 2017-05-11 Giesecke & Devrient Gmbh Stabile Chipkarte, Spulenanordnung und Verfahren zum Bereitstellen einer Chipkarte

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102713028B1 (ko) * 2018-08-08 2024-10-07 도판 홀딩스 가부시키가이샤 개인 식별 매체
US10783424B1 (en) 2019-09-18 2020-09-22 Sensormatic Electronics, LLC Systems and methods for providing tags adapted to be incorporated with or in items
US11443160B2 (en) 2019-09-18 2022-09-13 Sensormatic Electronics, LLC Systems and methods for laser tuning and attaching RFID tags to products
US11055588B2 (en) 2019-11-27 2021-07-06 Sensormatic Electronics, LLC Flexible water-resistant sensor tag
US11755874B2 (en) 2021-03-03 2023-09-12 Sensormatic Electronics, LLC Methods and systems for heat applied sensor tag
KR102391551B1 (ko) * 2021-07-09 2022-04-28 코나엠 주식회사 무선 통신 카드 및 그 제조 방법
US11869324B2 (en) 2021-12-23 2024-01-09 Sensormatic Electronics, LLC Securing a security tag into an article

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DE3029939A1 (de) * 1980-08-07 1982-03-25 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Ausweiskarte mit ic-baustein und verfahren zu ihrer herstellung
DE3122981A1 (de) * 1981-06-10 1983-01-05 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Verfahren zum einbau von ic-bausteinen in ausweiskarten
DE3151408C1 (de) * 1981-12-24 1983-06-01 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Ausweiskarte mit einem IC-Baustein
FR2580416B1 (fr) * 1985-04-12 1987-06-05 Radiotechnique Compelec Procede et dispositif pour fabriquer une carte d'identification electronique
DE3639630A1 (de) * 1986-11-20 1988-06-01 Gao Ges Automation Org Datentraeger mit integriertem schaltkreis und verfahren zur herstellung desselben
US5067008A (en) * 1989-08-11 1991-11-19 Hitachi Maxell, Ltd. Ic package and ic card incorporating the same thereinto
DE4122049A1 (de) * 1991-07-03 1993-01-07 Gao Ges Automation Org Verfahren zum einbau eines traegerelements
FR2684235B1 (fr) * 1991-11-25 1999-12-10 Gemplus Card Int Carte a circuit integre comprenant des moyens de protection du circuit integre.
DE4421607A1 (de) * 1994-06-21 1996-01-04 Giesecke & Devrient Gmbh Verfahren zur Herstellung von Datenträgern
DE19716912B4 (de) * 1997-04-22 2006-06-08 Assa Abloy Identification Technology Group Ab Verfahren zur Fixierung eines Chipmoduls in einer Chipkarte
JP3883652B2 (ja) * 1997-06-23 2007-02-21 大日本印刷株式会社 板状枠体付きｉｃキャリアとその製造方法
KR100330651B1 (ko) * 1997-06-23 2002-03-29 사토 게니치로 Ｉｃ카드용 모듈, ｉｃ카드, 및 ｉｃ카드용 모듈의 제조방법
FR2769441A1 (fr) * 1997-10-07 1999-04-09 Philips Electronics Nv Carte electronique sans contact et son procede de fabrication
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015014408A1 (de) 2015-11-06 2017-05-11 Giesecke & Devrient Gmbh Stabile Chipkarte, Spulenanordnung und Verfahren zum Bereitstellen einer Chipkarte

Also Published As

Publication number Publication date
US20130277432A1 (en) 2013-10-24
ZA201206797B (en) 2015-04-29
MX2012010460A (es) 2012-10-09
DE102010011517A1 (de) 2011-09-15
JP2013522738A (ja) 2013-06-13
BR112012023155A2 (pt) 2016-05-31
AU2011229541A1 (en) 2012-09-27
KR20130012019A (ko) 2013-01-30
CA2790932A1 (en) 2011-09-22
WO2011113511A1 (de) 2011-09-22

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