EP2327095B1 - Ensemble semi-conducteur et procédé de fabrication d'un ensemble semi-conducteur - Google Patents

Ensemble semi-conducteur et procédé de fabrication d'un ensemble semi-conducteur Download PDF

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Publication number
EP2327095B1
EP2327095B1 EP09780513A EP09780513A EP2327095B1 EP 2327095 B1 EP2327095 B1 EP 2327095B1 EP 09780513 A EP09780513 A EP 09780513A EP 09780513 A EP09780513 A EP 09780513A EP 2327095 B1 EP2327095 B1 EP 2327095B1
Authority
EP
European Patent Office
Prior art keywords
semiconductor
ceramic
ceramic carrier
semiconductor component
arrangement according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
EP09780513A
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German (de)
English (en)
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EP2327095A1 (fr
Inventor
Andreas Krauss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
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Robert Bosch GmbH
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Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2327095A1 publication Critical patent/EP2327095A1/fr
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Definitions

  • the invention relates to a semiconductor device according to the preamble of claim 1, a use according to claim 12 and a method for producing a semiconductor device according to claim 13.
  • ceramic housings or substrates are used in which the ceramic serves as a carrier for the semiconductor device and at the same time acts as electrical insulation.
  • the semiconductor device is usually attached or soldered from its underside with either conductive or insulating adhesive on the ceramic carrier.
  • Such a semiconductor device is in the DE 10 2005 038 760 A1 described.
  • the semiconductor device is fixed to the ceramic carrier via a comparatively thick metal layer. Since the comparatively thick metal layer has a different thermal expansion coefficient from the semiconductor material of the semiconductor component and the carrier ceramic, mechanical stresses which destroy the semiconductor device can occur, in particular under high temperature stress of the semiconductor device.
  • semiconductor devices use metal housings on which the semiconductor devices are electrically conductively attached to their underside, using isolated interconnects, e.g. be realized via glass bushings.
  • WO2008 / 041813 discloses a semiconductor device having a carrier of electrically conductive ceramic.
  • housings As a standard for the encapsulation of power semiconductor devices, such as transistors, housings have prevailed, in which the semiconductor device on a stamped metal carrier, a so-called lead frame, is adhesively bonded, wherein additional electrical connections via further punched contacts are realized and the semiconductor device and the contacts with an insulating material, usually plastic or a plastic-based material, are overmolded.
  • an insulating material usually plastic or a plastic-based material
  • the invention has for its object to propose a semiconductor arrangement concept that allows the use of the semiconductor device at high temperatures. In particular, mechanical stresses due to large temperature differences should be avoided. Furthermore, there is the task It is to propose a method for producing such a semiconductor device.
  • the invention is based on the idea to form the carrier for the semiconductor device, at least in sections, from a, at least under operating temperature conditions, electrically conductive, in particular metallically conductive, ceramic, whereby it is possible, the voltage and / or power supply of the semiconductor device directly over the To realize ceramic support, in particular without that it is necessary to use the required in the prior art, relatively thick metal layers with a thickness of more than 30 ⁇ m.
  • the absence of such thick metallic intermediate layers between the semiconductor part and the ceramic carrier in turn means that mechanical stresses due to different thermal expansion coefficients avoided become, whereby the formed according to the concept of the invention semiconductor device for use at very high temperatures, in particular at temperatures of (far) above 250 ° C, preferably of over 400 ° C, is suitable.
  • an at least partially formed of electrically conductive ceramic material carrier characterized by a very high thermal conductivity, which ensures good heat dissipation and thus favors the use at very high temperatures on.
  • the at least one semiconductor component can be formed in any desired manner, for example as a diode, transistor or integrated circuit (IC), etc. Particularly preferred is an embodiment in which the semiconductor component is a so-called raw chip (die), which is fixed, for example, by soldering or other methods on the at least partially electrically conductive ceramic support.
  • the electrically conductive ceramic carrier forms at least one first contact, in particular a ground contact of the semiconductor device, for which purpose the connection technology or the connecting material for connecting the semiconductor device to the electrically conductive ceramic carrier should preferably also be electrically conductive and preferably should only be so thick that critical mechanical stresses due to different temperature coefficients are avoided.
  • the semiconductor component it is possible to fix the semiconductor component to the ceramic carrier by silver sintering, wherein the sintered layer can be applied to it by a backside metallization with a very small thickness extension directly during the production process of the semiconductor component.
  • a semiconductor device designed according to the concept of the invention is suitable for use in a motor vehicle.
  • a semiconductor device comprising, for example, at least one SiC power diode, in or on a generator of a motor vehicle alternator, wherein the SiC power diodes are applied directly, for example via a thin film, to the SiC ceramic elements with Their excellent mechanical properties, such as wear and temperature resistance and other functions with corresponding, to be explained later, optional, functional structural sections can take over.
  • the semiconductor component comprises or is formed from such a wide bandgap semiconductor material.
  • Wide bandgap semiconductor materials are semiconductor materials having a large bandgap of preferably greater than 2eV.
  • the wide bandgap semiconductor material, such as SiC, is characterized by the ability to operate at much higher temperatures than silicon.
  • the electrically conductive ceramic carrier and the semiconductor device have at least approximately the same coefficient of thermal expansion in order to avoid, preferably completely, the occurrence of temperature-induced mechanical stresses.
  • the realization of a same coefficient of thermal expansion can be realized when the electrically conductive ceramic carrier and the semiconductor device the same base material, preferably made of wide bandgap semiconductor material, are formed. It is possible to form the ceramic carrier only partially from the same material, it being preferred in the case of the only partially the same choice of material, the semiconductor device and the ceramic support in the mounting area of the same material.
  • the electrically conductive ceramic carrier which may also be an intermediate carrier, is part of a housing encapsulating the semiconductor device or the ceramic carrier completely forms the housing for the semiconductor device itself.
  • the ceramic carrier has at least one electrically conductive and at least one electrically non-conductive region, wherein it is further preferred to contact the electrically conductive region of the ceramic carrier with the semiconductor component.
  • the realization of at least one electrically conductive and at least one electrically non-conductive region can be realized by an appropriate choice of material, ie the provision of different ceramic materials in the different regions of the ceramic carrier.
  • the ceramic carrier is formed as a plate or disc. With a suitable design of electrically conductive and electrically non-conductive regions of the ceramic carrier can already be made on the ceramic carrier several electrical connections.
  • connections can be made directly from contacts on the semiconductor device, for example via metallic connection lines, which serve for direct connection of the semiconductor device and / or which lead to electrically insulating or electrically conductive regions of the ceramic carrier.
  • metallic connection lines which serve for direct connection of the semiconductor device and / or which lead to electrically insulating or electrically conductive regions of the ceramic carrier.
  • the pressure generated during the connection of these lines for example by a welding process, and / or the resulting heat for forming, for example, joining, hardening, soldering, etc. of the connection between the semiconductor device and the ceramic support.
  • electrically conductive and electrically non-conductive regions can be arranged next to one another in one plane, that is to say preferably with a comparatively small thickness extension.
  • electrically conductive and electrically non-conductive regions can be combined as a three-dimensional structure, which enables a more complex line or insulation guide or arrangement.
  • a semiconductor device designed according to the concept of the invention makes it possible to dispense with thick adhesion promoter or intermediate layers between the semiconductor component and the ceramic carrier.
  • the semiconductor device over at least an auxiliary layer (in particular adhesion promoter layer) designed as a thin layer is to be fixed to the ceramic support, a thin layer being understood to mean a layer having a thickness of less than 5 ⁇ m, particularly preferably less than 2 ⁇ m, very particularly preferably less than 1 ⁇ m.
  • This thin layer can be realized, for example, by vapor deposition of at least one thin metal layer, in particular titanium layer, in order to prepare the semiconductor component and / or the ceramic carrier for bonding or soldering.
  • the thin film is realized as a backside metallization of the semiconductor device already during the production of the semiconductor device. It is very particularly preferred if the thin layer is a sinterable layer.
  • the joining of the semiconductor device and the ceramic carrier is carried out by soldering, this should be done at a temperature which is below the operating temperature of the semiconductor device.
  • a temperature which is below the operating temperature of the semiconductor device.
  • a compound can also be realized via eutectic bonding or an adhesion process, or a Aufglasungs- or Aufschmelzungsvorgang, preferably at relatively low temperatures.
  • the ceramic carrier assumes at least one additional function in addition to the carrying or holding function for the semiconductor component.
  • the ceramic carrier preferably has a mechanical functional structure section, for example in the form of a fastening section and / or a heat sink section and / or a bearing section, for example for forming a sliding bearing, etc.
  • the mechanical functional structure section can be formed either of electrically conductive or electrically non-conductive ceramic, wherein it is particularly preferred to perform the functional structure section fiber reinforced. It is also possible to form the ceramic carrier as a composite component with at least one non-ceramic material, preferably forming the functional structure section, in order to be able to realize even very complex structural forms safely and without breakage.
  • the functional structure section may comprise at least one opening, for example for receiving a fastening element, such as a screw, etc. It is also possible to form the functional structure section with at least one alignment nose and / or at least one latching lug. Additionally or alternatively, the functional structure section may have a pin-shaped section, in particular for fixing the ceramic carrier to a further component.
  • the invention also leads to the use of a per se known, at least partially, electrically conductive ceramic, in particular a so-called wide-bandgap ceramic, as a support for a semiconductor device, with the surprising advantages described above.
  • the invention leads to a method for producing a semiconductor device, which is very particularly preferably designed as described above.
  • Core of Method is the provision of an at least partially electrically conductive ceramic support, which may be formed as required as a composite component comprising a non-ceramic portion.
  • the joining of the semiconductor component and of the ceramic carrier preferably takes place such that the semiconductor component contacts at least one electrically conductive section of the ceramic carrier so that the ceramic carrier realizes at least one electrical connection of the semiconductor component.
  • the semiconductor construction material is determined by realizing an auxiliary layer formed as a thin film on the ceramic support, wherein a thin layer having a thickness of less than 5 microns on the semiconductor device and / or on the ceramic material, for example by vapor deposition can be provided.
  • auxiliary layer by backcoating, in particular backside metallization of the semiconductor device, preferably in its manufacturing process.
  • Fig. 1 1 shows a semiconductor device 1 with a semiconductor component 2 embodied as a die, which is fixed to a ceramic carrier 4 via an auxiliary layer 3 (thin layer) designed as an adhesive layer.
  • the auxiliary layer 3 is electrically conductive to produce a ground contact via the ceramic carrier 4 to the semiconductor device 2.
  • the ceramic carrier 4 is formed entirely from electrically conductive ceramic material, wherein, in addition to the electrically conductive ceramic material, non-electrically conductive ceramic material and non-ceramic material, for example for forming the functional structure sections to be explained below, can have.
  • the electrically conductive, ceramic carrier 4 comprises a total of three functional structure sections 5, which in the example shown are formed directly in the electrically conductive ceramic material.
  • a first, in the drawing plane left functional structure section 5 is formed as a centering nose 6, a second, in the drawing plane middle functional structure section 5 as a recess 7 and a third, in the drawing plane right functional structure section 5 as a through hole 8.
  • the semiconductor device 2 is contacted not only on the ceramic support 4, but via another, here executed as Drahtbondtitle, additional electrical contact 9, which is fixed to the upper side in the drawing plane of the semiconductor device 2.
  • the semiconductor device 2 and the ceramic carrier 4 are formed of the same wide-bandgap semiconductor ceramic material, here SiC.
  • the embodiment according to Fig. 2 differs from the example described above Fig. 1 essentially in that the ceramic carrier 4 is formed of different ceramic materials and has two (outer) electrically conductive regions 10 and a sandwiched therebetween electrically non-conductive region 11 (insulator).
  • the electrically conductive and non-conductive regions 10, 11 are arranged next to one another in a substantially two-dimensional plane.
  • the semiconductor device 2 is arranged such that it contacts both electrically conductive regions 10 of the carrier 4 with two contact areas spaced apart from one another.
  • the semiconductor device 2 is connected to the electrically conductive regions 10 via a respective auxiliary layer 3 (thin layer) formed as a sintered layer.
  • FIG. 3 shows a further alternative embodiment of a semiconductor device 1, comprising a semiconductor device 2 and a complex structure ceramic support 4, wherein the electrically conductive and electrically non-conductive regions 10, 11 are realized in a three-dimensional structure arrangement, wherein the semiconductor device 2 is electrically connected to the electrically conductive region 10 of the ceramic substrate 4 directly via a solder layer (not shown) realized between two thin films, also in the form of a thin film , wherein an electrically conductive connection between the upper side of the semiconductor component 2 and a further electrically conductive region 10 of the ceramic carrier 4 is produced via a further, formed as a wire connection electrical contact 9, wherein the further electrically conductive region 10 through an electrically non-conductive region 11th from which the semiconductor device 2 bearing, left in the drawing plane electrically conductive region 10 is isolated.
  • a solder layer not shown

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Ceramic Products (AREA)

Claims (15)

  1. Ensemble semi-conducteur comprenant au moins un composant semi-conducteur (2) disposé fixement sur un support céramique (4),
    caractérisé en ce que
    le support céramique (4) présente au moins une partie électriquement conductrice et au moins une partie électriquement non conductrice (10, 11) constituées de matériaux céramiques différents.
  2. Ensemble semi-conducteur selon la revendication 1, caractérisé en ce que le composant semi-conducteur (2) comporte un matériau semi-conducteur, en particulier le SiC, à grande largeur de bande, de préférence supérieure à 2 eV.
  3. Ensemble semi-conducteur selon l'une des revendications précédentes, caractérisé en ce que le support céramique (4) et le composant semi-conducteur (2) présentent au moins approximativement les mêmes coefficients de dilatation thermique.
  4. Ensemble semi-conducteur selon l'une des revendications précédentes, caractérisé en ce qu'au moins certaines parties du support céramique (4) et du composant semi-conducteur (2) sont formées d'un même matériau.
  5. Ensemble semi-conducteur selon l'une des revendications précédentes, caractérisé en ce que le support céramique (4) est un boîtier ou un composant de boîtier qui entoure au moins des parties et de préférence la totalité du composant semi-conducteur (2) .
  6. Ensemble semi-conducteur selon la revendication 1, caractérisé en ce que la partie (11) électriquement non conductrice est un support pour au moins une piste conductrice.
  7. Ensemble semi-conducteur selon l'une des revendications 1 ou 6, caractérisé en ce que la partie électriquement conductrice et la partie électriquement non conductrice (10, 11) sont disposées l'une à côté de l'autre dans un plan, de préférence essentiellement en deux dimensions, ou dans une structure en trois dimensions.
  8. Ensemble semi-conducteur selon l'une des revendications précédentes, caractérisé en ce que le composant semi-conducteur (2) est relié solidairement au support céramique (4) à l'aide d'au moins une couche auxiliaire (3) configurée en couche mince, de préférence d'une épaisseur inférieure à 5 µm, de préférence inférieure à 2 µm et de façon tout particulièrement préférable inférieure à 1 µm, de préférence métallique, en particulier par frittage d'argent.
  9. Ensemble semi-conducteur selon la revendication 8, caractérisé en ce que la couche auxiliaire (3) est une couche appliquée sur le composant semi-conducteur (2) par revêtement sur le côté dorsal.
  10. Ensemble semi-conducteur selon l'une des revendications 1 à 9, caractérisé en ce que le support céramique (4) présente une partie structurelle (5) à fonction mécanique, en particulier une partie de fixation et/ou une partie de corps de refroidissement et/ou une partie de montage.
  11. Ensemble semi-conducteur selon la revendication 10, caractérisé en ce que la partie structurelle (5) fonctionnelle comporte une ouverture de reprise d'un élément de fixation et/ou un bec d'alignement et/ou un bec d'encliquetage et/ou une tige de fixation.
  12. Utilisation d'une céramique qui présente au moins une couche électriquement conductrice et au moins une couche électriquement non conductrice (10, 11) en matériaux céramiques différents comme support pour un composant semi-conducteur (2).
  13. Procédé de fabrication d'un ensemble semi-conducteur (1) selon l'une des revendications 1 à 11, le procédé comportant les étapes suivantes :
    préparer au moins un composant semi-conducteur (2),
    préparer un support céramique (4) qui présente au moins une partie électriquement conductrice et au moins une partie électriquement non conductrice (10, 11) constituées de matériaux céramiques différents et
    relier le composant semi-conducteur (2) au support céramique (4).
  14. Procédé selon la revendication 13, caractérisé en ce que le composant semi-conducteur (2) est relié au support céramique (4) par au moins une couche auxiliaire (3) configurée comme couche mince, en particulier une couche frittée.
  15. Procédé selon la revendication 14, caractérisé en ce que la couche auxiliaire (3) est appliquée sur le composant semi-conducteur (2) par revêtement du côté dorsal.
EP09780513A 2008-09-12 2009-07-13 Ensemble semi-conducteur et procédé de fabrication d'un ensemble semi-conducteur Active EP2327095B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE200810042035 DE102008042035A1 (de) 2008-09-12 2008-09-12 Halbleiteranordnung sowie Verfahren zum Herstellen einer Halbleiteranordnung
PCT/EP2009/058924 WO2010028880A1 (fr) 2008-09-12 2009-07-13 Ensemble semi-conducteur et procédé de fabrication d'un ensemble semi-conducteur

Publications (2)

Publication Number Publication Date
EP2327095A1 EP2327095A1 (fr) 2011-06-01
EP2327095B1 true EP2327095B1 (fr) 2012-09-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP09780513A Active EP2327095B1 (fr) 2008-09-12 2009-07-13 Ensemble semi-conducteur et procédé de fabrication d'un ensemble semi-conducteur

Country Status (5)

Country Link
US (1) US8946885B2 (fr)
EP (1) EP2327095B1 (fr)
CN (1) CN102150259B (fr)
DE (1) DE102008042035A1 (fr)
WO (1) WO2010028880A1 (fr)

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Publication number Priority date Publication date Assignee Title
DE102016101249A1 (de) 2015-11-02 2017-05-04 Epcos Ag Sensorelement und Verfahren zur Herstellung eines Sensorelements
DE102018124121A1 (de) * 2018-09-28 2020-04-02 Osram Opto Semiconductors Gmbh Optoelektronische Vorrichtung und Verbindungselement

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DE4023495A1 (de) * 1990-07-24 1992-01-30 Nukem Gmbh Elektronisches bauelement
US5880491A (en) * 1997-01-31 1999-03-09 The United States Of America As Represented By The Secretary Of The Air Force SiC/111-V-nitride heterostructures on SiC/SiO2 /Si for optoelectronic devices
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Also Published As

Publication number Publication date
CN102150259A (zh) 2011-08-10
DE102008042035A1 (de) 2010-03-18
US8946885B2 (en) 2015-02-03
CN102150259B (zh) 2014-08-20
EP2327095A1 (fr) 2011-06-01
WO2010028880A1 (fr) 2010-03-18
US20110180810A1 (en) 2011-07-28

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