Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/20—Electrodes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/30—Coatings
  • H10F77/306—Coatings for devices having potential barriers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/40—Optical elements or arrangements
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/831—Electrodes characterised by their shape
  • H10H20/8316—Multi-layer electrodes comprising at least one discontinuous layer
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/832—Electrodes characterised by their material
  • H10H20/835—Reflective materials

Definitions

• An optoelectronic semiconductor chip is specified.
• An object to be solved is to provide an optoelectronic semiconductor chip having an improved efficiency.
• the optoelectronic semiconductor chip comprises a semiconductor body having an active region.
• the semiconductor body is preferably an epitaxially grown semiconductor body.
• Semiconductor body may be connected to a growth substrate. However, it is also possible that the growth substrate is removed from the semiconductor body or at least thinned.
• the active region of the semiconductor body is preferably suitable for generating or detecting electromagnetic radiation.
• the optoelectronic semiconductor chip is preferably a luminescence diode chip. That is, the optoelectronic semiconductor chip is formed by a laser diode chip or a light-emitting diode chip. If the active region is suitable for detecting electromagnetic radiation, then the optoelectronic semiconductor chip is a detector chip, for example a photodiode chip. For example, the photodiode chip can be provided for the detection of infrared radiation.
• the optoelectronic semiconductor chip further comprises a mirror layer.
• the mirror layer is a metallic mirror layer. That is, the mirror layer consists of or contains a metal and is characterized by metallic properties such as good electrical conductivity and high reflectivity.
• the mirror layer is a Bragg mirror consisting of alternately arranged layers of a high refractive and a low refractive material.
• the mirror layer may be a combination of Bragg mirror and metallic mirror.
• the metallic mirror is, for example, facing the active region and arranged on the Bragg mirror.
• the mirror layer preferably has a reflectivity of at least 90% for electromagnetic radiation generated or to be detected in the active region.
• the optoelectronic semiconductor chip comprises contact points.
• the contact points establish a mechanical connection between the mirror layer and the semiconductor body. That is, the mirror layer and the semiconductor body are over the
• the optoelectronic semiconductor chip comprises at least one of these contact points, preferably comprising Optoelectronic semiconductor chip a variety of these contact points.
• the contact points are arranged between the semiconductor body and the mirror layer.
• the contact points can be directly adjacent to the semiconductor body and / or directly to the mirror layer. That is, the pads may, for example, be in direct contact with the semiconductor body and / or in direct contact with the mirror layer.
• the contact points provide a distance between the semiconductor body and the mirror layer. That is, the contact points are formed, for example, in the manner of columns or posts, which in addition to a mechanical attachment also convey a distance between the semiconductor body and the mirror layer. This means that the semiconductor body and mirror layer preferably do not touch each other. Semiconductor body and mirror layer are therefore not in direct contact with each other, but are separated by the contact points.
• At least one cavity is formed between the semiconductor body and the mirror layer. That is, the semiconductor body and mirror layer are spaced apart from each other, where there are no contact points, there is a cavity between the semiconductor body and mirror layer.
• the cavity contains a gas.
• the cavity can be filled with air, for example. It is but also possible that the cavity is filled with a noble gas such as helium. In addition, the cavity may also be filled with nitrogen or with hydrogen. That is, the at least one cavity formed by the contact points contains a gas and is preferably filled with this gas.
• the gas is located between the semiconductor body and the mirror layer. It is possible that between the semiconductor body and mirror layer only the contact points and the gas are. Another material is then not between the semiconductor body and mirror layer.
• the optoelectronic semiconductor chip contains a semiconductor body which contains an active region.
• the semiconductor chip contains a mirror layer and contact points between semiconductor body and
• Mirror layer are arranged.
• the contact points mediate a distance between the semiconductor body and the mirror layer, whereby at least one cavity is formed between the mirror layer and the semiconductor body.
• the at least one cavity contains a gas.
• the contact points for electrical contacting of the active region of the semiconductor body are provided.
• an electrical current is impressed into the semiconductor body and thus into the active region via the contact points during operation of the optoelectronic semiconductor chip, which makes it possible to ensure that in the active region electromagnetic radiation is generated or detected.
• the contact points are preferably electrically conductive in this case.
• the optoelectronic semiconductor chip described here is based inter alia on the finding that the filling of the cavity between mirror layer and semiconductor body with a gas has advantages over the filling of the cavity with a dielectric solid such as silicon nitride or silicon oxide.
• Electromagnetic radiation which is generated in the active region and is emitted in the direction of the cavity, can be reflected by total reflection at the interface and deflected in the direction of a radiation exit surface or an active region of the semiconductor body. The same applies to electromagnetic radiation which is to be detected in the active region. Electromagnetic radiation, the is not totally reflected, but penetrates the interface between the semiconductor body and cavity, applies in the further course on the contact points and / or the • mirror layer and is reflected by these elements in the direction of a radiation exit surface and / or in the direction of the active region of the optoelectronic semiconductor chip.
• the efficiency of the optoelectronic semiconductor chip is thus increased.
• the filling of the cavity with a gas also proves to be particularly advantageous for improved heat dissipation.
• Heat generated during operation in the optoelectronic semiconductor chip can be released particularly well from the semiconductor body to the mirror layer and from there, for example, to a carrier by gas introduced in the cavity.
• fillings of the cavity with helium or with hydrogen (H 2 ) are particularly well suited.
• other gases such as nitrogen or argon are conceivable.
• the gas-filled cavity thus replaces a dielectric material, for example a dielectric mirror layer. It distinguishes itself from such by improved optical and thermal properties. Overall, the gas-filled cavity thus contributes to an improved efficiency of the optoelectronic semiconductor chip.
• At least one of the contact points forms a closed path. That is, at least one of Contact points has, for example, a frame-shaped course. This contact point thus runs continuously and encloses a region between the mirror layer and the semiconductor body.
• the contact point surrounds at least a region between the mirror layer and the semiconductor body like a frame, wherein "frame-like" is not an indication of the geometry of this contact point.
• the contact point may be formed in the manner of a round, rectangular or oval frame.
• the contact point formed as a closed path is preferably arranged in the edge region of the optoelectronic semiconductor chip.
• a frame-shaped contact point is arranged on the side of the semiconductor body facing the mirror layer, which contact point extends as a closed path along the edge of the semiconductor body.
• the contact point may be in direct contact with the mirror layer and / or the semiconductor body.
• Such a contact point, which forms a closed path is particularly well suited to form a particularly large cavity between mirror layer and semiconductor body, which is filled with the gas.
• the gas is then also hermetically sealed in the cavity formed by the contact point, the mirror layer and the semiconductor body.
• closed by the formed as a closed path contact pad cavity are preferably arranged many other contact points that as posts or columns can be trained.
• a continuously running at the edge, formed as a closed path contact point can therefore be tightly enclosed in the connection of the semiconductor body and mirror layer a good thermally conductive gas in the optoelectronic semiconductor chip.
• the at least one cavity is sealed with a passivation material.
• a passivation material For example, that can
• Passivitationsmaterial be applied in the edge region of the optoelectronic semiconductor chip around the optoelectronic semiconductor chip around.
• the passivation material may alternatively or in addition to a contact point, which is designed as a closed path, find use.
• the passivation material may, for example, be dense for gas trapped in the cavity between the mirror layer and the semiconductor body. The passivation material then forms a seal for the gas.
• the passivation material may therefore additionally or alternatively to a closed
• the gas is enclosed at a pressure less than the normal pressure in at least one of the cavities. If the cavity formed between the mirror layer and the semiconductor body is sealed by a pad formed as a closed path and / or a Passivitationsmaterial, it is possible to introduce the gas with this pressure between the mirror layer and the semiconductor body, which is smaller than the normal external pressure. A gas introduced with negative pressure thereby improves the thermal properties of the gas in the cavity. That is, the heat dissipation by the gas in the cavity is in this Case further improved.
• the gas is sealed at a pressure between 0.9 and 1.1 bar in the cavity. But it is also possible to seal the gas with pressure in the cavity. In particular, pressure ranges between 1 mbar and 5 bar are conceivable.
• the distance between mirror layer and semiconductor body is at least 10 nm and preferably at most 10 ⁇ m. The distance is thereby by the
• the pads preferably have a height of at least 10 nm and at most 10 ⁇ m.
• the distance between the mirror layer and the semiconductor body is between 100 nm and 1 ⁇ m.
• the specified range for the distance between mirror layer and semiconductor body has been found to be optimal in terms of heat dissipation, which is due to the gas in at least one hollow body from the semiconductor body to the mirror layer.
• contact points and mirror layer contain at least one common metal. That is, pads and mirror layer may each contain at least one metal. At least one of the metals, the contact point and mirror layer, they have in common. For example, both pads and mirror layer contain silver, aluminum or gold.
• the contact points and the mirror layer consist of the same material.
• the contact points contain at least one solder material.
• the contact points contain at least one of the following solder materials: tin, indium, gallium, bismuth. These solder materials are characterized by a particularly low melting point. Contact points containing at least one of these solder materials can be applied particularly well by means of soldering to the semiconductor body and the mirror layer.
• a silver-tin or silver-indium compound can be used as a solder for the contact points.
• the contact points can be applied to the semiconductor body in the production of the semiconductor chip, wherein the contact points can also contain blocking or adhesion-promoting layers, which face the semiconductor body. For example, these layers may have adhesion
• the semiconductor body with the contact points is then bonded to the mirror layer, which is for example applied to a carrier.
• a carrier for example, forms an Ag-Sn phase or an Ag-In phase, which the temperature resistance of the semiconductor chip in the further processing - for example, when soldered to a
• the bonding is preferably done by means of isothermal solidification.
• the phases formed have a re-melting point which is higher, as the bond temperature. This brings advantages in the further processing of the chip after bonding and in the operation of the chip with it, since the probability of undesired loosening of the bond is reduced.
• a method for producing an optoelectronic semiconductor chip is specified.
• the method for producing an optoelectronic semiconductor chip according to at least one of the embodiments listed here is suitable. That is, a 'described herein optoelectronic semiconductor chip is manufactured using the method described or is prepared using the described method. All features disclosed in connection with the optoelectronic semiconductor chip are therefore also disclosed in connection with the method.
• the method comprises the following steps:
• a semiconductor body which has at least one active region, which can be provided, for example, for radiation generation or detection.
• a carrier is provided on which a mirror layer is applied. Between carrier and
• Mirror layer for example, a layer or layer sequence can be arranged, which serves as a diffusion barrier for material from the mirror layer.
• the semiconductor body is applied with its underside to the upper side of the mirror layer, which faces away from the carrier.
• first contact points on the top of the mirror layer are applied and / or on the underside of the The semiconductor body. That is, the pads can be applied to the mirror layer, to the semiconductor body, or to both of these elements.
• the semiconductor body and the mirror layer are connected to one another by the contact points by thermocompression. By this thermocompression, a mechanically fixed connection of the contact points with the semiconductor body and the mirror layer takes place.
• thermocompression is preferably carried out at temperatures between 150 0 C and 450 0 C.
• the pressure is adjusted between 0.4 MPa and 15 MPa.
• the thermocompression takes place between 2 minutes and 10 hours, depending on the temperature and pressure, whereby the thermocompression takes longer the lower the temperature and pressure are set.
• the contact points consist of the same material as the mirror layer.
• the mirror layer consists of a silver layer, which is deposited by means of PVD (physical vapor deposition), for example.
• Contact points made of silver are then introduced between the mirror layer and the semiconductor body.
• the contact points by means of a
• Printing method such as screen printing or ink jet printing (inkjet), by PVD or as preformed particles, in particular as beads, are applied.
• FIG. 1A shows an optoelectronic semiconductor chip described here according to a first exemplary embodiment in a schematic sectional view
• FIG. 1B shows the optoelectronic semiconductor chip according to the first exemplary embodiment in a schematic plan view of the mirror layer
• FIG. 2A shows an optoelectronic semiconductor chip described here according to a second exemplary embodiment in a schematic sectional representation
• FIG. 2B shows the optoelectronic semiconductor chip according to the second exemplary embodiment in a schematic top view of the mirror layer
• FIG. 3A shows an optoelectronic semiconductor chip described here according to a third exemplary embodiment in a schematic sectional representation
• FIG. 3B shows the optoelectronic semiconductor chip according to the third exemplary embodiment in a schematic plan view of the mirror layer 2.
• FIG. 1A shows an optoelectronic semiconductor chip according to a first exemplary embodiment described here.
• the semiconductor chip comprises a semiconductor body 1.
• the semiconductor body 1 is produced epitaxially, for example. An original on the top Ia of the semiconductor body 1
• the semiconductor body 1 arranged growth substrate is removed from the semiconductor body 1.
• the optoelectronic semiconductor chip is therefore a so-called thin-film chip.
• the semiconductor body 1 comprises an active region 10.
• the active region is provided, for example, for radiation generation or detection.
• the semiconductor body 1 faces on its underside 1 b the upper side 2 a of the mirror layer 2.
• the mirror layer consists for example of silver, gold or aluminum. If aluminum is used for the mirror layer, it is preferably treated with a flux which removes the oxide layer from the upper side 2 a of the mirror layer 2 before the mirror layer 2 is connected to the semiconductor body 1.
• Semiconductor body 1 and mirror layer 2 are mechanically and electrically connected to each other by means of contact points 3, which are formed for example as posts or columns.
• the contact points 3 may be formed from a solder system which comprises the material of the mirror layer 2 and at least one low-melting solder material such as tin, Indium, gallium or bismuth contains.
• the contact points 3 preferably contain a silver-tin or a silver-indium solder.
• the contact points 3 preferably contain a gold-indium solder.
• the mirror layer 2 consists of aluminum, then the contact points 3 are preferably formed with an aluminum-gallium solder.
• the contact points 3 can preferably have blocking and adhesion promoter layers on their side facing the semiconductor body 1.
• the barrier layer may, for example, contain at least one of the following materials or be made of one of the following materials: Ni, Pd, Pt, Ti, TiW, TiN, TiW: N.
• the primer layer may, for example, contain at least one of the following materials or be made of one of the following materials: Cr, Ni, Pd, Pt, Ti.
• the semiconductor body 1 and the mirror layer 2 are preferably interconnected by means of thermocompression.
• the contact points 3 set a distance D between the semiconductor body 1 and the mirror layer 2. Due to this distance D, at least one cavity 4 is formed between the semiconductor body 1 and the mirror layer 2. In the present exemplary embodiment, exactly one cavity 4 is formed in which numerous contact points 3 are arranged (compare also the schematic plan view of the mirror layer 2 of FIG. The cavity is in this case with a gas 40, in this case filled with air. As optimal distance, a distance of at least 100 nm and at most 1500 nm, preferably 1000 nm, has been found.
• the semiconductor chip further comprises a carrier 7, on which the mirror layer 2 is applied.
• a barrier layer 6 can be arranged between carrier 7 and mirror layer 2, which prevents diffusion of metal from the mirror layer 2 to the carrier 7 out.
• the carrier 7 may contain a metal or consist of a metal.
• the carrier may be formed by a molybdenum foil.
• the carrier contains or consists of a ceramic material such as alumina.
• the carrier may contain or consist of a semiconductor material.
• the following materials are available: silicon, germanium, GaAs.
• the barrier layer 6 may contain, for example, at least one of the following materials or consist of one of the following materials: Ni, Pd, Pt, Ti, TiW, TiN, TiW: N.
• the contact points 3 conduct the electric current from the carrier 7 to the semiconductor body 1 and a Part of the heat flow from the semiconductor body 1 to the carrier 7.
• Contact points that is, the contact points 3, it must be kept as small as possible in order to keep the effectiveness of the mirror layer 2 and the refractive index jump on the cavity 4 as high as possible.
• the density and the size of the contact points must be sufficiently large, so that the chip is electrically and thermally stable while remaining mechanically stable.
• a size of the contact points 3, that is, a diameter of at least 1 ⁇ m and not more than 50 ⁇ m are found to be advantageous.
• the density of the contact points 3 preferably corresponds to a surface coverage of the mirror layer 2 of 0.5% to 50%.
• the contact points can be arranged, for example, at the grid points of a regular grid, for example a rectangular grid or triangular grid.
• Contact points 3 can be introduced by means of PVD, a printing process or as preformed particles between the mirror layer 2 and the semiconductor body 1 or applied to these components.
• a sacrificial layer for the time of processing. That is, a sacrificial layer is applied to the side surfaces of the chip, which allows further processing of the chip, without the contact points 3 can be etched. This sacrificial layer may be removed after completion of the manufacturing process and may contain, for example, one of the following materials or be made of one of the following materials: negative photoresist, positive photoresist, silicon nitride, silicon oxide.
• a passivation material 5 is arranged in the form of a frame around the hollow body between the semiconductor body 1 and the mirror layer 2 in this exemplary embodiment.
• the passivation material 5 hermetically seals the cavity 4. This way you can another gas 40 is introduced into the cavity 4 as air.
• the gas can also be at a pressure less than the normal pressure between
• the passivation material 5 may contain one of the following materials or may be made of one of the following materials: silicon nitride, silicon oxide, silicone, bisbenzocyclobutene.
• FIGS. 3A and 3B A third exemplary embodiment of an optoelectronic semiconductor chip described here is explained in more detail in conjunction with FIGS. 3A and 3B. In this embodiment, in contrast to
• a contact point 3 designed as a closed path.
• This contact point 3 encloses further contact points 3 frame-shaped.
• the designed as a closed path pad 3 is in
• the contact point 3 also serves for the hermetic sealing of the cavity 4 between the semiconductor body and the mirror layer. In this way, a gas 40 can be sealed under a pressure less than the normal pressure in the optoelectronic semiconductor chip.
• Such a frame-shaped contact layer proves to be particularly advantageous in the case of optoelectronic semiconductor chips with a large area of the mirror layer 2, in which the absorption occurring at the edge in the contact point 3 is of less importance than in the case of smaller chips.
• the contact point 3 designed as a closed web comes in smaller Chips for use, it is advisable to form the contact point 3 of silver, which has a high reflectivity. In this way, hardly any absorption losses occur at the contact point 3 designed as a closed web.
• chips with an edge length greater than 500 ⁇ m are referred to as large chips. Small chips are correspondingly smaller.
• the contacting of the semiconductor chips described here can be done in different ways: It can be a structured top contact - such as a bond pad - and a full-surface ünterseitetern used.
• a structured top contact - such as a bond pad - and a full-surface ünterseitetern used.
• two structured top contacts - for example two bond pads - can be used.
• two structured underside contacts can be used - the semiconductor chip can then be mounted like a flip chip and electrically connected, for example.

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• 2008
  • 2008-08-22 DE DE102008039360.6A patent/DE102008039360B4/de active Active
• 2009
  • 2009-08-05 WO PCT/DE2009/001111 patent/WO2010020213A1/de not_active Ceased
  • 2009-08-05 EP EP09776069A patent/EP2316133A1/de not_active Withdrawn
  • 2009-08-05 CN CN2009801276923A patent/CN102099926B/zh active Active
  • 2009-08-05 US US13/002,352 patent/US8761219B2/en active Active
  • 2009-08-05 JP JP2011523298A patent/JP5921192B2/ja active Active
  • 2009-08-05 KR KR1020117003395A patent/KR101704831B1/ko active Active

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