EP2243159A2 - Procédé de frittage sous pression à basse température - Google Patents

Procédé de frittage sous pression à basse température

Info

Publication number
EP2243159A2
EP2243159A2 EP09709504A EP09709504A EP2243159A2 EP 2243159 A2 EP2243159 A2 EP 2243159A2 EP 09709504 A EP09709504 A EP 09709504A EP 09709504 A EP09709504 A EP 09709504A EP 2243159 A2 EP2243159 A2 EP 2243159A2
Authority
EP
European Patent Office
Prior art keywords
heat sink
sink plate
substrate
pressure sintering
sintering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09709504A
Other languages
German (de)
English (en)
Inventor
Ronald Eisele
Mathias Kock
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danfoss Silicon Power GmbH
Original Assignee
Danfoss Silicon Power GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power GmbH filed Critical Danfoss Silicon Power GmbH
Publication of EP2243159A2 publication Critical patent/EP2243159A2/fr
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49531Additional leads the additional leads being a wiring board
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29001Core members of the layer connector
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    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
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    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165Containers
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    • H01L2924/12Passive devices, e.g. 2 terminal devices
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    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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Definitions

  • the invention relates to a method for pressure sintering.
  • Electronic assemblies of power electronics with one or more semiconductor devices are typically fabricated by means of bonds, soldering or the silver pressure sintering technique of the unprotected semiconductor on a primary circuit substrate.
  • ceramic circuit carriers are preferably used
  • DCB substrates or direct copper bonded substrates
  • the substrates consist of a core of alumina or aluminum nitride with expansion coefficients of 7-8ppm / K and about 4 ppm / K.
  • the substrate may also be a purely ceramic solution in the form of thick-film hybrid supports of aluminum oxide or aluminum nitride with metallized or mounted conductor tracks.
  • a direct mounting of one or more semiconductors on a metal stamped grid can be carried out as a circuit carrier.
  • US 2004-026778 A1 shows the direct mounting of the semiconductor on sections of the stamped grid without an insulating substrate.
  • the semiconductors are electrically connected to one another and to the metallic conductor tracks of the substrate or to the stamped grid.
  • the assembled substrate or the lead frame is usually constructed with a bonding layer (gluing, pressure contact with thermal paste, soldering or pressure sintering) on a heat sink plate (eg utility model of the applicant 200 05 746 Ul).
  • a bonding layer glue, pressure contact with thermal paste, soldering or pressure sintering
  • a heat sink plate eg utility model of the applicant 200 05 746 Ul.
  • multiple substrate assemblies in series and parallel
  • the heat sink plate ensures optimum energy buffering with the heat capacity of the selected material (preferably copper).
  • the heat sink plate reduces the dynamic thermal resistance (Zth).
  • the thermal conductivity of the heat spreader plate is decisive and its dimension enlarged compared to the substrate. This leads to an advantageous thermal resistance (Rth).
  • thermosetting plastic To achieve high electrical insulation between the potential-carrying components (bonding wires, semiconductors and printed conductors) and achieve very high mechanical strength or robustness, there are products in which the assembly are coated with a thermosetting plastic.
  • This production technique consists of filling the module body in a full volume by means of transfer molding with a duroplastic hard glassy polymer material (for example Henkel Loctite Hysol). This is done with individual semiconductor components (for example in TO 220 package forms from ST-Microelectronics IRF-540) and with transistor groups, e.g. US 2005/0067719 Al.
  • Assemblies can be mounted on a common heat sink plate.
  • The- This cost-saving production and test step is not possible during assembly by means of silver pressure sintering, because the quasi-isostatic pressing of the assembly during the sintering process would destroy the bonding wires of the electrically wired assembly.
  • the pretested substrate assemblies be first of all formed into a robust, mechanically loadable assembly (mold module) by compression molding in the manner described.
  • Such a compression molded assembly may be uniaxial or quasi-isostatic
  • Presses are connected by pressure sintering with a heat sink plate by silver-sintering. In this structure, therefore, only well-tested substrate assemblies are processed.
  • This sintering process can be carried out with at least one module module, but can also be carried out simultaneously with several module modules on only one heat sink plate.
  • Disadvantage 2 Deformation of the coated assembly with integrated heat sink plate due to large expansion differences
  • the described process of compression molding has the disadvantage for the entire assembly that a renewed heating to about 170 ° C-200 ° C is made (thermal activation of the polymer cross-linking).
  • the already connected stack consisting of the materials heat sink plate, connecting layer, substrate, connecting layer and semiconductor, deforms according to their individual thermal expansion coefficients.
  • the layer adhesions and shear strengths of the bonding layers ensure a permanent superimposed overall deformation.
  • the preferred heat sink material is copper, and the high coefficient of thermal expansion of the copper (18 ppm / K) results in hollow deformation of the stack of material over a flat heat sink surface onto which the final assembly is assembled at the end user.
  • Heat sink plates fulfill their function among other things by heat spreading and material-dependent, also the increase of the total heat capacity.
  • the heat sink plate must occupy a larger area than the substrate plate connected thereto.
  • a thermoset wrapping must be made
  • the heat sink plate in a robust wall thickness include, so that the heat sink plate appears flush on one side of the enclosure.
  • the costs of the thermosetting molding compound are relatively high, so that the thermally required size of the heat sink plate is generally inadmissibly reduced.
  • the heat spreader plates are mounted by adhesive layer.
  • Heat sink plates are sometimes also externally mounted by means of thermal paste below substrate modules (molded or frame-based).
  • this form-fitting assembly is disadvantageous because of the low thermal conductivity of pastes (1-5 W / mK) and the long-term stability of the pastes and their function (pump out effect).
  • the process chain of production is changed so that the electronic assembly without the heat sink plate (and without sintering connection layer to the heat sink plate) is molded with the thermosetting coating mass.
  • the coefficient of expansion of the mold cladding mass now exclusively adapted to the thermally dominant ceramic substrate (4 to 6 ppm / K) and is now well below the thermal expansion coefficient of the heat sink plate, for example made of copper (18 ppm / K).
  • thermoset A deformation due to mismatch of the thermoset and the assembled substrate is no longer available.
  • the volume of the coated substrate is significantly lower and the material and energy consumption is correspondingly more economical and ecological (compare FIGS. 1a, 1b with FIGS. 2a, 2b).
  • a heat sink plate can be equipped in a sintering with a plurality of electrically sheathed individually wrapped assemblies.
  • 1a shows the integration of the heat sink plate according to the prior art in the formumhüllten body, with the disadvantage that the volume is large compared to the externally mounted heat sink plate and the heat sink plate has no more spreading function
  • FIG. 1b is that of FIG. 1a, but viewed from the side of the heat sink plate, FIG.
  • FIG. 2a shows an external cohesive mounting of the heat sink plate to the finished molded body, with the advantage that the duroplastic volume is small compared to the volume in FIG. 1 and the connecting layer is a thermally highly conductive sintered silver layer
  • FIG. 2b shows an external cohesive mounting of the areal enlarged heat sink plate to the finished molded body, with the advantages that the duroplastic volume is small compared to the volume in FIG. 1, the connecting layer is a thermally highly conductive sintered silver layer, the heat spread is further optimized (compared to FIG ) and a simple mounting option to a heat sink by eg screws (given,
  • FIG. 3 shows an external cohesive mounting of the area-enlarged ones
  • Heat sink plate to the completed formumhüllten body with the additional advantages that the heat spreader is segmented and the small absolute size and the absolute expansion differences can be kept smaller. Greater differences in elongation mean smaller shear stresses and thus also longer service life compared to alternating temperature loads.
  • FIG. 4 shows an external cohesive mounting of the surface-enlarged heat sink plate of a plurality of mold-enveloped bodies
  • FIG. 5 a the heat sink plate of Figure 4 supplemented by surface-expanding structures such as fins or - shown - pins for air cooling, and
  • the heat sink plate is now in another connection process, namely the silver sintered press technology, with dm completed formumhüllten body of the electronic assembly cohesively (and long-term stable) connected ( Figure 2a, 2b).
  • the bonding layer of the sintered silver typically has a thermal conductivity of approx. 250 WVmK and is thus far superior to any thermal compound and to every adhesive and solder, both thermally and mechanically.
  • the heat sink plate can be chosen in sufficient size, ie at least identical to the substrate size (primary function, high heat capacity) or identical to the molded body, or preferably also larger than the molded body (heat spreading and increasing the heat capacity).
  • the pressure sintering technology combines temperature and pressure.
  • the heat sink plate springs in the radius of the lower punch; connects via the bonding layer with the substrate and takes after cooling the final shape.
  • the desired crowned shape can now be targeted influenced by the radius of the lower punch of the pressure sintering press.
  • the arrangement can be optimized with the following improvement measures:
  • the surface extending beyond the body may be provided with holes for mounting screws.
  • the heat sink below a substrate plate may be segmented.
  • a partial heat sink which in each case should be dimensioned at least identically large with the area requirement of the component, should be dimensioned.
  • the individual partial heat sinks have smaller diagonals than the complete heat sink plate unsegmentiert.
  • the smaller heat sink plate diagonal of the sub-plates have smaller shear stresses (due to low absolute thermal expansion di- tion) with respect to the substrate and this leads to a greater thermal shock resistance than can be achieved with a complete plate.
  • the heat sink plate is a tube or a cooling-optimized hollow body, which can be flowed through by a cooling medium and in this way increases the cooling power.
  • the cavity of the body may need to be prevented from deforming by a removable support body (e.g., square bar in square tubing) during the pressure sintering process.
  • the heat sink body can be surrounded on several plan sides, preferably on the opposite surfaces with formumhumten assemblies according to the pressure sintering principle.
  • a square tube on two opposite sides carry power modules.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Abstract

L'invention concerne un procédé de frittage sous pression à basse température d'au moins une unité électronique destinée à être mise en contact thermique et à être asemblée mécaniquement de manière solide et implantée sur un substrat, qui comprend les étapes suivantes: moulage par compression de l'unité électronique reposant sur l'utilisation d'une matrice d'enveloppement avec conservation d'une surface libre de raccordement sur le substrat pour l'établissement d'une connexion de puits de chaleur, installation d'une plaque de puits de chaleur, application d'une couche de connexion de frittage sur la zone de surface laissée libre pour le raccordement et/ou sur la zone de plaque de puits de chaleur prévue pour le contact, et assemblage par liaison de matière sur le substrat entre ladite plaque de puits de chaleur et l'unité électronique dans la zone de la surface de raccordement par la technique du frittage à l'argent sous pression à basse température.
EP09709504A 2008-02-15 2009-01-16 Procédé de frittage sous pression à basse température Withdrawn EP2243159A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102008009510A DE102008009510B3 (de) 2008-02-15 2008-02-15 Verfahren zum Niedertemperatur-Drucksintern
PCT/DE2009/000050 WO2009100698A2 (fr) 2008-02-15 2009-01-16 Procédé de frittage sous pression à basse température

Publications (1)

Publication Number Publication Date
EP2243159A2 true EP2243159A2 (fr) 2010-10-27

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EP09709504A Withdrawn EP2243159A2 (fr) 2008-02-15 2009-01-16 Procédé de frittage sous pression à basse température

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Country Link
US (1) US8118211B2 (fr)
EP (1) EP2243159A2 (fr)
CN (1) CN101952960B (fr)
DE (1) DE102008009510B3 (fr)
WO (1) WO2009100698A2 (fr)

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Also Published As

Publication number Publication date
CN101952960B (zh) 2012-07-11
CN101952960A (zh) 2011-01-19
WO2009100698A2 (fr) 2009-08-20
US8118211B2 (en) 2012-02-21
DE102008009510B3 (de) 2009-07-16
US20110017808A1 (en) 2011-01-27
WO2009100698A3 (fr) 2009-12-10

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