EP1901319B1 - Verfahren zur herstellung eines festelektrolyt-kondensatorbauelements - Google Patents

Verfahren zur herstellung eines festelektrolyt-kondensatorbauelements Download PDF

Info

Publication number
EP1901319B1
EP1901319B1 EP06767698.1A EP06767698A EP1901319B1 EP 1901319 B1 EP1901319 B1 EP 1901319B1 EP 06767698 A EP06767698 A EP 06767698A EP 1901319 B1 EP1901319 B1 EP 1901319B1
Authority
EP
European Patent Office
Prior art keywords
solid electrolytic
electrolytic capacitor
capacitor element
production method
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP06767698.1A
Other languages
English (en)
French (fr)
Other versions
EP1901319A1 (de
EP1901319A4 (de
Inventor
Kazumi Naito
Shoji Yabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Holdings Corp
Original Assignee
Showa Denko KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Showa Denko KK filed Critical Showa Denko KK
Publication of EP1901319A1 publication Critical patent/EP1901319A1/de
Publication of EP1901319A4 publication Critical patent/EP1901319A4/de
Application granted granted Critical
Publication of EP1901319B1 publication Critical patent/EP1901319B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/0029—Processes of manufacture
    • H01G9/0036—Formation of the solid electrolyte layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/022—Electrolytes; Absorbents
    • H01G9/025—Solid electrolytes
    • H01G9/028—Organic semiconducting electrolytes, e.g. TCNQ
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/15—Solid electrolytic capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/022—Electrolytes; Absorbents
    • H01G9/025—Solid electrolytes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/04—Electrodes or formation of dielectric layers thereon
    • H01G9/042—Electrodes or formation of dielectric layers thereon characterised by the material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/04—Electrodes or formation of dielectric layers thereon
    • H01G9/048—Electrodes or formation of dielectric layers thereon characterised by their structure
    • H01G9/052—Sintered electrodes

Definitions

  • the present invention relates to a production method of a solid electrolytic capacitor element wherein a semiconductor layer is provided efficiently by electrolytic polymerization on a dielectric layer formed on the surface of an electric conductor. More specifically, the present invention relates to a production method of a solid electrolytic capacitor element which enables to obtain a solid electrolytic capacitor having a sufficient capacity even when the time for forming a semiconductor layer is shortened, by switching the cathode and the anode temporarily before or during the electrolytic polymerization step to form a semiconductor layer by passing an electric current using an electric conductor as an anode and a negative electrode plate placed in the electrolyte as a cathode; a solid electrolytic capacitor element and a solid electrolytic capacitor obtained by the method and the use thereof.
  • a solid electrolytic capacitor As for a capacitor having high capacitance used in various electronic devices, a solid electrolytic capacitor is known wherein an oxide dielectric film layer, a semiconductor layer and an electrode layer are formed sequentially on an electric conductor and sealed with resin mold jacketing.
  • a solid electrolytic capacitor is produced by sealing a solid electrolytic capacitor element in which an aluminum foil having fine pores in the surface layer or a tantalum powder sintered body having fine pores in the inside is used as one electrode (electric conductor) and which comprises a dielectric layer formed on the surface layer of the electrode, the other electrode (usually a semiconductor layer) provided on the dielectric layer, and an electrode layer stacked on the other electrode.
  • an electric conductor usually a semiconductor layer
  • the smaller the size of the fine pores of the electric conductor and the larger the number of the pores the larger the surface area of the electric conductor inside and the larger the capacitance of the capacitor produced from the electric conductor can be.
  • a solid electrolytic capacitor is required to have low ESR (equivalent series resistance) and therefore an electrically conducting polymer is used in preference as an inside semiconductor layer.
  • Such a semiconductor layer is formed by chemical polymerization or electrolytic polymerization.
  • Electrolytic polymerization is generally conducted using an electric conductor on the surface of which a dielectric layer is formed as an anode and a negative electrode plate placed in an electrolytic solution as a cathode with direct current, but a method using alternate current at the time of electrolytic polymerization has also been reported ( JP-A-H02-299213 : Patent Document 1). However, according to this method, a large amount of polymer is also formed on a cathode, which may lead to short circuit.
  • Patent Document 1 JP-A-H02-299213
  • JP 2003-068572 A discloses a production method of a solid electrolyte capacitor, wherein a reverse voltage is applied during a cleaning step after forming a conductive polymer layer.
  • An objective of the present invention is to provide a production method of a solid electrolytic capacitor element, which enables to produce a solid electrolytic capacitor having a good ESR property, wherein a high quality semiconductor layer is provided in a short time on the oxide dielectric film layer formed on the surface of an electric conductor by electrolytic polymerization using the electric conductor as an anode.
  • the present inventors have found that when electrolytic polymerization is conducted by passing direct current using an electric conductor on the surface of which a dielectric layer is formed as an anode and a negative electrode plate placed in the electrolytic solution as a cathode including switching the cathode and the anode temporarily before or during the electrolytic polymerization step to apply a reverse voltage, it enables to obtain a solid electrolytic capacitor having a sufficient capacity even when the time for forming a semiconductor layer is short, to shorten the production time and to improve yield.
  • the present invention has been achieved based on this finding.
  • the present invention relates to the following production method of a solid electrolytic capacitor element, a solid electrolytic capacitor produced by the method and use thereof.
  • the present invention enables to shorten the time for forming a semiconductor layer of a solid electrolytic capacitor element, which leads to shortening the time of the entire production steps and improving the yield.
  • the production comprises the step of forming a semiconductor layer for 60 minutes eight times, it is impossible to conduct three cycles of production in one day (24 hours) taking the operating time between the steps into consideration.
  • an equivalent semiconductor layer can be formed through the steps for 60 minutes six times, which enables to conduct three cycles of production in one day (24 hours) and improve the production efficiency.
  • the solid electrolytic capacitor element of the present invention is produced by forming an oxide dielectric film layer, a semiconductor layer and an electrode layer sequentially on a sintered body of electric conductor powder comprising, for example, valve-acting metal.
  • the sintered body to be used in the present invention can be produced by sintering the molded product of electric conductor powder.
  • the surface area of the sintered body can be increased by appropriately selecting the molding pressure (for example, 0.1 to 50 kg/mm 2 ) and sintering conditions (for example, a temperature from 800 to 1,800°C and a time period from one minute to ten hours).
  • the surface of the sintered body may be chemically and/or electrically etched.
  • the sintered body is not particularly limited in its shape and generally column-shaped. In a case of a rectangular column, at least one of the corners may be chamfered or rounded spherically to obtain a good average of the leakage current (LC) values of the solid electrolytic capacitors produced using the sintered body. Also, the shape of the sintered body may be tapered so as to make it easier to remove the molded product from the mold. In this case, the shape of the produced sintered body becomes almost like a frustum of pyramid.
  • Examples of the electric conductor for use in the present invention include tantalum, aluminum, niobium, and titanium; alloy mainly comprising these valve-acting metals; a niobium oxide; and a mixture of at least two members selected from these valve-acting metals, alloy and electrically conducting oxide.
  • valve-acting metals the above-mentioned alloy or electrically conducting oxide, or the above-mentioned sintered body may be used after subjecting a part thereof to at least one treatment selected from carbonization, phosphation, boronation, nitridation and sulfidation.
  • An outgoing lead may be connected directly to the electric conductor but in a case where the electric conductor is configured by shaping or shaping followed by sintering the powder of the electric conductor, it is also possible to mold a part of a separately prepared outgoing lead together with the powder at the shaping and use the outgoing lead outside the shaped portion as an outgoing lead for one electrode of the solid electrolytic capacitor.
  • the anode lead may be in either shape of a wire, foil or plate. Also, the anode lead may not be embedded in the molded product but connected thereto after the molded product is made into a sintered body. As for the material of the anode lead, tantalum, aluminum, niobium, titanium or alloy mainly comprising these valve-acting metals are used. Furthermore, the anode lead may be used after subjecting a part thereof to at least one treatment selected from carbonization, phosphation, boronation, nitridation and sulfidation.
  • the anode lead is embedded in a molded product, it is preferable to embed the anode to the depth of one-third or more, more preferably, two-third or more inside of the sintered body to maintain the strength of the sintered body so as to endure the thermal or physical encapsulation stress imposed on the capacitor element, which is generated at the encapsulation described later.
  • an insulating resin may be attached like a belt.
  • an insulating plate wired through the anode lead may be provided at the base of the sintered body.
  • an oxide dielectric film layer is formed on the sintered body surface and on a part of the anode lead.
  • the oxide dielectric film layer include a dielectric layer mainly comprising at least one member selected from metal oxides such as Ta 2 O 5 , Al 2 O 3 , TiO 2 and Nb 2 O 5 .
  • the dielectric layer can be obtained by subjecting the above-mentioned anode body to chemical formation in an electrolytic solution.
  • the dielectric layer may be a mixture of a dielectric layer mainly comprising at least one member selected from metal oxides and a dielectric layer used in a ceramic capacitor (International publication WO00/75943 ( U.S. Patent No. 6, 430, 026 )).
  • Typical examples of the semiconductor layer formed on the dielectric layer in the present invention include at least one compound selected from organic semiconductors.
  • organic semiconductors include an organic semiconductor mainly comprising an electrically conducting polymer obtained by doping a dopant in a polymer containing a repeating unit represented by the following formula (1) or (2):
  • R 1 to R 4 each independently represents a hydrogen atom, an alkyl group having from 1 to 6 carbon atoms or an alkoxy group having from 1 to 6 carbon atoms
  • X represents an oxygen atom, a sulfur atom or a nitrogen atom
  • R 5 is present only when X is a nitrogen atom
  • each pair of R 1 with R 2 and R 3 with R 4 may combine to form a cyclic structure.
  • the electrically conducting polymer containing a repeating unit represented by formula (1) is preferably an electrically conducting polymer containing, as a repeating unit, a structural unit represented by the following formula (3):
  • R 6 and R 7 each independently represents a hydrogen atom, a linear or branched, saturated or unsaturated alkyl group having from 1 to 6 carbon atoms, or a substituent forming at least one 5-, 6- or 7-membered saturated hydrocarbon cyclic structure containing two oxygen atoms when the alkyl groups are combined with each other at an arbitrary position.
  • the cyclic structure includes a structure having a vinylene bond which may be substituted, and a phenylene structure which may be substituted.
  • the electrically conducting polymer containing such a chemical structure is being electrically charged and a dopant is doped therein.
  • the dopant is not particularly limited and a known dopant can be used.
  • Examples of the polymer containing a repeating unit represented by formula (1), (2) or (3) include polyaniline, polyoxyphenylene, polyphenylene sulfide, polythiophene, polyfuran, polypyrrole, polymethylpyrrole, and a substitution derivative and a copolymer thereof.
  • preferred are polypyrrole, polythiophene and a substitution derivative thereof (e.g., poly(3,4-ethylenedioxythiophene)).
  • the solid electrolytic capacitor produced can have a small ESR value and this is preferred.
  • the semiconductor layer is formed by immersing an electric conductor on the surface of which a dielectric layer is formed in an electrolytic solution and conducting electrolytic polymerization with DC power source using the electric conductor as an anode and a negative electrode plate placed in the electrolytic solution as a cathode.
  • the present invention is characterized by passing current while providing a period for temporarily applying a reverse voltage (reverse energization) before or during the electrolytic polymerization. Subsequently, in order to repair fine defects of the dielectric layer generated during the formation of the semiconductor layer, re-chemical formation is to be performed. Moreover, the operation of forming a semiconductor layer and then performing re-chemical formation is to be repeated multiple times.
  • a semiconductor, layer is formed by repeating multiple times the following steps:
  • a reverse voltage is applied temporarily before or during the electrolytic polymerization step. This enables to shorten the time for forming a semiconductor and to improve the yield of the products and production efficiency. For example, when a step of 60-minute polymerization comprising applying first a reverse voltage of 0.5 V for five minutes and then a positive voltage for 55 minutes is repeated six times, the total polymerization time becomes 360 minutes. Meanwhile, when a step of polymerization by applying a positive voltage only for 60 minutes and a step of pulling up the electric conductor and subjecting it to re-chemical formation are repeated eight times as in a conventional case, the total polymerization takes 480 minutes. As a result, the present invention enables to conduct six cycles of a 60-minute polymerization step three times a day (within 24 hours).
  • a reverse voltage means to pass current i.e., to apply a reverse voltage
  • temporarily applying a reverse voltage means to pass current i.e., to apply a reverse voltage
  • using the negative electrode plate as an anode and the electric conductor as a cathode for a determined time before or during the step of passing current using the electric conductor as an anode and the negative electrode plate placed in the electrolytic solution as a cathode with DC power source.
  • the period for applying a reverse voltage is 10% or less, preferably 5% or less, specifically preferably 2% or less of the total time of passing current. For example, if the total time of passing current is 60 minutes, the time for applying a reverse voltage is preferably 6 minutes or less, specifically preferably 3 minutes or less. It is ineffective to extend the time for applying a reverse voltage to more than 10% of the total time of passing current. That is, it rather requires prolonging the time for applying a positive voltage in order to form an equivalent amount of a semiconductor layer.
  • the reverse voltage applied before or during the electrolytic polymerization is preferably 1 V or less.
  • the reverse voltage exceeds 1 V, there may be a case where a semiconductor layer is formed on the negative electrode plate, and if the layer flakes and becomes suspended in the electrolytic solution, an operation to remove the flakes is needed.
  • some steps may be performed by passing a positive voltage only without passing a reverse voltage. That means, all that required is to make the ratio of the time for passing a reverse voltage to the total time energization time within the above-mentioned preferable range.
  • an electrode layer is provided on the semiconductor layer formed by the above-mentioned method or the like.
  • the electrode layer can be formed, for example, by solidification of an electrically conducting paste, plating, metal deposition or lamination of a heat-resistant electrically conducting resin film.
  • Preferred examples of the electrically conducting paste include silver paste, copper paste, aluminum paste, carbon paste and nickel paste. One of these may be used or two or more thereof may be used. In the case of using two or more pastes, these pastes may be mixed or stacked as separate layers.
  • the electrically conducting paste applied is then left standing in air or heated and thereby solidified.
  • the thickness of the electrically conducting paste layer after solidified is generally about 0.1 ⁇ m to about 200 ⁇ m per layer.
  • the electrically conducting paste usually contains electrically conducting powder in an amount of 40 to 97 mass%. If the electrically conducting powder content is less than 40 mass%, the electric conductivity of the produced electrically conducting paste disadvantageously becomes low, whereas if the content exceeds 97 mass%, the electrically conducting paste may undergo adhesion failure.
  • the above-described electrically conducting polymer for forming the semiconductor layer or powder of metal oxide may be mixed and used.
  • Examples of the plating include nickel plating, copper plating, silver plating, gold plating and aluminum plating.
  • Examples of the metal to be deposited include aluminum, nickel, copper, silver and gold.
  • the electrode layer is formed by sequentially stacking, for example, a carbon paste and a silver paste on the semiconductor layer formed on an electric conductor.
  • the solid electrolytic capacitor element of the present invention having such a constitution is jacketed, for example, by resin mold, resin case, metallic jacket case, resin dipping or laminate film, whereby a solid electrolytic capacitor product for various uses can be completed.
  • resin mold resin case
  • metallic jacket case resin dipping or laminate film
  • a chip capacitor jacketed by resin mold is most preferred, in that reduction in the size and cost can be easily achieved.
  • a known resin used for encapsulation of a capacitor such as epoxy resin, phenol resin and alkyd resin can be employed.
  • epoxy resin epoxy resin
  • phenol resin and alkyd resin the encapsulation stress imposed on the capacitor element, which is generated at the encapsulation, can be mitigated and this is preferred.
  • a transfer machine is used with preference.
  • the thus-produced capacitor may be subjected to an aging treatment so as to repair the thermal and/or physical deterioration of the dielectric layer, which is caused at the formation of electrode layer or at the jacketing.
  • the aging treatment is performed by applying a predetermined voltage (usually, within twice the rated voltage) to the capacitor.
  • the optimal values of aging time and temperature vary depending on the type and capacitance of the capacitor and the rated voltage and therefore, these are previously determined by performing an experiment.
  • the aging time is usually from several minutes to several days and the aging temperature is usually 300 °C or less by taking account of thermal deterioration of the voltage-applying jig.
  • the aging atmosphere may be air or a gas such as argon, nitrogen and helium.
  • the aging may be performed in any one condition of reduced pressure, atmospheric pressure and applied pressure.
  • aging may help to further stabilize the dielectric layer in some cases.
  • One example of the method for supplying the water vapor is a method of supplying water vapor from a water reservoir placed in the aging furnace by heat.
  • the method of applying a voltage can be designed to pass an arbitrary current such as direct current, alternating current having an arbitrary waveform, alternating current superposed on direct current, and pulse current. It is also possible to once stop applying a voltage on the way of aging and again apply a voltage.
  • the solid electrolytic capacitor produced by the method of the present invention can be preferably used, for example, for a circuit requiring a capacitor having a high capacity and a low ESR value, such as a central processing circuit and a power source circuit. These circuits can be used in various digital devices such as a personal computer, server, camera, game machine, DVD equipment, AV equipment and cellular phone, and electronic devices such as various power sources.
  • the capacitor produced in the present invention has a high capacitance and a low ESR value and therefore, electronic circuits or electronic devices with a good performance can be obtained by using the capacitor.
  • a sintered body in a size of 4.5 ⁇ 1.0 ⁇ 3.0 mm (density of sintered body: 6.0 g/cm 3 ) was produced at a sintering temperature of 1,320°C for a sintering time of 20 minutes, wherein a tantalum (Ta) lead wire (0.40 mm ⁇ ) was partially embedded in parallel to the longitudinal direction of the sintered body and the lead wire part (anode part) protruded from the sintered body was provided.
  • CV product of capacitance and chemical formation voltage
  • the sintered body to serve as an anode excluding a part of the lead wire was dipped in a 2 mass% toluenesulfonic acid aqueous solution and subjected to chemical formation at 65°C for 400 minutes by applying 9 V between the anode and a tantalum (Ta) plate electrode serving as a cathode to form an oxide dielectric film layer comprising Ta 2 O 5 .
  • a tantalum (Ta) plate electrode serving as a cathode to form an oxide dielectric film layer comprising Ta 2 O 5 .
  • the sintered body was dipped in a tank (the tank was laminated with a tantalum foil and serving itself as an external electrode) containing a mixed solution of 20 mass% ethylene glycol and water, which contains 5 mass% toluenesulfonic acid and supersaturated pyrrole, and by assigning the anode to the lead wire of the sintered body and the cathode to the external electrode, an electric current was applied at a reverse voltage of 0.5 V at 2 °C for one minute and then an electric current of 120 ⁇ A was passed at a positive voltage for 49 minutes to form a semiconductor layer on the dielectric layer.
  • the sintered body was pulled out, washed with water, washed with alcohol for five minutes, dried, subjected to re-chemical formation in a 1 mass% naphthalenesulfonic acid aqueous solution at 65°C with 7 V for 15 minutes, then pulled out, washed with water, washed with alcohol for five minutes, and dried.
  • This process of forming a semiconductor layer and performing re-chemical formation was repeated six times to form a semiconductor layer comprising polypyrrole with a main dopant of toluenesulfonic acid ion.
  • a carbon paste was stacked and dried, and then a silver paste layer was stacked and dried to form an electrode layer. In this way, 30 units of capacitor elements were produced.
  • the lead wire on the sintered body side and the silver paste surface on the electrode layer side were placed and electrically or mechanically connected by spot-welding for the former and by a silver paste for the latter. Thereafter, the entirety excluding a part of the lead flame was transfer-molded with epoxy resin. After curing the resin at 155 °C for 60 minutes, the lead frame outside the mold was cut at a predetermined position and then bent along the jacket to serve as an external terminal. In this way, a chip capacitor in a size of 7.3 ⁇ 4.3 ⁇ 1.8 mm was produced. Subsequently, the capacitor was aged at 125°C with 4 V for four hours, and thereby 30 units of chip capacitors were eventually produced.
  • Chip capacitors were produced in the same way as in Example 1 except that the semiconductor layer was formed by passing current of 120 ⁇ A at a positive voltage for 20 minutes, applying a reverse voltage of 0.5 V for one minute and passing current of 120 ⁇ A at a positive voltage for 29 minutes.
  • Chip capacitors were produced in the same way as in Example 1 except that the semiconductor layer was formed by passing current of 120 ⁇ A at a positive voltage for 20 minutes, applying a reverse voltage of 0.5 V for one minute and passing current of 120 ⁇ A was passed at a positive voltage for 29 minutes and in the second and the fifth steps among the step of forming a semiconductor layer and performing re-chemical formation repeated six times, a semiconductor layer was formed by passing current at a positive voltage only.
  • Chip capacitors were produced in the same way as in Example 1 except that the semiconductor layer was formed by passing current of 120 ⁇ A at a positive voltage for 50 minutes.
  • Chip capacitors were produced in the same way as in Example 1 except that the semiconductor layer was formed by passing current of 120 ⁇ A at a positive voltage for 50 minutes and repeating the step of forming a semiconductor layer and performing re-chemical formation eight times.
  • a niobium primary powder (average particle diameter: 0.30 ⁇ m) ground by utilizing hydrogen embrittlement of a niobium ingot was granulated to obtain a niobium powder having an average particle diameter of 115 ⁇ m (this niobium powder was fine powder and therefore, naturally oxidized on the surface to contain 110,000 ppm of oxygen).
  • the obtained niobium powder was left standing in a nitrogen atmosphere at 450°C and further in argon at 700°C to obtain a partially nitrided niobium powder (CV: 295,000 ⁇ F ⁇ V/g) having a nitrided amount of 8,500 ppm.
  • the resulting niobium powder was molded together with a niobium wire of 0.40 mm in diameter and the molded article was sintered at 1,250°C to prepare 30 units of sintered bodies (electrically conducting bodies) having a size of 4.5 ⁇ 3.0 ⁇ 1.7 mm (mass of each sintered body: 0.084 g; the niobium wire serving as a lead wire was present such that 3.7 mm was inside the sintered body and 10 mm was outside).
  • the sintered body was chemically formed in a 1 mass% anthraquinonesulfonic acid aqueous solution at 80 °C with 20 V for 7 hours to form a dielectric layer mainly comprising diniobium pentoxide on the sintered body surface and on a part of the lead wire.
  • the operation of dipping the sintered body in a 30 mass% iron toluenesulfonate aqueous solution, drying it to remove the moisture and then performing re-chemical formation in a 30 mass% toluenesulfonic acid aqueous solution at 80 °C with 15 V for 15 minutes was alternately repeated eight times.
  • the sintered body was dipped in a bath (the bath was laminated with a tantalum foil to serve as an external electrode) containing a mixed solution of water and 30 mass% ethylene glycol, in which 3,4-ethylene dioxythiophene and 1 mass% anthraquinonesulfonic acid were dissolved.
  • a semiconductor layer was formed on the dielectric layer by applying a reverse voltage of 0.9 V for three minutes and passing current of 90 ⁇ A at a positive voltage for 57 minutes at 23°C.
  • the sintered body was pulled up from the aqueous solution, washed with water, washed with alcohol for 15 minutes, dried and then subjected to re-chemical formation in a 1 mass% anthraquinonesulfonic acid aqueous solution at 80 °C with 14 V for 15 minutes.
  • This operation of performing electrolytic polymerization and then re-chemical formation was repeated eight times, whereby a semiconductor layer comprising polythiophene derivative with a main dopant of anthraquinone sulfonic acid ion was formed on the dielectric layer.
  • a carbon paste layer was stacked and dried, and then a silver paste was stacked and dried to form an electrode layer.
  • a plurality of solid electrolytic capacitor elements were produced.
  • the lead wire on the sintered body side and the silver paste surface on the electrode layer side were placed and electrically or mechanically connected by spot-welding for the former and by a silver paste for the latter. Thereafter, the entirety excluding a part of the lead flame was transfer-molded with epoxy resin.
  • the lead frame outside the mold was cut at a predetermined position and then bent along the jacket to serve as an external terminal. In this way, a chip capacitor in a size of 7.3 ⁇ 4.3 ⁇ 2.8 mm was produced.
  • the capacitor was aged at 125°C with 7 V for three hours and passed through a tunnel furnace having a peak temperature of 270 °C and a region at 230 °C for 35 seconds three times, and thereby 30 units of chip capacitors were eventually produced.
  • Chip capacitors were produced in the same way as in Example 4 except that the semiconductor layer was formed by passing current of 90 ⁇ A at a positive voltage for 10 minutes, applying a reverse voltage of 0.2 V for one minute and passing current of 90 ⁇ A at a positive voltage for 49 minutes.
  • Chip capacitors were produced in the same way as in Example 4 except that the semiconductor layer was formed by passing current of 90 ⁇ A at a positive voltage for 10 minutes, applying a reverse voltage of 0.2 V for one minute and passing current of 90 ⁇ A at a positive voltage for 49 minutes and in the first to forth steps among the step of forming a semiconductor layer and performing re-chemical formation repeated eight times, a semiconductor layer was formed by passing current at a positive voltage only.
  • Chip capacitors were produced in the same way as in Example 4 except that in the first to forth steps among the step of forming a semiconductor layer and performing re-chemical formation repeated eight times, a semiconductor layer was formed by passing current at a positive voltage only.
  • Chip capacitors were produced in the same way as in Example 4 except that the semiconductor layer was formed by applying a reverse voltage of 0.9 V for 3 minute and passing current of 150 ⁇ A at a positive voltage for 57 minutes.
  • Chip capacitors were produced in the same way as in Example 4 except that the semiconductor layer was formed by passing current of 90 ⁇ A at a positive voltage for 60 minutes.
  • Chip capacitors were produced in the same way as in Example 4 except that the semiconductor layer was formed by passing current of 90 ⁇ A at a positive voltage for 60 minutes, and by repeating the step of forming a semiconductor layer and performing re-chemical formation ten times.
  • NbO powder which is an electrically conducting oxide (having an average particle size of 150 ⁇ m as a result of granulation at the time of reduction and CV value of 90,000 ⁇ F ⁇ V/g).
  • the NbO powder was molded with embedding a tantalum wire of 0.52 mm therein and then sintered at 1,350 °C under vacuum for 40 minutes to produce 30 units of sintered body having a size of 4.0 ⁇ 3.2 ⁇ 1.6 mm (mass of each sintered body: 0.05g).
  • the sintered body was subjected to chemical formation in a 0.5% benzoic acid aqueous solution at 65°C with 14 V for 400 minutes to form a dielectric layer comprising Nb 2 O 5 on the sintered body surface and on a part of the anode lead.
  • a 0.5% benzoic acid aqueous solution at 65°C with 14 V for 400 minutes to form a dielectric layer comprising Nb 2 O 5 on the sintered body surface and on a part of the anode lead.
  • the operation of dipping only the sintered body part in a 20% iron naphthalenesulfonate alcohol solution, pulling up the sintered body and drying it at 60°C for five minutes was repeated seven times.
  • the sintered body was dipped in a mixed solution of water and 30% ethylene glycol, in which 3,4-ethylene dioxythiophene and 3% anthraquinonesulfonic acid were dissolved.
  • electrolytic polymerization was performed by passing current of 50 ⁇ A at 25°C for 30 minutes.
  • the sintered body was pulled up from the bath, washed with water, washed with ethanol and dried. Further, the sintered body was subjected to re-chemical formation in the above chemical formation bath with 9 V at 65°C for 15 minutes, pulled up from the bath, washed with water and dried.
  • a series of operations of electrolytic polymerization and re-chemical formation was repeated 20 times, and in the first, third, fifth, seventh and ninth cycles among the 20 cycles of the operation, the anode was switched with the cathode after a lapse of ten minutes during each of 30-minute electrolytic polymerization and a reverse voltage of 0.5 V was applied for one minute. After that, through the formation of an electrode layer, encapsulating and post-processing in the same way as in Example 1, 30 units of chip solid electrolytic capacitors in a size of 7.3 ⁇ 4.3 ⁇ 2.8 mm were produced. The capacitance of the produced capacitor was 270 ⁇ F.
  • Solid electrolytic capacitors were produced in the same way as in Example 9 except that a reverse voltage was not applied during the electrolytic polymerization.
  • the capacitance of the produced capacitor was 225pF.
  • the capacitance of each capacitor produced in the above-mentioned Examples 1 to 8 and Comparative Examples 1 to 4 was measured by the following method: The capacitance of the capacitor: The capacitance was measured using LCR Meter produced by Hewlett-Packard at 120Hz and at room temperature. The measurement results (on an average) were shown in Table 1.
  • Example 1 At a reverse voltage of 0.5 V for 1 minute and a positive voltage of 120 ⁇ A for 49 minutes 6 1010
  • Example 2 At a positive voltage of 120 ⁇ A for 20 minutes, at a reverse voltage of 0.5 V for 1 minute and at a positive voltage of 120 ⁇ A for 29 minutes 6 1020
  • Example 3 Same as in Example 2 6 in total (at a positive voltage only in the second and fifth time) 1000 Comp.
  • Example 1 At a positive voltage of 120 ⁇ A for 50 minutes 6 850 Comp.
  • Example 2 Same as in Comparative Example 1 8 990
  • Example 4 At a reverse voltage of 0.9 V for 3 minutes and at a positive voltage of 90 ⁇ A for 57 minutes 8 920
  • Example 5 At a positive voltage of 90 ⁇ A for 10 minutes, at a reverse voltage of 0.2 V for 1 minute and at a positive voltage of 90 ⁇ A for 49 minutes 8 930
  • Example 6 Same as in Example 5 8 in total (at a positive voltage only in first to fourth times) 910
  • Example 7 Same as in Example 4 Same as in Example 6 910
  • Example 8 At a reverse voltage of 0.9 V for 3 minutes and at a positive voltage of 150 ⁇ A for 57 minutes 8 890
  • Example 9 At a positive voltage of 50 ⁇ A for 10 minutes, at a reverse voltage of 0.5 V for 1 minute and at a positive voltage of 50 ⁇ A for 19 minutes 20 in total (at a positive voltage only except the first, third, fifth, seventh and ninth times) 270 Comp.
  • Example 3 At a positive voltage of 90 ⁇ A for 60 minutes 8 770
  • Examples 4 and 5 and Comparative Examples 1 to 4 it has turned out that a capacitor having a higher capacitance can be obtained in a case where a reverse voltage was temporarily applied before or during the electrolytic polymerization rather than in a case where the electrolytic polymerization was conducted by passing current only at a positive voltage. Also, the comparison of Examples 1 to 2 and Example 3, or Examples 4 to 5 and Examples 6 to 7, respectively, shows that it has an insignificant effect on the capacitance of a capacitor if the electrolytic polymerization is performed by energization only at a positive voltage several times among the repeated operations of forming a semiconductor layer and performing re-chemical formation.
  • Comparative Example 4 though the number of repetitions of the step of forming a semiconductor layer and performing re-chemical formation was increased, it was not so effective as in a case where a reverse voltage was applied at the time of forming a semiconductor layer and, what is more, takes longer time. Therefore, it is industrially unsuitable.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Polyoxymethylene Polymers And Polymers With Carbon-To-Carbon Bonds (AREA)

Claims (19)

  1. Herstellungsverfahren eines Festelektrolytkondensatorelements, wobei eine Halbleiterschicht durch elektrolytische Polymerisation auf einem elektrischen Leiter, der eine dielektrische Oxidfilmschicht aufweist, gebildet wird und eine Elektrodenschicht sequentiell darauf geschichtet wird, umfassend das Durchleiten von Strom, wobei ein Zeitraum des temporären Anlegens einer Sperrspannung vor oder während der elektrolytischen Polymerisation vorgesehen wird, indem Strom unter Verwendung eines elektrischen Leiters als Anode und einer in der Elektrolytlösung negativen Elektrodenplatte als Kathode geleitet wird.
  2. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 1, wobei der Zeitraum des Anlegens einer Sperrspannung 10% oder weniger der Gesamtzeit des Fließens von Strom beträgt.
  3. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 1 oder 2, wobei die Sperrspannung 1 V oder weniger beträgt.
  4. Herstellungsverfahren eines Festelektrolytkondensatorelements nach einem der Ansprüche 1 bis 3, umfassend das mehrmalige Wiederholen eines Schrittes zum Bilden einer Halbleiterschicht und eines Schrittes eines erneuten chemischen Bildens.
  5. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 4, umfassend einen Schritt ohne Anlegen einer Sperrspannung zwischen den Schritten zum Bilden einer Halbleiterschicht, wobei dieser Schritt mehrmals wiederholt wird.
  6. Herstellungsverfahren eines Festelektrolytkondensatorelements nach einem der Ansprüche 1 bis 5, worin der elektrische Leiter ein Metall oder eine Legierung ist, das/die hauptsächlich mindestens ein Element umfasst, das aus einer Gruppe ausgewählt ist, die aus Tantal, Niob, Titan und Aluminium besteht; ein Nioboxid oder eine Mischung aus mindestens zwei der Elemente, die aus diesen Metallen, Legierungen und Nioboxid ausgewählt sind.
  7. Herstellungsverfahren eines Festelektrolytkondensatorelements nach einem der Ansprüche 1 bis 6, wobei der elektrische Leiter ein Sinterkörper ist, an den eine Anodenleitung angeschlossen ist.
  8. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 7, worin das Material der Anodenleitung Tantal, Aluminium, Niob, Titan oder eine Legierung ist, die hauptsächlich diese Ventilmetalle umfasst.
  9. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 7 oder 8, wobei die Anodenleitung in Form eines Drahtes, einer Folie oder einer Platte vorliegt.
  10. Herstellungsverfahren eines Festelektrolytkondensatorelements nach einem der Ansprüche 1 bis 9, wobei die Halbleiterschicht mindestens eine ist, die aus organischen Halbleiterschichten ausgewählt ist.
  11. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 10, wobei die Halbleiterschicht mindestens ein Element ist, ausgewählt aus einem organischen Halbleiter, der Benzopyrrolintetramer und Chloranil umfasst, einem organischen Halbleiter, der hauptsächlich Tetrathiotetracen umfasst, einem organischen Halbleiter, der hauptsächlich Tetracyanochinodimethan umfasst, und organischen Halbleitern, die hauptsächlich ein elektrisch leitfähiges Polymer umfassen, das durch Dotieren eines Dotierungsmittels in ein Polymer erhalten wird, das eine Wiederholungseinheit enthält, die durch die folgende Formel (1) oder (2) dargestellt wird:
    Figure imgb0007
     wobei R1 bis R4 jeweils unabhängig voneinander ein Wasserstoffatom, eine Alkylgruppe mit 1 bis 6 Kohlenstoffatomen oder eine Alkoxygruppe mit 1 bis 6 Kohlenstoffatomen darstellen, X ein Sauerstoffatom, ein Schwefelatom oder ein Stickstoffatom darstellt, R5 nur vorhanden ist, wenn X ein Stickstoffatom ist und ein Wasserstoffatom oder eine Alkylgruppe mit 1 bis 6 Kohlenstoffatomen darstellt, und jedes Paar von R1 mit R2 und R3 mit R4 unter Bildung einer zyklischen Struktur kombiniert werden kann.
  12. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 11, wobei das elektrisch leitfähige Polymer, das eine Wiederholungseinheit der Formel (1) enthält, ein elektrisch leitfähiges Polymer ist, das als Wiederholungseinheit eine Struktureinheit der folgenden Formel (3) enthält:
    Figure imgb0008
     wobei R6 und R7 jeweils unabhängig voneinander ein Wasserstoffatom, eine lineare oder verzweigte, gesättigte oder ungesättigte Alkylgruppe mit 1 bis 6 Kohlenstoffatomen oder einen Substituenten darstellen, der mindestens eine oder mehrere 5-, 6- oder 7-gliedrige gesättigte zyklische Kohlenwasserstoffstruktur(en) mit bildet, die zwei Sauerstoffatome aufweist, wenn die Alkylgruppen an einer beliebigen Position miteinander kombiniert sind, und die zyklische Struktur eine Struktur mit einer Vinylenbindung, die substituiert sein kann, und eine Phenylenstruktur, die substituiert sein kann, beinhaltet.
  13. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 11, wobei das elektrisch leitende Polymer ausgewählt ist aus der Gruppe bestehend aus Polyanilin, Polyoxyphenylen, Polyphenylensulfid, Polythiophen, Polyfuran, Polypyrrol, Polymethylpyrrol und einem Substitutionsderivat und einem Copolymer davon.
  14. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 12 oder 13, wobei das elektrisch leitende Polymer Poly(3,4-ethylendioxythiophen) ist.
  15. Herstellungsverfahren eines Festelektrolytkondensatorelements nach Anspruch 10, wobei die elektrische Leitfähigkeit des Halbleiters von 10-2 bis 103 S/cm ist.
  16. Festelektrolytkondensatorelement, erhalten durch das Herstellungsverfahren nach einem der Ansprüche 1 bis 15.
  17. Festelektrolytkondensator, erhalten durch Versiegeln des in Anspruch 16 beanspruchten Festelektrolytkondensatorelements mit einer Harzformummantelung.
  18. Elektronische Schaltung bei welcher der in Anspruch 17 beanspruchte Festelektrolytkondensator verwendet wird.
  19. Elektronisches Bauteil unter Verwendung des in Anspruch 17 beanspruchten Festelektrolytkondensators.
EP06767698.1A 2005-06-30 2006-06-30 Verfahren zur herstellung eines festelektrolyt-kondensatorbauelements Active EP1901319B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005191229 2005-06-30
PCT/JP2006/313090 WO2007004556A1 (ja) 2005-06-30 2006-06-30 固体電解コンデンサ素子の製造方法

Publications (3)

Publication Number Publication Date
EP1901319A1 EP1901319A1 (de) 2008-03-19
EP1901319A4 EP1901319A4 (de) 2018-03-14
EP1901319B1 true EP1901319B1 (de) 2019-06-19

Family

ID=37604421

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06767698.1A Active EP1901319B1 (de) 2005-06-30 2006-06-30 Verfahren zur herstellung eines festelektrolyt-kondensatorbauelements

Country Status (4)

Country Link
US (1) US7842103B2 (de)
EP (1) EP1901319B1 (de)
JP (1) JP4827195B2 (de)
WO (1) WO2007004556A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4926131B2 (ja) * 2008-06-25 2012-05-09 ニチコン株式会社 固体電解コンデンサの製造方法および固体電解コンデンサ
US9828460B2 (en) 2012-07-25 2017-11-28 Showa Denko K.K. Method for producing conductive polymer and method for producing solid electrolyte capacitor
JP6145838B2 (ja) * 2013-01-31 2017-06-14 パナソニックＩｐマネジメント株式会社 固体電解コンデンサの製造方法
CN108231434B (zh) * 2017-12-27 2021-10-08 益阳艾华富贤电子有限公司 固态电容制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3615975A1 (de) * 1985-05-15 1986-11-20 Bridgestone Corp., Tokio/Tokyo Polyaniline, verfahren zu ihrer herstellung und sie enthaltende zellen
JP2826341B2 (ja) 1989-05-13 1998-11-18 日本ケミコン株式会社 固体電解コンデンサの製造方法
JPH03139816A (ja) 1989-10-25 1991-06-14 Marcon Electron Co Ltd 固体電解コンデンサの製造方法
TW479262B (en) * 1999-06-09 2002-03-11 Showa Denko Kk Electrode material for capacitor and capacitor using the same
JP2001332450A (ja) 2000-05-18 2001-11-30 Nec Corp 固体電解コンデンサの製造方法
JP2001332453A (ja) 2000-05-25 2001-11-30 Mitsubishi Chemicals Corp 固体電解コンデンサ
JP2003068572A (ja) 2001-08-24 2003-03-07 Nippon Chemicon Corp 固体電解コンデンサの製造方法
JP3965300B2 (ja) * 2002-01-18 2007-08-29 Ｎｅｃトーキン株式会社 Ｎｂ固体電解コンデンサおよびその製造方法
US20080019080A1 (en) * 2004-09-13 2008-01-24 Showa Denko K.K. Solid Electrolytic Capacitor Element, Solid Electrolytic Capacitor and Production Method Thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
EP1901319A1 (de) 2008-03-19
JPWO2007004556A1 (ja) 2009-01-29
EP1901319A4 (de) 2018-03-14
US7842103B2 (en) 2010-11-30
US20090225497A1 (en) 2009-09-10
JP4827195B2 (ja) 2011-11-30
WO2007004556A1 (ja) 2007-01-11

Similar Documents

Publication Publication Date Title
EP1876612B1 (de) Festelektrolyt-kondensatorelement, herstellungsverfahren dafür und festelektrolyt-kondensator
EP1592029B1 (de) Herstellungsverfahren für den kondensator
EP1792322B1 (de) Festes elektrolytisches kondensatorelement, fester elektrolytischer kondensator und herstellungsverfahren dafür
EP1592030B1 (de) Verfahren zur herstellung eines festelektrolytkondensators
EP1898433A1 (de) Festelektrolytkondensator und herstellungsverfahren dafür
EP1768140B1 (de) Festelektrolytkondensatorelement und kohlenstoffpaste für seine herstellung
EP1901319B1 (de) Verfahren zur herstellung eines festelektrolyt-kondensatorbauelements
EP1654745B1 (de) Chip-festelektrolytkondensator und herstellungsverfahren dafür
US20090090997A1 (en) Solid electrolytic capacitor element and production method thereof
US7355842B2 (en) Chip solid electrolyte capacitor and production method of the same
JP2005101562A (ja) チップ状固体電解コンデンサ及びその製造方法
US7423862B2 (en) Solid electrolytic capacitor element, solid electrolytic capacitor and production method thereof
JP4689381B2 (ja) コンデンサ素子の製造方法
EP1909298B1 (de) Verfahren zum herstellen eines festelektrolytkondensators
JP4367752B2 (ja) 固体電解コンデンサ素子の製造方法
JP2005101592A (ja) 焼結体及びその焼結体を使用したチップ状固体電解コンデンサ
WO2005008701A1 (en) Method for producing solid electrolytic capacitor

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20080115

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

DAX Request for extension of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

RA4 Supplementary search report drawn up and despatched (corrected)

Effective date: 20180208

RIC1 Information provided on ipc code assigned before grant

Ipc: H01G 9/00 20060101AFI20180202BHEP

17Q First examination report despatched

Effective date: 20180301

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20190103

RIN1 Information on inventor provided before grant (corrected)

Inventor name: YABE, SHOJI

Inventor name: NAITO, KAZUMI

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602006058168

Country of ref document: DE

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1146544

Country of ref document: AT

Kind code of ref document: T

Effective date: 20190715

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20190619

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190919

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190920

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1146544

Country of ref document: AT

Kind code of ref document: T

Effective date: 20190619

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20191021

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20191019

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20190630

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190630

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190630

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190630

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200224

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190630

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190630

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602006058168

Country of ref document: DE

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG2D Information on lapse in contracting state deleted

Ref country code: IS

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190819

26N No opposition filed

Effective date: 20200603

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20190919

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190919

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20190619

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20060630

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 602006058168

Country of ref document: DE

Owner name: RESONAC CORP., JP

Free format text: FORMER OWNER: SHOWA DENKO K.K., TOKYO, JP

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20240507

Year of fee payment: 19