EP1885056B1 - Elektronische Schaltvorrichtung - Google Patents

Elektronische Schaltvorrichtung Download PDF

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Publication number
EP1885056B1
EP1885056B1 EP07113024.9A EP07113024A EP1885056B1 EP 1885056 B1 EP1885056 B1 EP 1885056B1 EP 07113024 A EP07113024 A EP 07113024A EP 1885056 B1 EP1885056 B1 EP 1885056B1
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EP
European Patent Office
Prior art keywords
transistor
terminal
coupled
bias
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP07113024.9A
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English (en)
French (fr)
Other versions
EP1885056A1 (de
Inventor
Tsuneo Tokumitsu
Osamu Baba
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Sumitomo Electric Device Innovations Inc
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Sumitomo Electric Device Innovations Inc
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Publication of EP1885056A1 publication Critical patent/EP1885056A1/de
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
    • H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
    • H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B7/00—Generation of oscillations using active element having a negative resistance between two of its electrodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
    • H03B2200/006—Functional aspects of oscillators
    • H03B2200/0062—Bias and operating point
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B7/00—Generation of oscillations using active element having a negative resistance between two of its electrodes
    • H03B7/02—Generation of oscillations using active element having a negative resistance between two of its electrodes with frequency-determining element comprising lumped inductance and capacitance
    • H03B7/06—Generation of oscillations using active element having a negative resistance between two of its electrodes with frequency-determining element comprising lumped inductance and capacitance active element being semiconductor device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B7/00—Generation of oscillations using active element having a negative resistance between two of its electrodes
    • H03B7/12—Generation of oscillations using active element having a negative resistance between two of its electrodes with frequency-determining element comprising distributed inductance and capacitance
    • H03B7/14—Generation of oscillations using active element having a negative resistance between two of its electrodes with frequency-determining element comprising distributed inductance and capacitance active element being semiconductor device

Definitions

  • This invention generally relates to an electronic circuit device, and in particular, relates to an electronic circuit device in which a DC bias is applied to two transistors in series.
  • An oscillator is used in a device using a high frequency wave such as a communication device. It is difficult to manufacture a high-performance oscillator using a high frequency wave such as a milliwave. There is a case where a signal of relatively low frequency from the oscillator is multiplied into a second harmonic wave and a third harmonic wave by a frequency multiplier and is used.
  • the frequency multiplier is a circuit that outputs a distorted waveform including a nonlinear signal such as a higher harmonic component (a second harmonic wave or a third harmonic wave) and outputs a signal of desirable frequency (a second harmonic wave or a third harmonic wave) through a filter.
  • Japanese Patent Application Publication No. 2000-156611 discloses a frequency multiplier using a transistor.
  • an electrical power of a high frequency component is smaller than that of a reference wave, in a frequency multiplier.
  • a multiplication loss is therefore generated with respect to the reference wave.
  • an insertion loss of a filter is generated when the filter is used. Therefore, a signal level is reduced when the frequency multiplier multiplies an output signal from the oscillator. And so, an amplifier is provided at the backside of the frequency multiplier, when the frequency multiplier is used.
  • a size of the circuit is enlarged. For example, a chip size is enlarged when the circuit is a MMIC (Microwave Monolithic Integrated Circuit).
  • US5440276 discloses a voltage controlled oscillating circuit.
  • the circuit includes: a ⁇ -strip resonance circuit for deciding the resonance frequency in accordance with an external tuning voltage; an oscillation amplifying circuit for performing oscillations in accordance with the resonance frequency signals of the ⁇ -strip resonance circuit and a buffer amplifying circuit provided between the oscillating circuit and the load, and for preventing the load pulling phenomenon.
  • the oscillation amplifying circuit forms a common collector oscillating circuit with a single oscillation amplifying transistor, and the buffer amplifying circuit forms a single step amplifying circuit with a single buffer amplifying transistor.
  • the oscillation amplifying transistor and the buffer amplifying transistor form a cascode amplifying transistor with a signal inducing coil and an RF choke coil for blocking the ac components and for forming a series of DC bias paths.
  • the invention proposes an electronic circuit device according to claim 1.
  • Embodiments of the present invention may provide an electronic circuit device having a small multiplication loss and multiplying an output frequency of an oscillator with a small circuit.
  • an electronic circuit device comprising: a negative resistance generating circuit that has a first transistor having a control terminal coupled to a resonator; a second transistor that has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal; and a path that is coupled to between the DC bias terminal and the output terminal of the first transistor through the second transistor and provides a bias to the first transistor.
  • the control terminal of the second transistor is coupled to the output terminal of the first transistor so that a DC bias of the output terminal of the first transistor is applied to the control terminal of the second transistor.
  • the first transistor and the second transistor may enhance a nonlinearity with each other and output a harmonic wave having a large power level, because a DC bias is applied to the first transistor and the second transistor in series. Therefore, a multiplication loss may be reduced and an output frequency of an oscillator may be multiplied with a small circuit.
  • FIG. 1 illustrates the principle in accordance with the present invention.
  • an electronic circuit 50 has a first transistor 10 and a second transistor 20.
  • the first transistor 10 has a source S1 (a second terminal) coupled to a negative resistance generator 14 and has a gate G1 (a control terminal) coupled to a resonator 30.
  • a drain D1 (a first terminal) acts as an output terminal of the first transistor 10 and is coupled to a gate G2 that is a control terminal of the second transistor 20.
  • the second transistor 20 has a source S2 (a second terminal) coupled to the drain D1 through a path 25 different from the gate G2.
  • the gate G2 of the second transistor 20 and the path 25 are coupled to a node N1.
  • the source S2 is coupled to a ground through a capacitor C3.
  • the drain D2 (a first terminal) is coupled to an electrical power supply Vdd (a DC bias terminal) and an output portion Out.
  • a DC (DC: Direct Current) bias of the electrical power supply Vdd is applied to the second transistor 20 and the first transistor 10 through a dotted line shown in FIG. 1 . That is, the second transistor 20 and the first transistor 10 are coupled to each other in series so that the DC bias is applied to the second transistor 20 and the first transistor 10 in series through the path 25.
  • the capacitor C3 is a capacitor grounding a signal at high frequency wave to the ground.
  • the first transistor 10 and the negative resistance oscillator is, for example, a circuit composed of a negative resistance generating element such as a capacitor or of elements.
  • the negative resistance generator 14 generates a negative resistance so that the negative resistance generator 14 and the first transistor 10 act as an oscillator, when the negative resistance generator 14 is coupled to the first transistor 10.
  • An oscillation signal from the drain D1 of the first transistor 10 is a nonlinear large signal.
  • a range of the linear signal is from a signal near the DC to a high frequency wave signal.
  • the high frequency wave signal is mainly applied to the gate G2, because the high frequency wave signal is grounded through the capacitor C3.
  • the signal near the DC is applied to the source S1 through the path 25.
  • the first transistor 10 and the second transistor 20 are coupled to each other in series with respect to the DC.
  • an electrical potential difference is large between the source S2 and the drain D2 of the second transistor 20, when an electrical potential difference is small between the source S1 and the drain D1 of the first transistor 10.
  • the electrical potential difference is small between the source S2 and the drain D2 of the second transistor 20, when the electrical potential difference is large between the source S1 and the drain D1 of the first transistor 10.
  • the source S2 of the second transistor 20 receives a signal near the DC of the nonlinear large signal from the first transistor 10. Therefore, nonlinearity of the signal is enhanced in the second transistor 20 and is output. Accordingly, with respect to an oscillation frequency from the drain Di, the nonlinear signal such as a second harmonic wave or a third harmonic wave is enlarged. Further, the second transistor 20 acts as an amplifier, because the second transistor 20 is grounded through the source.
  • the electronic circuit 50 may generate a second harmonic wave and a third harmonic wave having a high electrical power level.
  • FIG. 2 illustrates a circuit diagram in accordance with a first embodiment.
  • An inductor L and a resistor R1 are coupled to the source S1 of the first transistor 10 in parallel with the capacitor C1.
  • the inductor L and the resistor R1 compose a bias circuit 12.
  • the capacitor C1 and the bias circuit 12 compose a negative resistance generator.
  • the capacitor C1 mainly generates a negative resistance.
  • the bias circuit 12 is a direct current path to which a part of the DC bias applied to the electrical power supply Vdd is applied.
  • the bias circuit 12 regulates a level of the source S1 of the first transistor 10.
  • a capacitor C2 is coupled to between the first transistor 10 and the resonator 30.
  • An element L1 having an inductance component is coupled to between the first transistor 10 and the node N1.
  • An element L3 having an inductance component is coupled to between the node N1 and the gate G2 of the second transistor 20.
  • An element L2 having an inductance component and a resistor R2 are coupled to between the node N1 and the source S2 of the second transistor 20.
  • the drain D2 of the second transistor 20 is coupled to the output portion Out through an element L4 having an inductance component and a capacitor C5.
  • a node N2 is between the element L4 and the capacitor C5 and is coupled to the electrical power supply Vdd through an element L5 having an inductance component.
  • the electrical power supply Vdd is grounded through a capacitor C4.
  • the element L1 (a first inductor), the element L2 (a second inductor) and a gate capacitance Cgs of the second transistor 20 act as an L-C-L circuit shown in FIG. 3 .
  • a reflection gain with respect to the gate G1 of the first transistor 10 may be improved.
  • the resistance R2 controls a flow of a high frequency wave signal from the first transistor 10 to the ground through the path 25 and a capacitor C3.
  • the capacitors C3 and C4 ground the high frequency signal to the ground.
  • the elements L4 and L5 and the capacitor C5 act as a matching circuit, match the output portion Out to 50 ⁇ , and match impedance thereof so that a desirable wave of an extracted second harmonic wave and an extracted third harmonic wave is the largest.
  • the elements L1 through L5 having an inductance component may be an inductor of a lumped-parameter element.
  • a micro strip line may be used as a distributed constant element.
  • the resistor R2 is positioned at the source S2 side with respect to the element L2, when the micro strip line is used. This is because the element L2 and the resistor R2 act as a band-pass filter and efficiency is reduced when the element L2 and the resistor R2 are displaced to each other.
  • the first transistor 10 and the second transistor 20 do not oscillate according to an electrical potential difference between the source S1 and the drain D1 of the first transistor 10 and an electrical potential difference between the source S2 and the drain D2 of the second transistor 20 when the resonator 30 is not provided. Therefore, it is preferable that a gate width of the first transistor 10 is approximately as same as that of the second transistor 20.
  • FIG. 4 illustrates a calculated output electrical power Pout of the output portion Out in the electronic circuit 50 with respect to a frequency at the output portion Out in a case where a HEMT (High Electron Mobility Transistor) is used as the first transistor 10 and the second transistor 20.
  • the output electrical power Pout of a reference wave f0 at approximately 13 GHz to 17 Ghz is 10dBm
  • the output electrical power Pout of a second harmonic wave 2f0 and a third harmonic wave 3f0 is approximately 10 dBm.
  • Fig. 5 illustrates a calculated voltage waveform at the gate G1 and the drain D1 of the first transistor 10, and at the output portion Out of the electronic circuit 50.
  • the voltage at the gate G1 is approximately a sine-waveform voltage.
  • a nonlinear component of the voltage at the drain D1 of the first transistor 10 is enlarged.
  • a nonlinear component of the voltage at the output portion Out is enlarged.
  • the voltage at the output portion Out is approximately a rectangular wave.
  • FIG. 6 illustrates a calculated voltage of a MMIC in which the first transistor 10, the second transistor 20, the elements L1 through L5, the capacitors C1 through C4 and the resistors R1 and R2 are arranged on a same semiconductor substrate 60, the first transistor 10 and the second transistor 20 being made of an InGaAs/GaAs HEMT.
  • FIG. 6 illustrates the output electrical power Pout of a reference wave f0 of 13 GHz, the second harmonic wave 2f0 of 26 GHz and the third harmonic wave 3f0 of 39 GHz at the output portion Out in a case where a sine curve wave of 13 GHz is fed into the gate G1 of the first transistor 10 with an electrical power Pin.
  • the output of the second harmonic wave 2f0 and the third harmonic wave 3f0 are smaller than that of the reference wave f0, because the nonlinearity of the output of the first transistor 10 is small when the electrical power Pin is small.
  • the output electrical power Pout of the second harmonic wave 2f0 and the third harmonic wave 3f0 is approximately same as that of the reference wave f0.
  • the first transistor 10 and the second transistor 20 operate so as to enhance nonlinearity with each other, because the DC bias is applied in series to the first transistor 10 and the second transistor 20 through the path 25. Therefore, a higher harmonic component is generated effectively. And an amplifier is unnecessary and the circuit is downsized. A chip size is reduced when the electronic circuit 50 is an MMIC as illustrated in the first embodiment.
  • a second embodiment is a case where an npn-type bipolar transistor is used as a first transistor 10a and a second transistor 20a.
  • the source S1, the gate G1, and the drain D1 of the first embodiment are displaced to an emitter E1 (a second terminal), a base B1 (a control terminal), and a collector CC1 (a first terminal) of the first transistor 10a respectively.
  • the source S2, the gate G2, and the drain D2 of the first embodiment are displaced to an emitter E2 (a second terminal), a base B2 (a control terminal), and the collector CC2 (a first terminal) of the second transistor 20a respectively.
  • Other components are in common with the first embodiment.
  • the first transistor 10 and the second transistor 20 may be a field-effect transistor or a bipolar transistor.
  • the first terminal and the second terminal may be a terminal through which the DC bias is applied to the transistor.
  • the control terminal may be a terminal controlling a signal between the first terminal and the second terminal.
  • the present invention is effective when an output second harmonic wave and an output third harmonic wave have a frequency of more than 20 GHz.
  • the second harmonic wave and the third harmonic wave are a milliwave, it is difficult to manufacture a high-performance oscillator.
  • the present invention is effective in particular.

Claims (3)

  1. Elektronische Schaltvorrichtung (50; 60), umfassend:
    eine Negativwiderstandsschaltung (15), die
    einen ersten Transistor (10; 10a) mit einem Steueranschluss (G1; B1), der mit einem Resonator (30) verbunden ist, mit einem ersten Anschluss (D1, CC1) und mit einem zweiten Anschluss (S1, E1) und
    einen Negativwiderstandsgenerator (14) aufweist, der einen ersten Kondensator (C1), der zwischen dem zweiten Anschluss (S1, E1) des ersten Transistors (10;
    10a) und Masse geschaltet ist, und einen ersten Induktor (L) und einen ersten Widerstand (R1) umfasst,
    der zwischen dem zweiten Anschluss (S1, E1) des ersten Transistors (10; 10a) und Masse parallel zum ersten Kondensator (C1) geschaltet ist;
    einen zweiten Transistor (20; 20a), der einen Steueranschluss (G2; B2), der mit dem ersten Anschluss (D1; CC1) des ersten Transistors (10; 10a) verbunden ist, einen ersten Anschluss (D2; CC2), der mit einem Gleichstrom-Vorspannungsanschluss (N2) verbunden ist, und einen zweiten Anschluss (S2, E2) aufweist, der mit Masse durch einen weiteren Kondensator (C3) verbunden ist; und
    einen Pfad, der zwischen dem Gleichstrom-Vorspannungsanschluss (N2) und dem ersten Anschluss (D1; CC1) des ersten Transistors (10; 10a) über den zweiten Transistor (20; 20a) verbunden ist und eine Vorspannung am ersten Transistor (10; 10a) bereitstellt,
    wobei die elektronische Schaltvorrichtung (50; 60) des Weiteren umfasst:
    einen Knoten (N1), der zwischen dem ersten Anschluss (D1, CC1) des ersten Transistors (10, 10a), dem Steueranschluss (G2, B2) des zweiten Transistors (20, 20a) und dem zweiten Anschluss (S2, E2) des zweiten Transistors (20, 20a) geschaltet ist,
    einen zweiten Induktor (L1), der zwischen dem ersten Anschluss (D1; CC1) des ersten Transistors (10; 10a) und dem Knoten (N1) vorgesehen ist,
    einen dritten Induktor (L2), der zwischen dem Knoten (N1) und dem zweiten Anschluss (S2; E2) des zweiten Transistors (20; 20a) vorgesehen ist, und
    wobei ein zweiter Widerstand (R2) zwischen dem dritten Induktor (L2) und dem zweiten Anschluss (S2; E2) des zweiten Transistors (20; 20a) vorgesehen ist.
  2. Elektronische Schaltvorrichtung nach Anspruch 1, wobei der Negativwiderstandsgenerator (14) einen Gleichstrompfad (12) aufweist, an den ein Teil der durch den Gleichstrom-Vorspannungsanschluss (N2) angelegten Gleichstromvorspannung angelegt wird.
  3. Elektronische Schaltvorrichtung nach einem der vorhergehenden Ansprüche, wobei der erste Transistor (10; 10a) und der zweite Transistor (20; 20a) auf demselben Halbleitersubstrat angeordnet sind.
EP07113024.9A 2006-07-27 2007-07-24 Elektronische Schaltvorrichtung Active EP1885056B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006204964A JP4425886B2 (ja) 2006-07-27 2006-07-27 電子回路装置

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EP1885056A1 EP1885056A1 (de) 2008-02-06
EP1885056B1 true EP1885056B1 (de) 2017-12-20

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EP (1) EP1885056B1 (de)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10832861B2 (en) 2011-12-30 2020-11-10 Bedrock Automation Platforms Inc. Electromagnetic connector for an industrial control system

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Publication number Priority date Publication date Assignee Title
JP5471574B2 (ja) * 2010-02-19 2014-04-16 住友電気工業株式会社 電子回路
JP5479284B2 (ja) 2010-09-24 2014-04-23 住友電気工業株式会社 電子回路
JP5655526B2 (ja) * 2010-11-29 2015-01-21 住友電気工業株式会社 電子回路
JP5896718B2 (ja) * 2011-02-04 2016-03-30 日本電波工業株式会社 圧電発振器
RU2461952C1 (ru) * 2011-06-01 2012-09-20 Открытое акционерное общество "Концерн "Созвездие" Способ генерации высокочастотных сигналов и устройство для его реализации
RU2461953C1 (ru) * 2011-06-01 2012-09-20 Открытое акционерное общество "Концерн "Созвездие" Способ генерации высокочастотных сигналов и устройство для его реализации
JP5820176B2 (ja) * 2011-07-21 2015-11-24 住友電気工業株式会社 電子回路
JP6136165B2 (ja) 2012-09-28 2017-05-31 住友電気工業株式会社 電子回路
JP5553463B1 (ja) * 2014-03-13 2014-07-16 株式会社ソニック パルス圧縮超音波探知装置
RU2568390C1 (ru) * 2014-10-27 2015-11-20 Федеральное государственное казенное военное образовательное учреждение высшего профессионального образования "Военный учебно-научный центр Военно-воздушных сил "Военно-воздушная академия имени профессора Н.Е. Жуковского и Ю.А. Гагарина", (г. Воронеж) Министерства обороны Российской Федерации Способ генерации и частотной модуляции высокочастотных сигналов и устройство его реализации
JP2017184055A (ja) 2016-03-30 2017-10-05 住友電気工業株式会社 増幅回路

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JP3142220B2 (ja) * 1995-03-30 2001-03-07 シャープ株式会社 チューナ
JP2000156611A (ja) 1998-11-18 2000-06-06 Sharp Corp 周波数逓倍器
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Publication number Priority date Publication date Assignee Title
US10832861B2 (en) 2011-12-30 2020-11-10 Bedrock Automation Platforms Inc. Electromagnetic connector for an industrial control system

Also Published As

Publication number Publication date
US20080048764A1 (en) 2008-02-28
JP4425886B2 (ja) 2010-03-03
US7561001B2 (en) 2009-07-14
EP1885056A1 (de) 2008-02-06
JP2008035083A (ja) 2008-02-14

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