EP1759321A4 - Verfahren und vorrichtung zum entwurf von layouts integrierter schaltungen - Google Patents

Verfahren und vorrichtung zum entwurf von layouts integrierter schaltungen

Info

Publication number
EP1759321A4
EP1759321A4 EP05740549A EP05740549A EP1759321A4 EP 1759321 A4 EP1759321 A4 EP 1759321A4 EP 05740549 A EP05740549 A EP 05740549A EP 05740549 A EP05740549 A EP 05740549A EP 1759321 A4 EP1759321 A4 EP 1759321A4
Authority
EP
European Patent Office
Prior art keywords
integrated circuit
circuit layouts
designing integrated
designing
layouts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05740549A
Other languages
English (en)
French (fr)
Other versions
EP1759321A2 (de
Inventor
Louis K Scheffer
Steven Teig
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cadence Design Systems Inc
Original Assignee
Cadence Design Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/836,581 external-priority patent/US7082588B2/en
Priority claimed from US10/836,582 external-priority patent/US7254798B2/en
Application filed by Cadence Design Systems Inc filed Critical Cadence Design Systems Inc
Publication of EP1759321A2 publication Critical patent/EP1759321A2/de
Publication of EP1759321A4 publication Critical patent/EP1759321A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
EP05740549A 2004-05-01 2005-04-29 Verfahren und vorrichtung zum entwurf von layouts integrierter schaltungen Withdrawn EP1759321A4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/836,581 US7082588B2 (en) 2004-05-01 2004-05-01 Method and apparatus for designing integrated circuit layouts
US10/836,582 US7254798B2 (en) 2004-05-01 2004-05-01 Method and apparatus for designing integrated circuit layouts
PCT/US2005/015024 WO2005109257A2 (en) 2004-05-01 2005-04-29 Method and apparatus for designing integrated circuit layouts

Publications (2)

Publication Number Publication Date
EP1759321A2 EP1759321A2 (de) 2007-03-07
EP1759321A4 true EP1759321A4 (de) 2009-10-28

Family

ID=35320879

Family Applications (2)

Application Number Title Priority Date Filing Date
EP05740554A Withdrawn EP1759322A4 (de) 2004-05-01 2005-04-29 Verfahren und vorrichtungen zum entwerfen von layouts integrierter schaltungen
EP05740549A Withdrawn EP1759321A4 (de) 2004-05-01 2005-04-29 Verfahren und vorrichtung zum entwurf von layouts integrierter schaltungen

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP05740554A Withdrawn EP1759322A4 (de) 2004-05-01 2005-04-29 Verfahren und vorrichtungen zum entwerfen von layouts integrierter schaltungen

Country Status (3)

Country Link
EP (2) EP1759322A4 (de)
JP (2) JP2007535715A (de)
WO (2) WO2005109256A2 (de)

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JP2591719Y2 (ja) 1993-07-22 1999-03-10 東洋テルミー株式会社 厨芥類の処理容器
JP2596995Y2 (ja) 1993-08-25 1999-06-28 東洋テルミー株式会社 厨芥類の処理容器
US7011600B2 (en) 2003-02-28 2006-03-14 Fallbrook Technologies Inc. Continuously variable transmission
US7448012B1 (en) 2004-04-21 2008-11-04 Qi-De Qian Methods and system for improving integrated circuit layout
JP2007535715A (ja) * 2004-05-01 2007-12-06 ケイデンス デザイン システムズ インコーポレイテッド 集積回路レイアウトを設計する方法及び機器
EP1815165B1 (de) 2004-10-05 2012-03-21 Fallbrook Technologies Inc. Stufenlos verstellbares getriebe
KR101641317B1 (ko) 2005-10-28 2016-07-20 폴브룩 인텔렉츄얼 프로퍼티 컴퍼니 엘엘씨 전동 드라이브
EP1954959B1 (de) 2005-11-22 2013-05-15 Fallbrook Intellectual Property Company LLC Stufenlos verstellbares getriebe
CA2858525C (en) 2005-12-09 2016-07-26 Fallbrook Intellectual Property Company Llc Continuously variable transmission
EP1811202A1 (de) 2005-12-30 2007-07-25 Fallbrook Technologies, Inc. Stufenloses Getriebe
US8480529B2 (en) 2006-06-26 2013-07-09 Fallbrook Intellectual Property Company Llc Continuously variable transmission
WO2008057507A1 (en) 2006-11-08 2008-05-15 Fallbrook Technologies Inc. Clamping force generator
EP2125469A2 (de) 2007-02-01 2009-12-02 Fallbrook Technologies Inc. System und verfahren zur getriebe- und/oder antriebsmotorsteuerung
CN101657653B (zh) 2007-02-12 2014-07-16 福博科知识产权有限责任公司 一种传动装置
CN101688609B (zh) 2007-02-16 2013-09-04 福博科技术公司 无限变速式无级变速器、无级变速器及其方法、组件、子组件和部件
US8393989B2 (en) 2007-04-24 2013-03-12 Fallbrook Intellectual Property Company Llc Electric traction drives
US8641577B2 (en) 2007-06-11 2014-02-04 Fallbrook Intellectual Property Company Llc Continuously variable transmission
CN101796327B (zh) 2007-07-05 2014-01-29 福博科技术公司 无级变速器
WO2009065055A2 (en) 2007-11-16 2009-05-22 Fallbrook Technologies Inc. Controller for variable transmission
JP5783723B2 (ja) 2007-12-21 2015-09-24 フォールブルック インテレクチュアル プロパティー カンパニー エルエルシー 自動変速機及びその方法
US7861196B2 (en) 2008-01-31 2010-12-28 Cadence Design Systems, Inc. System and method for multi-exposure pattern decomposition
WO2009111328A1 (en) 2008-02-29 2009-09-11 Fallbrook Technologies Inc. Continuously and/or infinitely variable transmissions and methods therefor
US8317651B2 (en) 2008-05-07 2012-11-27 Fallbrook Intellectual Property Company Llc Assemblies and methods for clamping force generation
CN102112778B (zh) 2008-06-06 2013-10-16 福博科技术公司 无限式无级变速器，无级变速器，用于其的方法、组件、子组件及部件
US8398518B2 (en) 2008-06-23 2013-03-19 Fallbrook Intellectual Property Company Llc Continuously variable transmission
CA2732668C (en) 2008-08-05 2017-11-14 Fallbrook Technologies Inc. Methods for control of transmission and prime mover
US8069423B2 (en) 2008-08-11 2011-11-29 Cadence Design Systems, Inc. System and method for model based multi-patterning optimization
US8469856B2 (en) 2008-08-26 2013-06-25 Fallbrook Intellectual Property Company Llc Continuously variable transmission
US8167759B2 (en) 2008-10-14 2012-05-01 Fallbrook Technologies Inc. Continuously variable transmission
US8209656B1 (en) 2008-10-14 2012-06-26 Cadence Design Systems, Inc. Pattern decomposition method
KR101911672B1 (ko) 2009-04-16 2018-10-24 폴브룩 인텔렉츄얼 프로퍼티 컴퍼니 엘엘씨 무단 변속기를 위한 고정자 조립체 및 시프팅 장치
US8512195B2 (en) 2010-03-03 2013-08-20 Fallbrook Intellectual Property Company Llc Infinitely variable transmissions, continuously variable transmissions, methods, assemblies, subassemblies, and components therefor
US8888643B2 (en) 2010-11-10 2014-11-18 Fallbrook Intellectual Property Company Llc Continuously variable transmission
AU2012240435B2 (en) 2011-04-04 2016-04-28 Fallbrook Intellectual Property Company Llc Auxiliary power unit having a continuously variable transmission
US8386974B2 (en) 2011-04-14 2013-02-26 Synopsys, Inc. Accelerating coverage convergence using symbolic properties
US8443316B1 (en) 2011-11-09 2013-05-14 Synopsys, Inc. Accelerating coverage convergence and debug using symbolic properties and local multi-path analysis
US10047861B2 (en) 2016-01-15 2018-08-14 Fallbrook Intellectual Property Company Llc Systems and methods for controlling rollback in continuously variable transmissions
US10023266B2 (en) 2016-05-11 2018-07-17 Fallbrook Intellectual Property Company Llc Systems and methods for automatic configuration and automatic calibration of continuously variable transmissions and bicycles having continuously variable transmissions
US11215268B2 (en) 2018-11-06 2022-01-04 Fallbrook Intellectual Property Company Llc Continuously variable transmissions, synchronous shifting, twin countershafts and methods for control of same
WO2020176392A1 (en) 2019-02-26 2020-09-03 Fallbrook Intellectual Property Company Llc Reversible variable drives and systems and methods for control in forward and reverse directions
US11501052B1 (en) * 2021-05-27 2022-11-15 Taiwan Semiconductor Manufacturing Company, Ltd Conductor scheme selection and track planning for mixed-diagonal-Manhattan routing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030229412A1 (en) * 2002-06-07 2003-12-11 David White Electronic design for integrated circuits based on process related variations
US20040058255A1 (en) * 2002-09-24 2004-03-25 Scott Jessen Substrate topography compensation at mask design: 3D OPC topography anchored

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JPH0844038A (ja) * 1994-08-03 1996-02-16 Matsushita Electron Corp マスターマスク作成装置及び半導体装置の製造方法
US5587923A (en) * 1994-09-07 1996-12-24 Lsi Logic Corporation Method for estimating routability and congestion in a cell placement for integrated circuit chip
US5723233A (en) * 1996-02-27 1998-03-03 Lsi Logic Corporation Optical proximity correction method and apparatus
JP2950280B2 (ja) * 1997-03-31 1999-09-20 日本電気株式会社 電子線の描画方法
JP3241010B2 (ja) * 1998-11-18 2001-12-25 日本電気株式会社 半導体製造プロセスの光近接効果補正方法
JP2002148779A (ja) * 2000-11-07 2002-05-22 Toshiba Corp マスクパターン補正方法、フォトマスク及びマスクパターン補正方法プログラムを格納したコンピュータ読み取り可能な記録媒体
US6574782B1 (en) * 2000-11-15 2003-06-03 International Business Machines Corporation Decoupled capacitance calculator for orthogonal wiring patterns
US6578190B2 (en) * 2001-01-11 2003-06-10 International Business Machines Corporation Process window based optical proximity correction of lithographic images
JP4187947B2 (ja) * 2001-04-26 2008-11-26 株式会社東芝 パターン補正方法、パターン補正装置、およびパターン補正プログラムを記録した記録媒体
JP3609810B2 (ja) * 2002-09-18 2005-01-12 株式会社東芝 マスクパターン作成方法及び半導体装置の製造方法
JP4592240B2 (ja) * 2001-09-29 2010-12-01 株式会社東芝 マスクパターン作成方法及び半導体装置の製造方法
JP3686367B2 (ja) * 2001-11-15 2005-08-24 株式会社ルネサステクノロジ パターン形成方法および半導体装置の製造方法
JP3615182B2 (ja) * 2001-11-26 2005-01-26 株式会社東芝 光近接効果補正方法及び光近接効果補正システム
JP2004037827A (ja) * 2002-07-03 2004-02-05 Sony Corp 設計パターンの検証方法および設計パターンの補正方法
JP2004046880A (ja) * 2003-07-18 2004-02-12 Matsushita Electric Ind Co Ltd 回路パラメータ抽出装置
JP2007535715A (ja) * 2004-05-01 2007-12-06 ケイデンス デザイン システムズ インコーポレイテッド 集積回路レイアウトを設計する方法及び機器

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030229412A1 (en) * 2002-06-07 2003-12-11 David White Electronic design for integrated circuits based on process related variations
US20040058255A1 (en) * 2002-09-24 2004-03-25 Scott Jessen Substrate topography compensation at mask design: 3D OPC topography anchored

Also Published As

Publication number Publication date
JP5147391B2 (ja) 2013-02-20
JP2007538272A (ja) 2007-12-27
WO2005109256A3 (en) 2006-05-04
JP2007535715A (ja) 2007-12-06
EP1759322A2 (de) 2007-03-07
EP1759321A2 (de) 2007-03-07
EP1759322A4 (de) 2008-03-12
WO2005109257A3 (en) 2005-12-15
WO2005109257A2 (en) 2005-11-17
WO2005109256A2 (en) 2005-11-17

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