Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
  • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
  • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
  • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
  • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
  • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
  • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Definitions

• the present invention relates to an embodiment of a structure intended for electronics, optics or optoelectronics comprising a buried layer, the embodiment of the structure comprising a chemical treatment employing chemical species capable of etching the buried layer.
• a chemical treatment employing chemical species capable of etching the buried layer.
• the buried SiO 2 layer may be etched by the HF solution.
• a defect of about 100 nanometers or more in such a silicon layer can give access to the buried oxide, which can lead, under the action of chemical species, to the formation of holes in the oxide layer.
• holes in the oxide layer several microns or even tens of microns in diameter, these holes also being called “decorations” (see for example Figure 2).
• Defects in the working layer, also called HF faults can therefore have a dramatic effect on the quality of the buried layer and on the entire structure, this is why those skilled in the art define these HF faults as "killer" faults.
• the present invention offers another solution to the problem posed by the chemical attack on buried layers by proposing, according to a first aspect, a process for producing a structure with several layers intended for electronics, optics or optoelectronics comprising a buried layer, the method comprising the following steps: a. forming layers of the structure, including forming the buried layer; b. chemical treatment of the structure using chemical species capable of substantially etching the material constituting the buried layer; characterized in that step a) comprises the formation, on the buried layer, of a protective layer, also buried, in a material chosen to sufficiently resist the chemical attack by chemical species of the treatment implemented during step b), thus condemning possible accesses to the buried layer through which these species could infiltrate.
• - step a) comprises bonding two plates;
• Step a) comprises, before bonding, the formation of the layer to be buried and of the protective layer on the surface of at least one bonding surface of a wafer;
• Step a) comprises, before bonding, the formation of the layer to be buried on the bonding surface of one of the two plates and the formation of the protective layer on the bonding surface of the other plate;
• - step a) comprises, after bonding, a reduction of one of the two plates by means of one of the following techniques: Smart-Cut®, detachment at the level of a porous layer buried in the plate to be reduced, chemical attack selective layer, lapping, polishing, CMP, chemical etching, abrasion; so that there remains only a thin layer of the reduced wafer above the protective layer;
• the structure formed according to step a) is a semiconductor-on-insulator structure, the buried layer being at least part of the insulating thickness of this structure; - the protective
• the invention proposes an application of said method to the production of a removable structure.
• the invention proposes an application of said method to the production of a semiconductor-on-insulator structure.
• Presentation of the figures Figure 1 represents a set of two plates glued together showing a step in a process for forming an SOI structure.
• FIG. 2 represents an SOI structure in accordance with the state of the art.
• FIG. 3 represents an SOI structure according to the invention.
• Figure 4 shows a removable substrate.
• FIG. 5 represents a removable substrate according to the state of the art.
• FIG. 6 represents a substrate according to the invention
• FIG. 7 represents an SOI structure which can be dismantled according to the state of the art.
• FIG. 1 represents a set of two plates glued together showing a step in a process for forming an SOI structure.
• FIG. 2 represents an SOI structure in accordance with the state of the art.
• FIG. 3 represents an SOI structure according to the invention.
• Figure 4 shows a removable substrate.
• FIG. 8 represents a removable SOI structure in accordance with the invention.
• FIG. 9 represents a set of two plates bonded during a step of producing a determined structure, one of the two plates being a removable substrate.
• the main objective of the present invention is to reduce the number and size of etching defects of a layer buried in a given structure, when the latter undergoes chemical treatments capable of etching the material of the buried layer. When a buried layer is etched, the etching takes place locally and extends over delimited areas associated with features of surrounding structures, which can constitute access routes of chemical etching species to the buried layer.
• etching (i) of the buried layer is mainly the consequence of: i) a presence of faults nearby, especially when the buried layer is underlying a thin layer; ii) a significant action of the etching solution on the structure by: - long exposure; - a large dosage of chemical species capable of etching the material of the buried layer.
• the first cause of etching (i) of the buried layer it is mainly found in the case where a particularly thin layer has one of its surfaces in contact with the buried layer and the other of its surfaces in contact with outside. Indeed, the slightest defect present in such a thin layer, which can be a few tens of nanometers, can represent an access route of the etching species to the buried layer.
• defects can be of different natures: They can be for example defects crossing the thin layer, thus providing direct access to the buried layer. These through defects can have several origins, in particular related to the process for producing the thin layer and to the quality of the material constituting it. We know for example that an epitaxial layer contains few defects of this type and therefore presents less risk of damaging the buried layer which is underlying it during chemical etching treatment.
• techniques for producing layer structures in other cases require carrying out layers of a donor substrate on a target substrate. This is particularly the case for the manufacturing processes of SeOI structures (acronym for "Semiconductor On Insulator"), the thin layer of semiconductor material cannot be produced on the insulating layer by epitaxy.
• a technique for transferring layers from a donor substrate 6 to a receiver substrate 1 usually comprises two main steps: - bonding of the two substrates 1 and 6 at a bonding interface 5; a reduction of the donor substrate 6 in order to finally obtain a structure comprising the receptor substrate 1 and a thin layer which is the remaining part of the donor substrate 6; Bonding can be achieved by molecular adhesion.
• Particularly efficient surface preparations for improving the bonding energy between the substrates 1 and 6 can be implemented such as for example exposure of the surfaces to be bonded to a plasma (for example of oxygen), cleaning, brushing .
• the reduction of the donor substrate 6 can be carried out by progressive elimination of the donor substrate by polishing and / or chemical etching by the rear face (more known to a person skilled in the art under the name of the "etch-back" technical process); or by detaching the thin layer 4 from the donor substrate 6 at a previously weakened zone 15 by providing thermal and or mechanical energy; this weakening zone 15 is advantageously produced by controlled implantation of atomic and / or molecular species at its level (this is called Smart-Cut techniques) or by porosification of a layer at its level. These wafer production techniques can cause in the thin layer produced 4 the appearance of defects, such as through defects.
• a particle removed from the surface of the donor wafer 6 during polishing may for example deteriorate in thickness by abrasion the thin layer 4 formed.
• a chemical etching during an etch-back process could for example unevenly etch the surface of the donor wafer 6 so as to expose in certain places the layer buried under the thin layer 4.
• the layer 4 formed on a porous layer of embrittlement 15 may present point defects accentuated by the subsequent treatment for removing the porous layer after detachment.
• the finishing techniques of the thin layer 4 obtained after reduction of the donor wafer 6, advantageously implemented, can also be the cause of the appearance of through defects. Examples include the following finishing techniques: polishing, chemical etching, abrasion, bombardment of atomic species, sacrificial oxidation.
• a SeOI structure 10 is presented in accordance with the state of the art, that is to say consisting of a support substrate 1, an insulating buried layer 2 and a thin layer in semiconductor material 4.
• This SeOI structure is for example produced according to an embodiment described above with reference to FIG. 1, the bonding interface 5 being located within or on the surface of the buried layer 2.
• the presence of defects 16 and 16 ′ in the thin layer 4 will allow the chemical species to reach the buried layer 2 at the interface of the layers 2 and 4 and to locally etch the buried layer and thus form cavities 17 and 17 'respectively, also called decorations 17 and 17'.
• This type of thin layers 4 being intended mainly to receive components, and the insulating buried layer 2 to impart certain properties to these future components, the presence of these decorations 17 and 17 ′ can be detrimental to the quality of these future components.
• Such problems can arise for example in a SeOI structure for which the insulating buried layer 2 is made of SiO 2 and the chemical treatment which it undergoes uses a chemical solution comprising hydrofluoric acid HF.
• HF chemical treatments are commonly used in the field of semiconductors, especially in the case where it is desired to make a final deoxidation of the surfaces of the structure obtained after, for example, the implementation of oxidative heat treatments.
• Exposure of this structure having 10 defects 16 and 16 'to a hydrofluoric acid etch then causes the buried SiO 2 2 decorations 17 and 17'. Due to the HF's ability to propagate along an unstabilized interface, such as the interface between layer 2 and layer 4 at defect 16, decorations 17 and 17 'can reach sizes much greater than the size of the faults 16 and 16 'which initiated their respective formations.
• HF chemical treatment can create defects in the buried Si0 2 layer 2 of several microns, or even ten microns in diameter way. This is why, these defects called “HF” are classified by the skilled person in the family of "killer” defects, because they can irreversibly destroy a significant part of a SeOI 10 structure.
• a means is proposed according to the invention for protecting the buried layer 2 from an etching chemical treatment. For this purpose, a layer or covering is placed between the buried layer 2 and the thin layer 4.
• This protective layer 3 is made of a material which is little or not etched by the chemical species used during the chemical treatment undergone by the structure 10, and in particular by chemical species capable of etching the buried layer 2.
• This protective layer 3 can be produced according to said techniques for producing the above-mentioned thin layers or according to other techniques. It can for example be carried out by epitaxy if it consists of a crystalline material or by depositing atomic species on a surface.
• the primary function of this protective layer 3 is the protection of the buried layer 2 against chemical attack. The material constituting it and its thickness are therefore chosen above all so that it has significant resistance to the etching of chemical species.
• the protective layer 3 must therefore also have a thickness greater than a minimum thickness below which it may present risks of being too thickly etched.
• the structure 10 is produced according to one of the techniques previously described with reference to FIG. 1 by means of one of the collages which were listed there.
• the layer to be buried 2 and / or the protective layer 3 are then formed before bonding. In a first configuration, they are already included in the plates to be bonded, for example during prior epitaxies. In a second configuration, they are advantageously formed on the bonding surfaces of the plates to be bonded.
• the layer to be buried 2 is formed on the surface of the first wafer to be bonded, and the protective layer 3 is formed on the surface of the second wafer to be bonded.
• the thin layer 4 is identical to that of Figure 2, and similarly has the defects 16 and 16 '. But unlike what has already been discussed above with reference to FIG. 2, the protective layer 3 being not or only slightly attacked by the chemical species etching the buried layer 2, and the infiltration of the chemical species by the thin layer at the level of the defects 16 and 16 ', the latter do not reach the buried layer 2. The protective layer 3 thus very significantly reduces or even prevents the buried layer 2 from coming into contact with the infiltrated chemical species . This result is obtained without trying to improve the quality of the thin layer 4 (which has as many defects 16 and 16 '), unlike the techniques used in the prior art.
• this result is obtained without modifying either the chemical composition of the treatments which the structure 10 undergoes, unlike the state of the art.
• this is a SeOI structure, for which the buried layer 2 and possibly the protective layer 3 are made of electrically insulating material, and therefore constitute the insulating thickness of the SeOI structure.
• the production of such a SeOI structure is advantageously carried out according to one of the techniques described above with reference to FIG. 1.
• the bonding 5 was preferably implemented between the donor substrate 6 and the receiver substrate 1 covered respectively with the layer of protection 3 and of the buried layer 2.
• the protective layer 3 in addition to being made of a material little or not etched by the chemical species of etching the layer buried 2, must have bonding performance substantially identical to the buried layer 2 so that they can adhere together, such as bonding energies, creep properties and / or coefficients of thermal expansion, substantially similar.
• the insulating layer 2 of which is a layer of SiO 2 a SeOI structure 10 according to the invention further comprises between the thin layer 4 and the layer insulating 2, a protective layer 3 which may be of semiconductor material or of electrically insulating material.
• the material of the protective layer 3 is made of electrically insulating material, and constitutes, with the buried SiO 2 layer, the insulating thickness of the SeOI structure 10.
• This protective layer 3 of insulating material can preferably be according to the invention of S. 3 N 4 , of SiON, or of diamond.
• this protective layer 3 is made of Si 3 N 4 , this material having bonding properties roughly equivalent to the bonding properties of Si0 2 in terms of bonding energy and quality of transfer in particular in the case of the implementation of a Smart Cut process, with reference for example to the document entitled "From SOI to SOIM Technology: application for specifies semi conductor processes" by O. Rayssac et al.
• a nitride for the protective layer 3 lies in its high resistance to chemical treatments, such as hydrofluoric acid treatments.
• This silicon nitride can be obtained for example by nitriding or by depositing a layer of nitride by CVD on the surface of the donor substrate 6.
• the layer to be buried 2 was then advantageously obtained by oxidation of the surface of the receiver substrate 1.
• a structure 10 is described below for which a long exposure to etching chemical species and / or a large dosage of these etching chemical species, leads to the etching of the buried layer 2.
• This structure 10 is a removable structure as defined in particular in document FR 2823599.
• a removable structure consists of two plates glued together, it is made removable by the checking that these two wafers can be bonded, and in particular the bonding energy.
• These demountable structures are mainly used to serve as temporary substrates for growth and / or the manufacture of layers or components before these layers and / or components are transferred to receptor substrates.
• a removable structure 10 consists of a support substrate 1 linked in a controlled manner to a transfer structure 6 via a weakened area 20.
• This weakened zone 20 can be created in particular by roughening the surface of the removable substrate 1 and optionally the transfer structure 6, before bonding the support substrate 1 and the transfer structure 6, by chemical treatment, as described in particular in document FR 2 823 599.
• the embrittlement at the level of zone 20 depends mainly on the chemical budget (identifying the third dosage of chemical species / time / temperature) used, this determining the embrittlement obtained in the end or, which amounts to the same thing, the loss of bonding energy at the level of the weakened zone 20.
• the loss of bonding energy at the level of the zone 20 is linked to the surface roughness which reduces the bonds of contact between the removable substrate 1 and the transfer structure 6. By playing on the roughness, it is thus possible to control the bonding energy of the removable substrate 1.
• the bonding energy is of the order of 500 mJ / m 2 instead of about 2 J / m 2 usually met ies for a SiO 2 / Si ⁇ 2 collage that has not undergone roughness, this result being taken from the article entitled “Proceedings of the 2nd International Conference on Materials for Microelectronics” (IOM communication page 183, 1998) by Olivier Rayssac and Coll.
• the transfer structure 6 is bonded to the support substrate 1 by one of the techniques described above to obtain the removable structure 10. Treatments can then optionally be carried out in the transfer structure 6, for example making all or part of the components.
• this transfer structure 6 is detached from the support substrate 1 at the weakened zone 20 by applying in particular mechanical constraints, such as an insertion of a blade at the level of the zone 20 or use of detachment forceps or a jet of gas or liquid flow.
• mechanical constraints such as an insertion of a blade at the level of the zone 20 or use of detachment forceps or a jet of gas or liquid flow.
• This removable structure 10 consists of a support substrate 1 comprising on the surface a layer 2, and a transfer structure 6 comprising on the surface a layer 2 ′, the weakened zone 20 being at the interface of layers 2 and 2 ′, produced according to one or the other of the two techniques previously described with reference to FIG. 4.
• the layers 2 and 2 ′ are formed of the same material.
• the entire removable structure 10 then undergoes, during or at the end of the production process (of components for example), a chemical treatment comprising chemical species capable of etching the layers 2 and 2 '.
• the chemical action of these species is made particularly important by using at least one of the following two methods: - long exposure of the removable structure 10 to chemical species, - a particularly important dosage of chemical species.
• the action of the chemical treatment then has the effect of laterally digging the layers 2 and 2 ′, at the level of the outcrop that they present on the edge of the removable structure 10.
• the recesses 18 and 18 ′ thus formed will accentuate the weakness of the weakened zone 20 but will above all play a role of initiator for detachment at the level of the zone 20 when the mechanical forces are applied.
• This chemical preparation for detachment is particularly effective in overcoming said problems of detachment of platelets.
• delamination problems at the edge that is to say problems of detachment of materials belonging to the transfer structure 6 and / or to the support substrate 1 can then be detrimental to the electronic or optoelectronic components that it is desired to obtain in the end.
• delamination zones are visible at 19, 19 ', 19 "and 19'".
• the layers 2 and 2 ' are then layers of Si ⁇ 2 , for oxidations taking place on silicon.
• the dismountable structure 10 is then subjected to an HF treatment whose hydrofluoric acid dosage is found to be around 50%, and therefore particularly high in concentration , which has the effect of laterally etching the layers to be bonded 2 and 2 'of SiO 2.
• the delamination zones 19, 19 ', 19 "and 19'” are then delaminations of silicon from the transfer substrate 6 and the support substrate 1.
• FIG. 6 a solution to the problem mentioned above is found thanks to a structure and to a method according to the invention
• the removable structure 10 is constituted in the same way as the removable structure 10 previously. ment detailed with reference to FIG. 5, with the exception that layer 2 ′ is replaced by a protective layer 3 made of material substantially different from the material of layer 2.
• the material of protective layer 3 is chosen from so that the chemical species brought in during the chemical treatment and capable of etching the buried layer 2 cannot etch it.
• the material of protective layer 3 is chosen from so that the chemical species brought in during the chemical treatment and capable of etching the buried layer 2 cannot etch it.
• the example illustrated in the figure 6 includes, instead of the layer 2 ′ in SiO 2, a layer in SÎ 3 N 4 .
• This removable structure 10 is advantageously obtained by bonding between the support substrate 1 previously oxidized at its silicon surface to give the oxide layer 2, and the transfer structure 6 previously covered with a deposit of Si 3 N 4 (for example by PECVD or LPCVD) at its silicon surface to give the nitride layer 3.
• the weakened zone 20 is obtained by roughening of the oxide layer 2 before bonding, by HF etching .
• the weakened zone 20 is obtained by roughening the nitride layer 3 before bonding, for example by etching with H 3 PO 4 at 140 ° C, by dry etching using ballistic means and / or chemicals such as a GIR (abbreviation of “Reactive Ionic Etching” or
• the weakened zone 20 is obtained by roughening the layer 2 of SiO 2 and the layer 3 of SÎ 3 N 4 .
• FIGS. 7, 8 and 9 the case of a chemical treatment on removable SeOI structures 10 is discussed, comprising a support substrate 1 adjacent to the insulating thickness in which the weakened zone 20 has been created, thus separating the insulating thickness consisting of two layers 2 and 2 ', and finally the thin layer 4 of the SeOI structure.
• a particularly thin and defective layer can allow chemical species of a chemical treatment to penetrate via its defects, and allow them to etch the insulating thickness buried 2 and 2 '.
• FIG. 7 the case of a chemical treatment on removable SeOI structures 10 is discussed, comprising a support substrate 1 adjacent to the insulating thickness in which the weakened zone 20 has been created, thus separating the insulating thickness consisting of two layers 2 and 2 ', and finally the thin layer 4 of the SeOI structure.
• a particularly thin and defective layer can allow chemical species of a chemical treatment to
• the decorations are in the case of a removable SeOI larger in size than in the case of a non-removable SeOI, because the weakened area 20 has hollow parts (originating from the interfacial roughness obtained during embrittlement by surface roughness) into which the etching chemical species will introduce themselves and attack the walls of these hollow parts.
• etching by chemical species can lead to typical decorations of 10 to 100 times greater than in the case of a non-removable SeOI.
• a solution proposed by the invention is to insert into the structure 10 a coating or a protective layer 3, the material of which it is made is little or not etched by chemical species capable of etching the layer. buried 2.
• This protective layer 3 isolates the buried layer from the defect 16 and therefore substantially prevents the etching of the buried layer "from the inside".
• the annular recess 18 ′ due to the reduction in the intermediate thickness between the thin layer 4 and the removable substrate 1, is less important in size than that with reference to FIG. 7, the delamination at the edge of the removable substrate then being little or no existing, that of the thin layer 4 being substantially zero, and the annular recess nevertheless retaining the property of initiating detachment at the weakened zone 20 during a subsequent application of detachment mechanical forces.
• An application of such a removable SeOI structure consists in implementing embodiments of electronic or optoelectronic components in the thin layer 4.
• This structure 10 may be particularly advantageous in the case where these embodiments of component layers are carried out at high temperatures. for which few substrates resist.
• a final structure is thus obtained containing a thin layer 4 present on a transfer structure 6.
• the substrates 1 and 6 discussed in this document, and in particular with reference to FIGS. 1 to 9, can be made of Silicon, Germanium, SiGe, alloy IV-IV, alloy III-V, alloy II-VI, sapphire, SiC or any other material which can be used by the present invention.
• the thin layers 4 discussed in this document and in particular with reference to FIGS. 1 to 3 and 7 to 9, can be made of Si, Ge, SiGe, III-V alloy, II-VI alloy, SiC or others materials.
• the buried layers 2 are advantageously made of SiO 2 but can also be made of another type of insulator or of another type of material which can be etched substantially by chemical species used during the chemical treatment of structures 10.
• the buried protective layer 3 is advantageously made of SÎ3N in the particular case where the buried layer 2 is made of Si0 2 , but it can also be made of SiON, diamond or other types of material capable of being little or not etched by the chemical species used during the treatment of the structure 10 and capable of etching the buried layer 2. This invention does not apply only to an embodiment of a SeOI structure, but to any other embodiment of structures for electronics, optics or opto-electronics .

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