EP1562088A2 - Procédé pour obtenir des informations de temps, circuit récepteur et montre controlée par radio - Google Patents

Procédé pour obtenir des informations de temps, circuit récepteur et montre controlée par radio Download PDF

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Publication number
EP1562088A2
EP1562088A2 EP05002094A EP05002094A EP1562088A2 EP 1562088 A2 EP1562088 A2 EP 1562088A2 EP 05002094 A EP05002094 A EP 05002094A EP 05002094 A EP05002094 A EP 05002094A EP 1562088 A2 EP1562088 A2 EP 1562088A2
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EP
European Patent Office
Prior art keywords
time
time signal
signal
data bit
duration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05002094A
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German (de)
English (en)
Inventor
Horst Dipl.-Ing. Häfner
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Atmel Germany GmbH
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Atmel Germany GmbH
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Publication date
Application filed by Atmel Germany GmbH filed Critical Atmel Germany GmbH
Publication of EP1562088A2 publication Critical patent/EP1562088A2/fr
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04R—RADIO-CONTROLLED TIME-PIECES
    • G04R20/00—Setting the time according to the time information carried or implied by the radio signal
    • G04R20/08—Setting the time according to the time information carried or implied by the radio signal the radio signal being broadcast from a long-wave call sign, e.g. DCF77, JJY40, JJY60, MSF60 or WWVB
    • G04R20/12—Decoding time data; Circuits therefor
    • G—PHYSICS
    • G04—HOROLOGY
    • G04R—RADIO-CONTROLLED TIME-PIECES
    • G04R20/00—Setting the time according to the time information carried or implied by the radio signal
    • G04R20/08—Setting the time according to the time information carried or implied by the radio signal the radio signal being broadcast from a long-wave call sign, e.g. DCF77, JJY40, JJY60, MSF60 or WWVB
    • G04R20/10—Tuning or receiving; Circuits therefor

Definitions

  • the invention relates to a method for obtaining time information from received, amplitude-modulated time signal signals.
  • the invention further relates to a radio clock or a receiver circuit for a radio clock, in particular to carry out this process.
  • time signal transmitter - The radio-controlled transmission of time information takes place by means of so-called time signal signals from the corresponding Transmitters - hereafter referred to as the time signal transmitter - be sent out.
  • time signal transmitter - Under a time signal is to a transmitter short duration signal to understand the task is the time reference provided by a transmitter transferred to. It is a modulation oscillation usually with several timestamps that demodulates merely represent a pulse representing the transmitted time reference reproduced with a certain uncertainty.
  • the German long-wave transmitting station DCF-77 sends controlled by atomic clocks in continuous operation Amplitude-modulated long-wave time signals according to the official atomic time scale CET with a power of 50 KW on the frequency 77.5 KHz.
  • the time information on a longwave frequency in the range between 40 to 120 Send out KHz. All countries mentioned use for the transfer the time information in each case a minute telegram, the exactly one minute long.
  • FIG. 1 shows the coding scheme designated by reference symbol A.
  • (Telegram) of the coded time information in the case of German time signal transmitter DCF-77.
  • the coding scheme in this case consists of 59 bits, each with 1 bit one Second of the time frame. In the course of a minute can thus transmit a so-called time signal telegram in binary coded form, in particular one Information about time and date contains.
  • the first 15 bits B contain a general encoding, for example, operating information contain.
  • the next 5 bits C are included General information.
  • R denotes the antenna bit
  • A1 denotes an announcement bit for the transition of Central European Time (CET) for Central European Summer Time (CEST) and back
  • Z1, Z2 designate zone time bits
  • A2 denotes an announcement bit for a leap second
  • S denotes a start bit of the encoded time information.
  • the bits are included in the area D information about the minute, in the area E information over the hour, in the area F information about the calendar day, in the area G information about the day of Week, H area Information about the month and area I Information about the calendar year. This information are bit by bit in coded form.
  • the transmission of the time signal information is amplitude-modulated by means of single second marks.
  • the modulation consists of a reduction X1, X2 (or an increase) the carrier signal X at the beginning of every second, at the beginning every second - with the exception of the fifty-ninth second every minute - in the case of one sent by the DCF-77 transmitter Timing signal the carrier amplitude for the duration of 0.1 Seconds X1 or for about 0.2 seconds X2 to about 25% of the amplitude is lowered.
  • These subsidence X1, X2 different durations define each second mark or in decoded form data bits.
  • the general background of radio clocks and receiver circuits to receive timing signals is on the DE 198 08 431 A1, DE 43 19 946 A1, DE 43 04 321 C2, the DE 42 37 112 A1 and DE 42 33 126 A1 referenced.
  • Regarding the information acquisition and processing of time information from time signal is to DE 195 14 031 C2, DE 37 33 965 C2 and EP 042 913 B1.
  • time signal receivers for radio clocks are received from a time signal transmitter radiated, amplitude modulated time signal.
  • the received time signal is demodulated and in shape pulses of different lengths - the so-called second impulses or second marks - issued. This happens in Real time, that is per second and thus per time frame of the Timing telegram becomes dependent on the coded information generates a different second pulses (see Figure 2) and provided at the output of the receiver.
  • the demodulated time signal is from the time signal transmitter supplied to a downstream microcontroller, the time information contained in the time signal decoded by evaluating the second pulses. there Every second pulse is assigned a data bit.
  • the microcontroller takes in the episode now all the data bits one Minute, with the recorded data bits in a specially dedicated memory device in the microcontroller be cached. Are all data bits of a Minute telegram of the transmitted time signal before, then the microcontroller reads the cached data bits from and calculates the correct time and the correct Date.
  • a microcontroller For decoding the time signal is in the radio clock a microcontroller is used.
  • This the time signal receiver Downstream microcontroller is for cost reasons typically designed as a 4-bit microcontroller and also has a lot for cost reasons low memory of about 2 Kbytes.
  • This memory will for the most part for the caching of the decoded Data bits as well as used for the program of the microcontroller which in turn is for the most part the treatment of Disturbances and different seconds pulses are used.
  • the Microcontroller is therefore in today's radio clock applications almost fully occupied, the received second pulses to decode and possibly the time signal to treat superimposed interference signals. The anyway limited computing resources of the microcontroller at this time not or only limited other tasks to disposal.
  • the microcontroller As far as its computational effort, to relieve.
  • the time information extracting device decodes the different ones Second pulses and assigns a data bit every second pulse to.
  • the individual data bits are stored in a specially designed Memory cached in the receiver. Lie all data bits of a one-minute telegram, then become these are read out of the memory and in one step transmitted to the microcontroller. In the microcontroller these data bits are again buffered. For calculating the exact time and date these data bits stored in the microcontroller are required read out again.
  • Such a time signal receiver or one with such Time signal receiver equipped radio clock is in the German Patent Application No. 103, not yet disclosed 34990.1 described.
  • reaction time between a turn on and the first reaction of the time signal receiver is relatively long, since at the earliest after completion of a complete minute log the corresponding data bits can be transmitted to the microcontroller.
  • the present invention is therefore based on the object a particularly circuitry technically simplified receiver circuit and a method of operating this receiver circuit provide, in addition, the microcontroller relieve as best as possible.
  • this object is achieved by a method the features of claim 1, by a receiver circuit with the features of claim 17 and by a radio clock with the features of claim 26 solved.
  • the present invention is based on the knowledge that in the receiver, among other things, the evaluation (decoding) the received time signals is used in succession
  • the data bits obtained from the evaluation are not necessarily must be saved and not only in the presence of a corresponding to the number of a complete minute telegram Number of data bits to a downstream microprocessor must be transferred.
  • the idea of the invention exists in that the receiver evaluates the time signal and from that the corresponding data bits wins. As soon as a data bit associated with a respective time frame there is receiver-side decoding of the time signal, this is output individually immediately after decoding.
  • the individual data bits can either be immediate fed to a downstream microprocessor or alternatively buffered in a buffer memory become.
  • the particular advantage of the present invention is now in that the individual, in the receiver by decoding Data bits obtained no longer in a corresponding memory must be stored in the receiver circuit. On In this way, the receiver-side circuit complexity is significant reduced. The chip area of the receiver circuit can be reduced accordingly, whereby the Receiver circuit and beyond the entire radio clock can be produced more cheaply. At essentially functionally identical circuit parts and products, such as the Radio clocks is the case, this is a very big competitive advantage compared to competing products.
  • Another advantage is that the number of required external connections (PINs) can be reduced, in particular a connection to request the data (English: data request) and a connection for signaling, the valid data in the memory (English: data ready), are no longer necessary.
  • the system clock can be of the microprocessor as readout clock of the data bits obtained use.
  • Radio clock receiver is significantly reduced, since the corresponding decoded data bits are sent continuously and not wait until a complete Minute protocol provided by the receiver circuit becomes.
  • a first alternative of the method according to the invention According to the transmission of a single data bit still within the time frame of the respective data bit assigned. This is possible because the inside time information available - ie the corresponding one Second pulse - typically through a change the amplitude at the beginning of the respective time signal is predetermined.
  • At the end of a timeframe is typical - but not necessarily - no time information contained in the time signal.
  • the evaluation of the Receiver has thus in the former case 900 msec and in the second case Trap 800 msec time by amplitude modulation in evaluate, decode, information contained in this time frame and in the form of data bits still within this Time frame.
  • a second alternative of the method according to the invention According to the transfer of a respective one Timeframe associated data bits during this Timeframe of subsequent timeframe. Especially advantageous It is there if the respective data bit during the immediate subsequent time frame, in particular at the beginning of the immediately subsequent time frame is transmitted.
  • the one Data frame assigned to each time frame to a fixed predetermined Reference time - based on a time frame - transfer.
  • a fixed reference time For example, you can start a second of a given one second Timeframe designate. Additionally or alternatively, the given reference time also a rising or a designate the falling edge of the time signal.
  • a DCF-77 timing signal indicates a falling edge of the time signal at the same time End of a timeframe and the second of each subsequent time frame.
  • the times of transmission of a single data bit to determine the beginning of each second of the corresponding Time frame subsequent time frame are used. This is particularly special for such cases Advantage in which no specially designated method to determine the start of the second. Since at the Evaluation of most time signal signals inevitably also gained knowledge of the beginning of each second This can advantageously without much additional effort used for the further evaluation of the time signal become.
  • the Output terminal of the receiver over which the demodulated and decoded data bits to the downstream microprocessor is transmitted to a predetermined logical level, for example, to a low logic level.
  • the output terminal will remain until the beginning of the next one Timeframe at this logical level.
  • the duration of the respective change determines, for example, by counting the Clocks of a reference clock with a known, constant reference frequency. From the thus determined duration of the respective change can thus use a data bit assigned to a time frame be derived. It can from at least two successive following changes in the amplitude of the time signal Time interval are determined. From the duration of the time interval then the value of the corresponding data bit can be derived become.
  • a synchronization of this Timing signal on the beginning of the second with respect to the Telegram made of the transmitted time signal is required for many timing signals to get an accurate Determination of the duration of a change and thus of the corresponding change To be able to make a second impulse.
  • the recorded time signal is scanned in the receiver before the evaluation.
  • Procedure will be provided by the recipient and output data bits are buffered in an external memory.
  • the individual data bits are advantageously in the order in which they are received by the recipient to be output, cached in the external memory.
  • This external memory may be part of, for example be a microprocessor or formed separately be.
  • the transmitted data bits can either directly or via the microprocessor in the external memory be filed. In the presence of a number of stored Data bits that are a full minute telegram of the transmitted time signal these cached data bits again from the external Memory read out.
  • the microprocessor calculates in the sequence from the data bits thus read the exact time and the exact date and generates a corresponding time and date signal for an electronic clock.
  • the time information is present bit by bit in the time signal, wherein a value of a respective data bit is due to the assigned telegram of the time signal transmitter from a duration a change in the amplitude of the transmitted time signal results.
  • a respective data bit becomes a (binary) Value derived from this duration of change is.
  • a first duration of the change in the amplitude of the time signal signal a first logical Value of the data bit and a second duration corresponding to one second logical value of the data bit.
  • This first and second Duration are predetermined by the telegram of the time signal transmitter.
  • the first logical value denotes a logical one "0" (LOW, low voltage level) and the second logical one Value a logical "1" (HIGH, high voltage level). Conceivable, of course, would be a reverse logic.
  • time information extracting means For evaluation of the time signal and thus for recovery the time information contained therein is a time information extracting means within the time signal receiver intended.
  • This time information extraction device is used the evaluation of the time signal and the decoding of the corresponding time information.
  • the time information extracting device determines the duration of a change in amplitude the time signal indicating the corresponding time information contains. According to this duration, the time information extracting device conducts one associated with this change Data bit off.
  • the time information extracting device advantageously a bit detection circuit which is a data bit according to the protocol of the Time frame telegram and the duration of the change a logical one first value or a logical second value.
  • the time information extraction device For determining the time duration, the time information extraction device a time generator based on which the duration a change based on a fixed time base determinable is.
  • the time generator can be used, for example, as a counter, in particular as up counter, be formed. This counter By counting the clocks of a reference clock, a counter status signal as a measure of the duration of each change ready. Additionally or alternatively, the meter reading signal also by counting the samples taken from the Timing signal generated by sampling derived become.
  • a reference clock generator provided, which has a reference clock with a predetermined Clock frequency provides.
  • a synchronization device which is a synchronization of the time signal to the beginning of the second referred to the telegram of the transmitted time signal signal makes.
  • the receiver circuit is a scanning device for scanning the recorded Timing signal and for providing value discreet Provided samples.
  • the time information extraction device Part of a logic circuit in particular a hard-wired logic circuit. additionally can also be the synchronization device and / or the Counter be part of this logic circuit.
  • This logic circuit For example, an FPGA circuit or a PLD circuit included.
  • the functionality can be of these facilities in principle by a in the Radio-controlled clock typically present microcontroller fulfill.
  • the particular advantage of the solution according to the invention is, however, that by the logic circuit on very simple way and nevertheless defiance very effective
  • the method according to the invention can be implemented can, without the use of the microcontroller would have to be.
  • the microcontroller is as a result advantageously other tasks available.
  • Programmatic setup of the radio clock is typically designed as a microprocessor or as a microcontroller.
  • a 4-bit microcontroller can be provided.
  • This microcontroller stores the information from the receiver circuit output individual data bits in succession in one specially provided for storage device.
  • This storage device may be part of the program-controlled device be or be designed as an external memory, for example, as ROM, RAM, SRAM, SDRAM, etc.
  • the storage space of this storage device is advantageously designed so that at least the time information, which for a complete minute telegram of a time signal are required to be stored there.
  • the electronic clock of the radio clock is typically with a Watch quartz connected.
  • This quartz watch represents a reference clock ready to clock this electronic clock.
  • the clock quartz provided reference clock also to the clocking of Receiver circuit, in particular their time information extraction device and counters, used in addition or alternatively the clock quartz can also be used to clock the programmatically Setup of the radio clock can be used.
  • Figure 3 shows a block diagram of a section of a highly simplified illustrated radio clock to carry out the inventive method.
  • the radio clock is designated by reference numeral 1 here.
  • the radio clock 1 has a receiving antenna 2 for receiving the one not shown time signal transmitters sent time signal signals X on.
  • the receiving antenna 2 is a receiver circuit 3 downstream.
  • the receiver circuit 3 is used the filtering, rectification and amplification of the received Timing signal X.
  • the receiver circuit 3 typically with one or more filters, for example a bandpass filter, a rectifier circuit and a single or multi-stage amplifier circuit fitted.
  • the basic structure and functioning such a receiver circuit 3 is widely known For example, from the publications mentioned above, see that does not have to be discussed in detail.
  • the receiver circuit 3 is further connected via a data line 4 with a program-controlled device 5, for example a 4-bit microprocessor connected.
  • the receiver circuit 3 is also via a clock line 6 with the program-controlled Device 5 connected.
  • about this clock line 6 is the receiver circuit 3 of a not shown in Figure 3 Clock generator in the program-controlled device 5 supplied with a reference clock CLK.
  • the inventive Receiver circuit 3 beyond with a Time information extraction device 7 equipped.
  • the time information extracting device 7 is designed to be in the sent and received by the receiver circuit 3 To evaluate timing signal X contained time information and to decode. As a result, the time information extracting means detects 7 thus the different data bits of a Minute telegram of the time signal, which for the exact determination of the radio-controlled time and the radio-controlled Date are required. Since the time information is in received time signal X is amplitude modulated, the data bits contained therein can only be evaluated one after the other and be decoded. In the method according to the invention However, these are those of the time information extraction device 7 generated data bits not in the receiver device 3 stored.
  • the sections in Figure 4 show three complete time frames Y1 - Y3 of the time signal X.
  • the first reductions X1 correspond to the binary one "0" and the second subsidence X2 correspond to the binary one "1", where a binary "1" and a binary "0" respectively correspond to a data bit.
  • the topmost representation of the signal-time diagram (FIG. 4A) shows the amplitude modulated time signal X as it for example, is received by the receiver antenna 2.
  • the Signal X '( Figure 4B) indicates that from the amplitude modulated Timing signal X derived, demodulated time signal.
  • the receiver circuit 3 now decodes the signals demodulated Timing signal X 'contained time information.
  • any reduction X1, X2 of the demodulated time signal X ' is assigned a data bit or control bit which immediately after their decoding to the downstream arranged microprocessor 5 are sent.
  • the duration T1, T2 of a respective reduction X1, X2 are determined.
  • the duration T1, T2 of a respective reduction X1, X2 can be in a very simple way by counting the clocks of a reference clock Determine CLK.
  • a reference clock CLK will, for example one divided from the quartz watch (for example, 32.768 KHz) Reference frequency (for example 1024 Hz) used.
  • a counter is typically used with the Beginning of lowering X1, X2, for example the start of the second Z of the demodulated time signal X ', continuously the clocks of the reference clock CLK counts up.
  • the meter reading signal ZSS of the counter (see Figure 4C) is thus a Measure for the current duration of a reduction X1, X2 of the demodulated Timing signal X '.
  • the counter stops to count. From the count thus determined and the knowledge the exact reference frequency of the reference clock CLK leaves then the duration of the respective reduction X1, X2 exactly determine.
  • the information transfer of coded data bits DB1, DB2 always starts at a fixed reference time, for example, at the beginning of the second t2, t3 of the respective subsequent Time frame Y2, Y3.
  • a defined, fixed number of bits (DB1, DB2) of the data bit signal DBS is the data bit signal DBS back to a low logical level set. This low logic level of the Data bit signal DBS remains until the beginning of the subsequent one Timeframe at this level.
  • a defined, fixed number of bits DB1, DB2 For the transmission of a respective data bit ("0", “1") a defined, fixed number of bits DB1, DB2 required. This fixed number of bits DB1, DB2 indicates, for example, the value of the respective data bit ("0", “1").
  • X2 associated data bits can also the exactly measured duration .DELTA.t1, .DELTA.t2 this lowering X1, X2 transmitted become.
  • a respective reduction X1, X2 Data bit signal DBS a different coding and Bit width up.
  • Time signal X contained time information on the one hand the presence of subsidence X1, X2 and on the other hand the duration of these reductions X1, X2. So corresponds to the protocol of the German time signal (DCF-77) a 100 msec continuous lowering X1 of a logical "0" and a 200 msec continuous lowering X2 of a logical "1". Beside these data bits is there still a control bit S (or start bit called), which by no reduction within the respective Timeframe is marked. This control bit S denotes the minute start in the telegram of the time signal X.
  • the first duration T1 corresponds to the duration ⁇ t1 and the second duration T2 of the duration ⁇ t2.
  • the measured duration ⁇ t1, ⁇ t2 of a reduction X1, X2 becomes binary as a multiple of the duration of the period of the reference clock CLK issued.
  • MSB most significant bit
  • LSB least significant bit
  • the duration ⁇ t1, ⁇ t2 a lowering X1, X2 determined to 1 msec exactly.
  • the duration ⁇ t1, ⁇ t2 of the various reductions X1, X2 in the various protocols of transmitted time signals is typically defined in 100 msec increments, is one such accurate determination of the duration of a reduction typically not always required. For this reason can advantageously to some of the last bits (LSB bits), to Example, the 3 to 4 last LSB bits are omitted.
  • the first method was more or less only the Value of a data bit transmitted while in the second method in addition to the value of the data bit and the basis of this data bit lying duration .DELTA.t1, .DELTA.t2 of the lowering X1, X2 transmitted from which thus to some extent conclusions on the received signal quality can be drawn.
  • the methods described can be used also be combined with each other. In addition to the described Of course, methods may be additional or alternative also other methods for transmitting the data bits used become.
  • FIG. 5 shows a more detailed block diagram of an inventive device Radio clock.
  • the radio clock has one (or more) antennas 2 to Recording the time signal sent by the time signal transmitter 3 time signals X on.
  • the antenna 2 is formed as a coil 10 with ferrite core, the a capacitive element 11, for example a capacitor, is connected in parallel.
  • the receiver circuit 3 has a demodulator circuit 12 on, the input side is connected to the antenna 2.
  • the Demodulator circuit 12 generates the demodulated time signal X '.
  • the demodulator 12 is the output side with the time information extraction device 7 to remove the in the time signal X 'contained time information.
  • the Time information extractor 7 points for this purpose a bit detection circuit 13, which is a data bit ("0", "1") according to the protocol of the time frame telegram and the duration T1, T2 of the change X1, X2 a first or assign a second logical value. For this must first the duration T1, T2 of the corresponding change X1, X2 be determined.
  • the time information extracting device 7 also has a counter 14.
  • the counter 14 is in the present Embodiment over the clock line 6 of the Reference clock CLK of a reference clock generator 15 clocked.
  • a reference clock generator 15 may advantageously the quartz watch 15 are used.
  • the counter 14 can be used as an up counter 14 or alternatively be designed as a down counter.
  • the counter 14 counts starting at zero continuously the clocks of the reference clock CLK up or down.
  • the current count of the counter 14 is on the output side as meter reading signal ZSS tapped.
  • the Meter reading signal ZSS is a measure of the current duration a change X1, X2.
  • the corresponding counter status signal ZSS is supplied to the bit detection circuit 13 which supplies the current meter reading and thus the time since Start of a change X1, X2 evaluates.
  • Control signal 16 is reset to zero.
  • the bit detection circuit 13 now includes the number of Clocks of the reference clock, the duration T1, T2 of a respective Change X1, X2 correspond to the respective data bit, ie to "0" or to "1".
  • the bit detection circuit 13 decodes so that the time information in the time signal X '. in the present embodiment, the time information extracting device 7
  • the bit detection circuit 13 generates depending on the sequence from the respectively decoded data bit ("0" or "1"), a data bit signal DBS, which immediately to the downstream program-controlled Device 5 is transmitted.
  • the single ones Data bits are stored in a memory 22 within the program Device 5 cached.
  • the time information extraction device 7 also has a synchronization device 17, which has a Amplituden facial.im in the time signal X 'recognizes and from it closes to a second.
  • a control signal 18 through which the bit detection circuit 13 or the entire time information extraction device 7 to the beginning of the second in relation to the telegram of the transmitted time signal X are synchronized.
  • a program-controlled device 5 is typically a Microcontroller 5 is provided, which in the case of a radio clock. 1 for example, is designed as a 4-bit controller.
  • This Microcontroller 5 is designed to be that of the receiver circuit 3 and the synchronization device 17 generated Data bit signals DBS record and from this an exact time and calculate an exact date. From the calculated so Time and date will be a signal 19 for the time and the date is generated.
  • the radio clock 1 also has an electronic clock 20, whose time is controlled by the quartz watch 15.
  • the Electronic clock 20 is with a display 21, for example a display 21, connected via which the time is displayed becomes.
  • the clock 20, the signals 19 are now fed, whereupon the clock 20 corresponding to the displayed time corrected.
  • the receiver circuit 3 and / or demodulator circuit 12 and / or the time information extracting device 7 Component of a logic circuit, in particular a hard-wired Logic circuit, be. By using a such logic circuit, the microcontroller 5 relieved so that this is available for other tasks stands.
  • the invention is not based on the indicated time signal transmitters limited. These were only for Representation of the invention used, but without the invention to limit it.
  • radio clocks should also be understood as meaning such watches in which the transmission of the time signal wired, for example, as in clock systems common, but have a structure as described.
  • the coding was each by lowering the carrier signal at the beginning of a Timeframe realized. It goes without saying that Of course, this coding also by an increase or generally by a change in the amplitude of the carrier signal can be realized.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)
  • Electromechanical Clocks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
EP05002094A 2004-02-04 2005-02-02 Procédé pour obtenir des informations de temps, circuit récepteur et montre controlée par radio Withdrawn EP1562088A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004005340 2004-02-04
DE102004005340A DE102004005340A1 (de) 2004-02-04 2004-02-04 Verfahren zur Gewinnung von Zeitinformationen, Empfängerschaltung und Funkuhr

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EP1562088A2 true EP1562088A2 (fr) 2005-08-10

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US (1) US20050169230A1 (fr)
EP (1) EP1562088A2 (fr)
JP (1) JP2005221505A (fr)
CN (1) CN1652048A (fr)
DE (1) DE102004005340A1 (fr)

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JP2005221505A (ja) 2005-08-18
US20050169230A1 (en) 2005-08-04
DE102004005340A1 (de) 2005-09-01

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