EP1527659A1 - Verfahren zur herstellung von hochfrequenztechnisch verwendbaren elektrischen leitungsstrukturen - Google Patents

Verfahren zur herstellung von hochfrequenztechnisch verwendbaren elektrischen leitungsstrukturen

Info

Publication number
EP1527659A1
EP1527659A1 EP03792118A EP03792118A EP1527659A1 EP 1527659 A1 EP1527659 A1 EP 1527659A1 EP 03792118 A EP03792118 A EP 03792118A EP 03792118 A EP03792118 A EP 03792118A EP 1527659 A1 EP1527659 A1 EP 1527659A1
Authority
EP
European Patent Office
Prior art keywords
resist
etching
frequency technology
structure carrier
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03792118A
Other languages
German (de)
English (en)
French (fr)
Inventor
Georg Busch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP1527659A1 publication Critical patent/EP1527659A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0242Structural details of individual signal conductors, e.g. related to the skin effect
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0179Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles

Definitions

  • the invention relates to a method for producing high-frequency electrical line structures on a line structure carrier.
  • Chemical tin can be applied in a thickness of approx. 1 ⁇ m.
  • An amorphous resist can even be applied in a thickness of significantly less than 20 ⁇ m.
  • Previous resists had a layer thickness of significantly greater than 20 ⁇ m.
  • the much thinner resists enable lasering in a much more precise way. With an optimized manufacturing process, structures down to the 20 or 10 ⁇ m range are possible. These fine structures enable the formation of electrical line structures that can be used by high-frequency technology and replace the otherwise required conventional components with the corresponding disadvantages.
  • the line structures are designed in such a way that they form capacitors, coils and resistors that are effective in terms of high-frequency technology, each with the desired values in the smallest space.
  • the laser structuring method allows structuring z. B. compared to photo-technical processes in a relatively simple manner and still at high speed.
  • the combination of a laser structuring method with an etching method has the further advantage that entire areas can be removed simultaneously with the removal of other areas. This saves time, but is also often necessary so that the electrical line structures used in high-frequency technology are not negatively influenced by the electrical voltage fields that may be present through the full-area areas.
  • this method enables structured conductor tracks with small tolerances to be realized on the inner layers or on the outer layers of a printed circuit board as a microstrip conductor with almost any function over the entire production benefit.
  • the width of the conductor tracks can be narrowed down almost as desired. Tolerances of ⁇ +/- 5 ⁇ m are already possible today. In the past, typical tolerances were in the range of sizes of +/- 25 ⁇ m.
  • FR 4 carrier material is then used as a line structure carrier. This material is well known and inexpensive.
  • FIG. 1 shows a basic process sequence of the method according to the invention
  • Figure 2 shows a part of a larger produced by the method according to the Figure 1 circuit board structure in cross-section with a high frequency can be used industrially and a non-high-frequency-technologically usable line structure
  • Figure 3 is a ⁇ size comparison between a line structure according to the invention and according to an appropriate conventional technique
  • Figures 4 to 7 a step-by-step realization of a coil produced according to the invention
  • Figures 8 to 10 a side view of three finished
  • Figures 11 and 12 further applications according to the invention, Figures 13 to 16 application examples according to the invention with respect to a capacitor, a coil, a resistor and a moisture sensor.
  • the partial laser structured conductor pattern shown in FIG. 1 shows a line structure carrier 1 (substrate, for example an FR4 circuit board), the surface of which is pretreated in an initial coating phase in such a way that a thin layer chemical copper can be applied.
  • a further copper layer in the present exemplary embodiment with a total layer thickness of up to 20 ⁇ m, is then applied in a subsequent electrolytic coating.
  • ne thin resist layer here consisting of chemical tin with a layer thickness of approx. 1 ⁇ m, applied.
  • a structuring phase follows the coating phase.
  • the structuring is carried out according to FIG. 1 with a laser.
  • the chemical tin layer is milled away at the points at which the copper layer below the chemical tin layer is to be removed later.
  • the exposed copper layer is etched away. Finally, the chemical tin layer still present is stripped away.
  • FIG. 2 a line structure according to the invention is shown in the top left area, while a conventional line structure is shown in the middle area.
  • FIG. 3 shows size relationships when a predetermined line structure is implemented in accordance with the invention and in accordance with a conventional technique.
  • FIGS. 4 to 7 show the step-by-step realization of a coil realized with a microstrip line according to the invention.
  • a copper surface with an edge length of 1 mm is shown in FIG.
  • the copper surface is structured with a laser in the individual production steps.
  • a coil in the form of a worm can already be seen in FIG. In FIG. 6, the disruptive corner surfaces have been removed. In Figure 7 the coil is finished.
  • FIGS. 8 to 10 finished applications based on coils are shown in a respective side view.
  • the shape and size of the figures can be chosen freely. In the illustrated embodiment, the most compact form was chosen.
  • FIG. 11 shows a possible application within the circuit board below a component. In the form shown, no assembly area of the circuit board is required. The coil could also be placed anywhere in the layout.
  • FIG. 12 shows an application as capacitors below a pad (pad).
  • Layer thicknesses down z. B. up to 25 microns can capacitors in the range up to z. B. 20 pF can be realized in the smallest space. These capacitors have the additional advantage that they hardly have an inductive effect.
  • FIG. 13 shows an application with respect to an RF capacitor.
  • FIG. 14 shows an application with respect to an RF coil.
  • FIG. 15 shows an application with respect to an RF resistor and
  • FIG. 16 shows an application with regard to a moisture sensor.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
EP03792118A 2002-08-08 2003-07-03 Verfahren zur herstellung von hochfrequenztechnisch verwendbaren elektrischen leitungsstrukturen Withdrawn EP1527659A1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10236466 2002-08-08
DE10236466A DE10236466A1 (de) 2002-08-08 2002-08-08 Verfahren zur Herstellung von hochfrequenztechnisch verwend-baren elektrischen Leitungsstrukturen
PCT/DE2003/002227 WO2004019665A1 (de) 2002-08-08 2003-07-03 Verfahren zur herstellung von hochfrequenztechnisch verwendbaren elektrischen leitungsstrukturen

Publications (1)

Publication Number Publication Date
EP1527659A1 true EP1527659A1 (de) 2005-05-04

Family

ID=30469613

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03792118A Withdrawn EP1527659A1 (de) 2002-08-08 2003-07-03 Verfahren zur herstellung von hochfrequenztechnisch verwendbaren elektrischen leitungsstrukturen

Country Status (6)

Country Link
EP (1) EP1527659A1 (ja)
JP (1) JP2005535146A (ja)
KR (1) KR20050059055A (ja)
DE (1) DE10236466A1 (ja)
TW (1) TW200406950A (ja)
WO (1) WO2004019665A1 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103917052B (zh) * 2013-12-30 2017-06-13 天津市德中技术发展有限公司 一种用激光直接成型技术加工电路板的方法
CN112822853A (zh) * 2020-12-30 2021-05-18 深圳市百柔新材料技术有限公司 一种激光刻蚀电路板线路制作方法
DE102021211807A1 (de) 2021-10-20 2023-04-20 Zf Friedrichshafen Ag Vorrichtung und Verfahren zur Detektion von Feuchtigkeit auf einer Leiterplatte
JP7461437B1 (ja) 2022-10-21 2024-04-03 旭東 陳 微細な相互接続を伴う回路基板を製造するためのサブトラクティブ方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3732249A1 (de) * 1987-09-24 1989-04-13 Siemens Ag Verfahren zur herstellung von dreidimensionalen leiterplatten
EP0530564A1 (de) * 1991-09-05 1993-03-10 Siemens Aktiengesellschaft Verfahren zur Herstellung von Leiterplatten
US5474956A (en) * 1995-03-14 1995-12-12 Hughes Aircraft Company Method of fabricating metallized substrates using an organic etch block layer
US5929729A (en) * 1997-10-24 1999-07-27 Com Dev Limited Printed lumped element stripline circuit ground-signal-ground structure
WO2000056129A1 (de) * 1999-03-16 2000-09-21 Siemens Aktiengesellschaft Verfahren zum einbringen von durchkontaktierungslöchern in ein beidseitig mit metallschichten versehenes, elektrisch isolierendes basismaterial

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2004019665A1 *

Also Published As

Publication number Publication date
DE10236466A1 (de) 2004-02-19
WO2004019665A1 (de) 2004-03-04
JP2005535146A (ja) 2005-11-17
KR20050059055A (ko) 2005-06-17
TW200406950A (en) 2004-05-01

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