EP1485994A2 - Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification - Google Patents

Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification

Info

Publication number
EP1485994A2
EP1485994A2 EP03720137A EP03720137A EP1485994A2 EP 1485994 A2 EP1485994 A2 EP 1485994A2 EP 03720137 A EP03720137 A EP 03720137A EP 03720137 A EP03720137 A EP 03720137A EP 1485994 A2 EP1485994 A2 EP 1485994A2
Authority
EP
European Patent Office
Prior art keywords
amplifier
output signal
amplifier stage
adder
error signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03720137A
Other languages
German (de)
English (en)
Inventor
Björn JELONNEK
Armin Splett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Solutions and Networks GmbH and Co KG
Original Assignee
Siemens AG
Nokia Siemens Networks GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP02006023A external-priority patent/EP1345318A1/fr
Priority claimed from DE2002111537 external-priority patent/DE10211537C1/de
Application filed by Siemens AG, Nokia Siemens Networks GmbH and Co KG filed Critical Siemens AG
Priority to EP03720137A priority Critical patent/EP1485994A2/fr
Publication of EP1485994A2 publication Critical patent/EP1485994A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H03F1/3229—Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction

Definitions

  • the invention relates to an arrangement for reducing non-linear distortions in an amplifier stage output signal of an amplifier stage.
  • amplifier stages are designed according to the so-called “feed-forward principle”.
  • an amplifier stage input signal is conducted in a main branch of the amplifier stage via a non-ideal amplifier whose non-linearly distorted output signal is delayed on the one hand to an adder and on the other is led to a secondary branch.
  • the amplifier stage input signal is also fed to the secondary branch, where an error signal is obtained from the delayed amplifier stage input signal and from the non-linearly distorted output signal of the amplifier, which is fed to the adder for distortion compensation.
  • the adder forms the amplifier stage output signal from the error signal and from the non-linearly distorted output signal of the amplifier, the non-linear distortions of the amplifier being compensated for by the error signal.
  • the non-linearly distorted output signal of the amplifier must be delayed within the main branch in accordance with a group delay required for determining the error signal in the secondary branch.
  • a delay is generally associated with Realized with the help of a delay line with finite electrical quality.
  • the delay line has electrical losses, which in turn deteriorate the efficiency of the amplifier stage.
  • the object of the present invention is to improve the efficiency of an amplifier stage designed according to the “feed-forward principle”.
  • the design of the amplifier stage according to the invention significantly reduces the manufacturing outlay.
  • the amplifier stage can be easily implemented using microstrip technology, and the required volume of the “feed-forward” amplifier stage is reduced.
  • the efficiency of the amplifier stage is improved because losses within the main branch are reduced.
  • FIG. 2 compares with FIG. 1 a basic circuit diagram of an amplifier stage according to the invention
  • FIG. 3 shows a basic circuit diagram of a further amplifier stage according to the invention
  • FIG. 4 shows an embodiment for a transmission device provided in the arrangement according to FIG. 3, and FIGS.
  • FIG. 7 transmission characteristics of the analog filter shown in FIG. 4.
  • FIG. 1 shows a basic circuit diagram of an amplifier stage VSO designed according to the feed-forward principle, according to the prior art.
  • An amplifier stage input signal uO reaches the amplifier stage VSO and is connected as an input signal both to a main branch HZ and to a secondary branch NZ of the amplifier stage VSO.
  • An amplifier stage output signal u5 is generated by the amplifier stage VSO, the nonlinear distortions of which are reduced with the aid of an error signal fs formed by the secondary branch NZ.
  • the main branch HZ includes a first transmission device Hl connected in series, which has an attenuation a1 and a group delay ⁇ l, a non-ideal first amplifier VI with a gain gl, a delay element T1 with a group delay ⁇ 5 and a first adder AD1.
  • the secondary branch NZ contains a series circuit comprising a delay element T2 with a group delay ⁇ 2, a second adder AD2 and a third transmission device H3 with an attenuation a4 and a group delay ⁇ .-X.
  • the third transmission device H3 is followed by a second amplifier V2 with a gain g4 and a group delay ⁇ .
  • the secondary branch also contains a second transmission device H2 in a transverse branch, which is connected on the one hand to the output of the first amplifier VI in the main branch HZ and on the other hand to the second adder AD2.
  • the third transmission device H3 and the second amplifier V2 are combined to form a so-called error signal device NP, the output signal of which reaches the first adder AD1 as an error signal fs.
  • the device NP thus has a resulting group delay ⁇ res, which is composed of the group delay of the third transmission device H3 and the second amplifier V2.
  • the amplifier stage input signal uO reaches the first amplifier VI, assumed to be non-ideal, via the first transmission device H1, whose non-linearly distorted output signal ul has an error component y.
  • Group delays caused by the first amplifier VI are also taken into account by the group delta ⁇ l of the first transmission device Hl.
  • the non-linearly distorted output signal ul of the first amplifier VI reaches the first adder AD1 on the one hand via the delay element T1 and, on the other hand, negates a second input of the second adder AD2 via the second transmission device H2, the at a first input of the second adder Delay element T2 delayed amplifier stage input signal uO is switched on.
  • the input signal u3 of the error signal device NP reaches the second amplifier V2 via the third transmission device H3, the output signal of which is the error signal fs.
  • the non-linearly distorted output signal ul of the first amplifier VI is connected to a first input of the first adder AD1, and the error signal fs is connected to a second input of the first adder AD1.
  • branches and adders shown here are usually implemented as directional couplers. Phase rotations of the voltages are not considered in detail here.
  • the second amplifier V2 Since the second amplifier V2 only amplifies the error component Y, it can be operated linearly, so that through it only negligible nonlinear distortions are generated.
  • a filter is possible which, with the same quality Q, also has the aforementioned attenuation A.
  • FIG. 2 shows, in comparison with FIG. 1, a basic circuit diagram of an amplifier stage VS1 according to the invention.
  • the error signal device NP here contains two series circuits SSI and SS2, each of these series circuits having a third transmission device H31 or H32 and amplifiers V21 or V22 connected downstream of the respective transmission device.
  • the resulting group delay ⁇ res of the error signal device NP is formed in such a way that a group delay t5 "occurring between the first amplifier VI and the first adder AD1" is taken into account accordingly.
  • the resulting group delay ⁇ res of the error signal device NP in the desired frequency range should be selected negatively.
  • the error signal device NP here has a digital filter, the two transmission devices H31 and H32 having coefficients 2 * a4 and ⁇ 4- ⁇ or -a4 and 2 ⁇ 4- ⁇ .
  • the output signals of the two amplifiers V21 and V22 are added to the error signal fs with the aid of a further adder, which again reaches the first adder AD1.
  • the group delay ⁇ 4 can be set such that a product f 0 ⁇ 4 is an integer, where f 0 here is a center frequency of a working range of the amplifiers V21 and V22.
  • f 0 a center frequency of a working range of the amplifiers V21 and V22.
  • U 5 a x g ⁇ x + y [l-2exp (-j2 ⁇ ⁇ f ⁇ ) + exp (-j2 ⁇ ⁇ f 2 ⁇ 4 )]
  • the negative group delay times are selected in the third transmission devices such that the resulting group delay ⁇ res of the error signal
  • FIG. 3 shows a basic circuit diagram of a further amplifier stage VS2 according to the invention.
  • the error signal device NP here consists only of a series circuit with a third transmission device H33 and a second amplifier V23.
  • the third transmission device H33 is formed, for example, by a passive filter with a negative group delay.
  • the output signal of the second amplifier in turn reaches the first adder AD1 as an error signal fs.
  • the third transmission device H33 which is designed as a filter, transmits only low high-frequency powers, the insertion loss of the filter is neglected.
  • FIG. 4 shows an exemplary embodiment of the third transmission device H33 provided in the arrangement according to FIG. 3, which is designed as an analog filter with a negative group delay.
  • 5 to 7 show transmission characteristics of the analog filter shown in FIG.
  • FIG. 5 shows a frequency-dependent transmission characteristic in which frequencies in GHz are plotted on the x-axis and amplitude values in “dB” are plotted on the y-axis.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un système permettant de réduire les distorsions non linéaires d'un signal de sortie d'un étage d'amplification configuré selon le principe de l'action anticipée. Un signal d'entrée d'un étage d'amplification arrive dans une ramification principale d'un amplificateur. Le signal de sortie de l'amplificateur, qui est distordu de manière non linéaire, arrive dans un additionneur permettant de produire le signal de sortie de l'étage d'amplification. Le signal de sortie distordu de manière non linéaire et le signal d'entrée de l'étage d'amplification sont introduits dans une ramification secondaire comportant un dispositif de signaux d'erreur. Ce dispositif génère un signal d'erreur à partir du signal d'entrée retardé de l'étage d'amplification et du signal de sortie distordu de manière non linéaire de l'amplificateur. Ce signal d'erreur est introduit dans l'additionneur pour réduire les distorsions du signal de sortie de l'étage d'amplification. A cet effet, le dispositif de signaux d'erreur comprend au moins un dispositif de transmission présentant un temps de propagation de groupe négatif.
EP03720137A 2002-03-15 2003-02-27 Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification Withdrawn EP1485994A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP03720137A EP1485994A2 (fr) 2002-03-15 2003-02-27 Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
DE10211537 2002-03-15
EP02006023A EP1345318A1 (fr) 2002-03-15 2002-03-15 Dispositif pour la réduction de la distortion linéaire dans un signal de sortie d'un étage d'amplificateur
EP02006023 2002-03-15
DE2002111537 DE10211537C1 (de) 2002-03-15 2002-03-15 Anordnung zur Reduzierung von nichtlinearen Verzerrungen bei einem Verstärkerstufen-Ausgangssignal einer Verstärkerstufe
EP03720137A EP1485994A2 (fr) 2002-03-15 2003-02-27 Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification
PCT/DE2003/000643 WO2003079540A2 (fr) 2002-03-15 2003-02-27 Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification

Publications (1)

Publication Number Publication Date
EP1485994A2 true EP1485994A2 (fr) 2004-12-15

Family

ID=28042834

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03720137A Withdrawn EP1485994A2 (fr) 2002-03-15 2003-02-27 Systeme permettant de reduire les distorsions non lineaires d'un signal de sortie d'un etage d'amplification

Country Status (7)

Country Link
US (1) US7170346B2 (fr)
EP (1) EP1485994A2 (fr)
JP (1) JP2005521285A (fr)
CN (1) CN1643781A (fr)
AU (1) AU2003223841A1 (fr)
MX (1) MXPA04008981A (fr)
WO (1) WO2003079540A2 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0110106D0 (en) * 2001-04-25 2001-06-20 Filtronic Plc Electrical signal preconditioning
FI20055012A0 (fi) * 2005-01-07 2005-01-07 Nokia Corp Lähetyssignaalin leikkaaminen
JP4896424B2 (ja) * 2005-04-22 2012-03-14 株式会社日立国際電気 歪補償増幅器
JP4896609B2 (ja) * 2005-07-15 2012-03-14 三菱電機株式会社 フィードフォワード増幅器
JP2007088617A (ja) * 2005-09-20 2007-04-05 Mitsubishi Electric Corp フィードフォワード増幅器
JP2009207031A (ja) * 2008-02-29 2009-09-10 Hitachi Ltd 増幅回路
KR20120037250A (ko) * 2010-10-11 2012-04-19 세원텔레텍 주식회사 음의 군지연 회로를 갖는 피드포워드 선형 전력 증폭기
US9020065B2 (en) * 2012-01-16 2015-04-28 Telefonaktiebolaget L M Ericsson (Publ) Radio frequency digital filter group delay mismatch reduction
EP2883306B1 (fr) * 2012-08-07 2016-06-08 Telefonaktiebolaget LM Ericsson (publ) Dispositif pour temps de propagation de groupe négatif
US9065425B2 (en) 2013-03-14 2015-06-23 Telefonaktiebolaget L M Ericsson (Publ) Feed-forward linearization without phase shifters
US9306607B2 (en) * 2013-08-16 2016-04-05 Raytheon Bbn Technologies Corp. Wideband interference mitigation system with negative group delay and method for wideband interference cancellation
WO2018160601A1 (fr) * 2017-03-03 2018-09-07 Apsidon, Inc. Filtrage de signal non linéaire

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751250A (en) * 1995-10-13 1998-05-12 Lucent Technologies, Inc. Low distortion power sharing amplifier network
WO1998029941A1 (fr) * 1996-12-30 1998-07-09 Samsung Electronics Co., Ltd. Dispositif et procede d'amplification de puissance lineaire combinee
US6259320B1 (en) * 1999-12-27 2001-07-10 Nortel Networks Limited Error correction within power amplifiers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO03079540A2 *

Also Published As

Publication number Publication date
AU2003223841A1 (en) 2003-09-29
CN1643781A (zh) 2005-07-20
MXPA04008981A (es) 2004-11-26
JP2005521285A (ja) 2005-07-14
US20050127996A1 (en) 2005-06-16
WO2003079540A3 (fr) 2003-11-20
US7170346B2 (en) 2007-01-30
AU2003223841A8 (en) 2003-09-29
WO2003079540A2 (fr) 2003-09-25

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