EP1282940A1 - Miroir de courant et procede permettant de le faire fonctionner - Google Patents

Miroir de courant et procede permettant de le faire fonctionner

Info

Publication number
EP1282940A1
EP1282940A1 EP01936029A EP01936029A EP1282940A1 EP 1282940 A1 EP1282940 A1 EP 1282940A1 EP 01936029 A EP01936029 A EP 01936029A EP 01936029 A EP01936029 A EP 01936029A EP 1282940 A1 EP1282940 A1 EP 1282940A1
Authority
EP
European Patent Office
Prior art keywords
current
current mirror
circuit
signal
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP01936029A
Other languages
German (de)
English (en)
Other versions
EP1282940B1 (fr
Inventor
Christian Paulus
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1282940A1 publication Critical patent/EP1282940A1/fr
Application granted granted Critical
Publication of EP1282940B1 publication Critical patent/EP1282940B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/26—Push-pull amplifiers; Phase-splitters therefor
    • H03F3/265—Push-pull amplifiers; Phase-splitters therefor with field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45344—At least one of the AAC sub-circuits being a current mirror

Definitions

  • the invention relates to a current mirror in which an input current (I in ) is converted nonlinearly into a voltage in a current sink, the voltage being used to control a current source (I out ) with essentially the same transmission characteristic.
  • the invention further relates to a method for operating a current mirror.
  • Current mirrors are circuits, or circuit components, that generate a current of the same strength in response to a current.
  • a current mirror is preferably a circuit or a circuit part. It converts an input current into an output current. There is preferably a linear relationship between the input current and the output current.
  • Differential signal processing is usually used in particular in high-precision, integrated analog circuits in order to reduce the sensitivity of the circuits to interference of all kinds. While circuits whose information transmission takes place in the voltage domain achieve this by using fully differential operational amplifiers (high CMRR, PSRR, etc.), other solutions have to be used in current-mode circuits. Quasi-differential current signal processing is frequently used there, in which two identical but electrically separate circuits are used in parallel. Due to the lack of direct electrical coupling and the possibly large spatial separation of the two signal paths on the chip, the advantages of differential signal processing are put into perspective.
  • the invention comprises a fully differential symmetrical current mirror unit, the two signal paths of which are directly coupled. This results in advantages in noise suppression.
  • the invention has for its object to provide a current mirror that has the highest possible stability, especially with regard to common mode signals. This object is solved by the subject matter of the independent claim. Advantageous further developments result from the dependent claims.
  • a “voltage-controlled current source” is understood to mean any component or assembly that generates an output current when an input voltage is applied. In the simplest case, this can be a MOS transistor, at the gate of which a voltage is applied, a current being generated at the source-drain connections. It is also conceivable to use a bipolar transistor. Components of two transistors, three transistors or more complex voltage-controlled current sources are also conceivable.
  • common mode rejection is used in connection with differential amplifiers or operational amplifiers and denotes their property of suppressing a common mode signal that is present at the inputs of the circuit. At the outputs of the circuit only the z. B. amplified differential signal.
  • the parameter a denotes the fraction of the output current of the current mirror circuit which is made available as an auxiliary current in order to achieve a correction of the interference signal in the differential current mirror circuit according to the invention.
  • the invention provides for a fully differential current mirror to be built up without the use of differential stages, which has advantages with regard to the output voltage range, component mismatch and also stability or bandwidth of the overall circuit.
  • the invention comprises a symmetrical current mirror unit in which an interference signal (common-mode component) of the differential signal is subtracted from the output current by a suitable additional circuit.
  • the current mirror is advantageously designed in such a way that the auxiliary current and the additional auxiliary current are added in such a way that a ⁇ l results.
  • the entire current mirror can be built using identical n-MOS or p-MOS transistors.
  • circuits are the simple implementation as an additional module to existing current mirror units as well as the fact that the architecture presented is largely independent of the basic structure of the current mirror used. Furthermore, the lack of feedback in the circuit does not cause any stability problems, so that the circuit is particularly suitable for applications with a high signal bandwidth.
  • An important advantage of the invention is fully differential To be able to implement current mirror structures without using a differential stage (see exemplary embodiment), which has various disadvantages with regard to bandwidth, output voltage range and sensitivity to component mismatch.
  • At least one of the current sources is formed by at least one transistor and / or that at least one of the current sources contains cascaded transistors.
  • the information to be processed is represented by an electrical signal (generally a voltage).
  • a reference signal e.g. ground
  • the size of the signal results from the difference between the (fixed) reference signal and the signal on the signal line.
  • quadrati-differential current mirror denotes a current mirror circuit in which two
  • the terms “differential”, “fully differential” and “fully differential symmetrical current mirrors” refer to the same circuit architecture.
  • the device for generating the positive output current (I out +) and the negative output current (I out -) by subtracting the interference signal (I cor ) from a copy of the positive input current (I in +) and from a copy of the negative input current (I ln -) at least one complementary current mirror (Mll, M14; M12, M15; M13, M16) which then so-well positive and negative interference can be removed.
  • FIG. 3 shows a generalized circuit diagram of the fully differential current mirror according to the invention
  • 4 shows an embodiment of a fully differential current mirror according to the invention
  • FIG. 5 shows a circuit arrangement for simulating the behavior of the circuit from FIG. 4,
  • FIG. 6 shows the time dependence of the currents for the circuit from FIG. 5.
  • the quasi-differential current mirror shown in FIG. 1 enables a differential signal to be formed between different circuit components.
  • FIG. 2 shows one possibility of how a fully differential current mirror can be set up using a differential stage.
  • a current mirror is, for example, a lecture in the Department of Electronics, Electronic System Design, Electrum 229, Isafjordsgatan 22-26, S-164 40 Ki by Bengt Jonsson, "Switched-Current Circuits: from Building Blocks to Mixed Analog-Digital Systems” - Sta, Sweden on January 25, 1999.
  • the following is particularly problematic with this current mirror circuit.
  • This circuit is particularly complex. For broadband applications in which high-frequency currents have to be mirrored, problems arise with this circuit because the current mirroring does not work quickly enough or precisely enough.
  • FIG. 4 A preferred architecture for fully differential current mirrors is shown in FIG. 4.
  • FIG. 4 shows a schematic illustration which illustrates the basic principle of the current mirror circuit according to the invention.
  • Figure 4 shows a series of voltage-current converters "U I".
  • the voltage-current converters "U I” are each represented as a "black box” with one input and one output. The input is provided in the corresponding symbol where the "U” symbol is located. The respective exit is located where the "I” symbol is located.
  • a “U I” converter can be designed as a transistor.
  • CMOS technology the conversion circuitry
  • I 0 here represents the signal current, while ⁇ l represents the disturbance variable (common-mode component), which is again subtracted from the output signal by the circuit architecture.
  • the differential current mirror circuit has two connections for the differential input signal (I in + or I in " ) and two connections for the output signal (I out + or I out " ).
  • an output current I out " I 0 appears at the output of the signal branch for the inverted signal current (transistors M6-MIO).
  • the addition of the two auxiliary currents results in the correction current ⁇ l.
  • the conventional current mirror circuit consisting of the MOS transistors Mll - M16 produces two copies of this correction current, which are added to the output currents I out + and I out " .
  • the described mode of operation of the circuit is independent of the transmission properties of the current mirror.
  • a reflection ratio I out : I in of 1: 1 was assumed.
  • the correction current must be scaled with the corresponding ratio n in order to completely eliminate an interference component in the
  • auxiliary current does not have to be mandatory have half the size of the input current. Rather, any fraction or multiple a of the output current can serve this purpose.
  • the transmission ratio of the correction current mirror must then be adjusted accordingly.
  • the current mirror circuit according to the invention can also have a plurality of output stages, for example in order to provide a plurality of copies of the input current.
  • the correction circuit must be implemented with further, appropriately scaled correction current mirrors in order to be able to correct all output currents of the overall circuit.
  • the current sinks or sources are implemented by simple MOS transistors.
  • cascode current sources or active current sources can also be used there.
  • any type of voltage-controlled current source can be used as the current sink or current source in the circuit according to the invention.
  • FIG. 4 those areas of the circuit shown there that are outside a so-called correction circuit area correspond to the current mirror circuit of the prior art according to FIG. 1.
  • the correction circuit area is shown in FIG. 4 in a dash-dotted line, which only defines one area. This fictitious area delimitation has no influence on the functioning of the circuit.
  • FIG. 6 shows an arrangement for simulating the behavior of a preferred current mirror.
  • FIG. 7 A time dependence of currents in the current mirror is shown in FIG. 7.
  • FIG. 3 The embodiment of the invention with CMOS transistors is shown in FIG. 3, in FIG. 5 and in FIG. 6, which each represent the same circuit.
  • signal sources are also connected to the connections I in and I out in FIG.
  • a voltage supply VDD and auxiliary voltage sources V2 and V3 are drawn in there, which are drawn in for a better understanding of the functioning of the circuit.
  • the mode of operation of the current mirror circuit according to the invention can be explained in a simple manner with reference to FIG. 4, the statements made here also applying to the embodiments according to FIG. 3, FIG. 5 and FIG. 6.
  • the invention can also be divided into the following features:

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un miroir de courant dans lequel un courant d'entrée (Iin+=I0 bzw. Iin-=-I0) est transformé dans un récepteur de courant, de façon non linéaire, en une tension, la tension servant à la commande d'une source de courant (Iout+=-n<.>I0, ou Iout-=n<.>I0) ayant une caractéristique de transfert sensiblement égale. L'invention est caractérisée en ce que le miroir de courant est conçu de façon qu'il renferme une autre source de courant commandée en tension, qui fournit un courant auxiliaire a<.>Iout = -a<.>n<.>I0.
EP01936029A 2000-05-05 2001-05-04 Miroir de courant et procede permettant de le faire fonctionner Expired - Lifetime EP1282940B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10021928A DE10021928A1 (de) 2000-05-05 2000-05-05 Stromspiegel und Verfahren zum Betreiben eines Stromspiegels
DE10021928 2000-05-05
PCT/DE2001/001664 WO2001086805A1 (fr) 2000-05-05 2001-05-04 Miroir de courant et procede permettant de le faire fonctionner

Publications (2)

Publication Number Publication Date
EP1282940A1 true EP1282940A1 (fr) 2003-02-12
EP1282940B1 EP1282940B1 (fr) 2008-10-01

Family

ID=7640905

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01936029A Expired - Lifetime EP1282940B1 (fr) 2000-05-05 2001-05-04 Miroir de courant et procede permettant de le faire fonctionner

Country Status (4)

Country Link
US (1) US6639456B2 (fr)
EP (1) EP1282940B1 (fr)
DE (2) DE10021928A1 (fr)
WO (1) WO2001086805A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113050747A (zh) * 2019-12-26 2021-06-29 比亚迪半导体股份有限公司 基准电压电路

Families Citing this family (10)

* Cited by examiner, † Cited by third party
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JP3998559B2 (ja) * 2002-10-21 2007-10-31 ローム株式会社 電流源回路
US7019678B1 (en) * 2005-01-14 2006-03-28 National Semiconductor Corporation Digital-to-analog converter with constant differential gain and method
DE102005022337A1 (de) * 2005-05-13 2006-11-23 Texas Instruments Deutschland Gmbh Spannungsgesteuerte Stromquelle
DE102006034560B4 (de) 2006-07-26 2012-04-26 Infineon Technologies Ag Verstärkerstufe, Operationsverstärker und Verfahren zur Signalverstärkung
US7479831B2 (en) * 2006-11-16 2009-01-20 National Semiconductor Corporation Class AB differential current conveyor input stage for a fully differential current feedback amplifier
US8786359B2 (en) * 2007-12-12 2014-07-22 Sandisk Technologies Inc. Current mirror device and method
US9563222B2 (en) * 2014-05-08 2017-02-07 Varian Medical Systems, Inc. Differential reference signal distribution method and system
EP3514953B1 (fr) * 2018-01-19 2021-03-03 Socionext Inc. Conversion tension-courant
DE102018114861A1 (de) 2018-06-20 2019-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Aktiver Filter zur Filterung von Gleichtaktstörungen
US11121687B1 (en) * 2020-04-29 2021-09-14 Stmicroelectronics International N.V. Voltage gain amplifier architecture for automotive radar

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IT1162859B (it) * 1983-05-12 1987-04-01 Cselt Centro Studi Lab Telecom Circuito di polarizzazione per circuiti integrati bipolari multifunzione
US4667180A (en) * 1986-01-27 1987-05-19 General Datacomm, Inc. Continuous time domain analog-digital converter
JPH0377413A (ja) * 1989-08-10 1991-04-03 Siemens Ag 集積可能な差動増幅器
US5498953A (en) * 1992-09-23 1996-03-12 Sgs-Thomson Microelectronics, Inc. HCM based transconductor circuits
FR2712127B1 (fr) * 1993-11-02 1995-12-01 Alcatel Radiotelephone Elément d'amplification à structure différentielle en mode de courant.
JP2837080B2 (ja) * 1993-11-16 1998-12-14 シャープ株式会社 乗算回路
EP0690561B1 (fr) * 1994-06-30 2001-10-31 STMicroelectronics S.r.l. Méthode pour effacer un signal de courant de mode commun et circuit transconducteur utilisant une telle méthode
FR2732129B1 (fr) * 1995-03-22 1997-06-20 Suisse Electronique Microtech Generateur de courant de reference en technologie cmos
TW307060B (en) * 1996-02-15 1997-06-01 Advanced Micro Devices Inc CMOS current mirror
KR100213258B1 (ko) * 1996-10-23 1999-08-02 윤종용 연산증폭기
US6528980B1 (en) * 2001-03-22 2003-03-04 National Semiconductor Corporation Method and system for multiple bias current generator circuits that start each other

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113050747A (zh) * 2019-12-26 2021-06-29 比亚迪半导体股份有限公司 基准电压电路
CN113050747B (zh) * 2019-12-26 2022-05-20 比亚迪半导体股份有限公司 基准电压电路

Also Published As

Publication number Publication date
US6639456B2 (en) 2003-10-28
EP1282940B1 (fr) 2008-10-01
US20030071678A1 (en) 2003-04-17
DE50114371D1 (de) 2008-11-13
DE10021928A1 (de) 2001-11-15
WO2001086805A1 (fr) 2001-11-15

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