Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07745—Mounting details of integrated circuit chips
  • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
  • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
  • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
  • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
  • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
  • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
  • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
  • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
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  • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
  • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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• • H—ELECTRICITY
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  • H04B—TRANSMISSION
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  • H04B5/20—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by the transmission technique; characterised by the transmission medium
  • H04B5/24—Inductive coupling
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Definitions

• the present invention relates to an electronic micromodule comprising a support plate, an integrated circuit chip, and at least one flat winding forming an antenna coil.
• an antenna coil comprising means for receiving or transmitting data by inductive coupling in the presence of a magnetic field emitted by a radio station. transmission and / or reception of data.
• Such integrated circuits, or passive transponders make it possible to produce various portable electronic objects operating without contact, such as smart cards, electronic labels, electronic tokens, etc.
• the present invention relates to the manufacture of such portable objects, and more particularly to the manufacture of the electronic part of these portable objects.
• the most generally used method for producing the electronic part of a portable object operating without contact consists in providing a support plate on which a coil and a silicon chip are deposited. The coil is then connected to the chip and the assembly is covered with a protective resin.
• the support board is a printed circuit board.
• the coil is a copper wire bonded or an engraved copper strip. The coil / chip connection is ensured by metallic wires welded uitrasonically.
• the assembly forms an electronic micromodule intended to be introduced into the body of a portable object (plastic card, token, sticker, key, etc.) or fixed to its surface.
• This method has the disadvantage of requiring various stages of handling, of manipulation of the constituent elements ri ⁇ cromodules, assembly, wiring, control ... which add to the cost price of ir ⁇ cromodules and limit production rates.
• the printed circuit board generally has a thickness of around 150 micrometers, the silicon chip a thickness of around 150 micrometers after chemical or mechanical abrasion of its rear face, and the height of the loops formed by the wiring wires is in the range of 120 micrometers.
• the coating resin covers the wires to a thickness of 20 to 50 micrometers.
• the thickness of a conventional micromodule is of the order of 400 to 500 micrometers.
• a plastic card has a thickness of around 760 micrometers. It is therefore common for contactless smart cards incorporating this type of micromodule to have flatness defects.
• an objective of the present invention is to provide a method for the collective production of thin micromodules comprising an integrated coil and an integrated circuit, without increasing the cost price of the integrated circuits and without requiring assembly steps two to two of individual components.
• Another objective of the present invention is to provide a hybrid micromodule with two operating modes, namely a conventional operating mode by means of contact pads and a non-contact operating mode by via an antenna coil, which is compact and simple to make.
• a process for the collective production of a plurality of electronic micromodules each comprising a support plate, an integrated circuit chip comprising electrical connection pads, and at least one coil, a process comprising the steps of assembling on a support plate for a plurality of integrated circuit chips; depositing on the surface of the support plate an electrically insulating layer covering all of the chips; making in the insulating layer a plurality of openings facing the connection pads of the chips; collectively produce, on the support plate, a plurality of flat windings forming coils; connect each coil to a corresponding chip; cut the support plate to individualize the micromodules.
• connection of the coils to the chips is carried out by depositing a conductive material in the openings made in the insulating layer.
• the conductive material deposited in the openings is the conductive material forming the coils.
• the coil is produced on several conductive levels separated by insulating layers.
• the support plate is made of silicon.
• the step of depositing an insulating layer comprises a step of depositing a layer of polyimide and a step of depositing a layer of silicon oxide.
• the coils are produced by electroplating and etching a layer of copper.
• the step of cutting the support plate is preceded by a step of depositing a protective material on one of the support plate.
• the present invention also relates to an electronic micromodule comprising a support plate, an integrated circuit chip and at least one flat winding forming a coil, in which the chip is buried in at least one layer.
• electrically insulating comprising at least one layer of at least one insulating material, the coil being arranged on the insulating layer.
• the coil is connected to the chip by means of metallized openings passing through the insulating layer to reach the electrical connection areas of the chip.
• the chip is covered by at least two insulating co ⁇ .ches, one of the two insulating layers serves as a support for the winding forming a coil, and the other insulating layer serves as a support for a conductor connecting a end of the coil to a connection pad of the chip.
• the chip is covered by at least two insulating layers and the coil comprises at least two flat windings arranged respectively on each of the insulating layers.
• the present invention also relates to a hybrid micromodule comprising a support plate comprising on its front face contact pads, in which the support plate comprises on its rear face a micromodule according to the invention, the micromodule comprising an integrated circuit chip with two modes of operation, with or without contact, and an insulating layer comprising openings for connecting the chip to the contact pads.
• FIGS. 1 and 2 illustrate a first step of the method according to the invention and represent respectively by a top view and a sectional view a support plate on which are deposited silicon chips
• FIGS. 3A to 3D are partial sectional views of the support plate and illustrate other steps of the method according to the invention
• FIG. 4 is a top view of a first embodiment of a micromodule according to the invention.
• FIG. 5 is an overall view of a plurality of micromodules according to the invention, produced collectively on the aforementioned support plate,
• FIGS. 6 and 7 represent respectively by a top view and a sectional view a second embodiment of a micromodule according to the invention
• - Figures 8 and 9 respectively represent a top view and a sectional view a third embodiment of a micromodule according to the invention
• - Figures 10A and 10B respectively represent a bottom view and a top view a hybrid micromodule comprising a micromodule according to the invention and contact pads, and
• FIG. 11 is the electrical diagram in the form of blocks of an integrated circuit operating without contact and a data transmission / reception station.
• the idea of the present invention is to collectively produce coils on a support on which integrated circuit chips have previously been arranged.
• the support is distinct from the silicon wafer from which the integrated circuits were made and the process does not increase their cost price.
• the coils are made using low cost technology. After cutting the support, integrated micromodules are thus obtained at low cost price.
• a first step of the method according to the invention consists in arranging a plurality of silicon chips 1 on a support plate 2 preferably chosen to be rigid.
• the chips are fixed to the support plate 2 by any conventional means, for example by gluing, and are arranged at a distance D predetermined from each other.
• This step is preferably automated for obtaining precise positioning of the chips.
• test patterns 3 can be provided on the support plate 2.
• the silicon chips 1 are integrated circuits of the contactless type and include metallized areas 4 intended to be connected to a coil.
• the chips come from a silicon wafer airtinced by a conventional, chemical or mechanical abrasion process.
• the thickness of the chips can be chosen to be less than that of the chips mounted on printed circuit boards due to the rigidity of the support plate 2, and can be of the order of 50 to 150 micrometers.
• a plurality of integrated coils will then be produced on the support plate 2 which, with the chips 1, will form integrated micromodules of small thickness.
• the support plate 2 is here a virgin silicon wafer with a standard thickness of the order of 675 micro ⁇ iètres, which will be thinned during a final step of the manufacturing process.
• FIGS. 3A to 3C are partial sectional views of the support plate 2 illustrating various steps of the method according to the invention. The thicknesses of the various elements are not reproduced to scale for the sake of readability of the figures.
• the support plate 2 is covered by a layer 5 of polyimide.
• the polyimide is deposited in the liquid phase, then distributed on the plate 2 by centrifugation and polymerized in an oven. Depending on the viscosity of the polyimide, several stages of deposition, centrifugation and polymerization may be necessary to obtain a layer 5 completely covering the silicon chips 1.
• This step is followed by a conventional step of rectification ("planarization") of the polyimide layer 5, for example by mechanical abrasion.
• the abrasion is continued until the thickness of the polyimide layer 5 above the silicon chips 1 is fairly small, for example of the order of 10 micrometers.
• the next step consists in depositing on the rectified layer 5 a thin layer of silicon oxide 6, with a thickness of the order of 5 to 10 micrometers.
• the oxide is deposited in a conventional manner, for example in the vapor phase according to the CVD ("Chemical Vapor Deposition") technique.
• the layers of polyimide 5 and of silicon oxide 6 form only one and the same insulating layer 7 in which the chip 1 is buried. Indeed, the cumulative deposition of these two materials is a particularity of the process used here, the polyimide making it possible to produce in a short time a very thick insulating layer and the oxide serving as a support for a layer of copper deposited during a step described below.
• the insulating layer 7 is perforated to reveal openings 8 facing the metallized areas 4 of the silicon chips 1.
• the openings 8 are produced by chemical etching of the layer insulator 7, by means of an etching mask made of photosensitive resin which has previously been exposed and developed.
• a particular embodiment of this etching step consists in first etching the oxide layer 6 by means of a first etching agent which is not aggressive for the polyimide, with the interposition of an etching mask.
• the etched oxide layer is then used as an etching mask to etch the polyimide layer 5, by means of a second etching agent which is not aggressive for the oxide.
• a copper layer 9 with a thickness of the order of 20 to 50 micrometers is deposited on the insulating layer 7, for example by electrolysis.
• the copper layer 9 enters the openings 8 and adheres to the connection areas 4 of the chip 1.
• the copper layer 9 is then etched so as to reveal flat windings in the form of coils 10, each winding being connected to a chip silicon 1.
• FIG. 4 represents an example of a coil 10 produced according to the method of the invention, forming with a buried chip 1 an integrated micromodule 20.
• the coil 10 overlaps the chip 1 in a substantially offset position making it possible to make the ends of the the internal turn and the external turn with the connection pads 4 of the chip 1.
• FIG. 5 gives an overall view of the surface of the silicon wafer 2. It can be seen that one has collectively produced a plurality of micromodules 20. Before being cut into individual micromodules, the wafer 2 is preferably covered with 'a layer of protective resin, then thinned by abrasion of its rear face until a thickness of the order of 100 ri ⁇ crometers is obtained. In the end, the micromodules according to the invention have a small thickness, of the order of 200 to 300 micrometers.
• the method according to the invention makes it possible to produce integrated micromodules comparable in terms of size to those produced in one prior art on silicon wafers comprising integrated circuits.
• the surface occupied by the coils chosen according to the envisaged application, has no effect on the cost price of the integrated circuits which are produced here on an independent silicon wafer.
• the manufacturing process of the coils being significantly less expensive than the manufacturing process of integrated circuits, the cost price of the ⁇ cromodules according to the invention does not increase prohibitively as a function of the surface occupied by the coils.
• the production of a micromodule according to the invention requires in practice only 2 to 5 etching masks (depending on the embodiment chosen) while the manufacture of an integrated circuit conventionally requires around twenty engraving masks.
• the precision required for making the coils is only of the order of 1 to 2 micrometers, whereas an integrated circuit is produced today with an accuracy of less than a micrometer.
• the method according to the invention offers extensive possibilities in terms of the design of ⁇ crodules, thanks to the possibility of providing several conductive levels, here several copper levels separated by insulating layers.
• several conductive levels can be provided to increase the number of windings of the coil.
• a compromise can be made between an extension of the number of windings in the plane of the support plate and an extension of the number of windings on several conductive levels.
• Figures 6 and 7, 8 and 9 show two other examples of embodiment of micromodules according to the invention.
• the sculpture 30 illustrated in FIGS. 6 and 7 comprises a coil 31 of larger size than that of the micromodule of FIG. 4, the coil 31 surrounding here the silicon chip 1.
• the connection of the external turn of the coil 31 to the 'one of the metallized areas 4 of the silicon chip is provided by a conductive track 32 made of copper arranged on a first insulating layer 33, the coil 31 being arranged on a second insulating layer 34.
• the connection of the track 32 to the coil 31 is provided by an opening 35 in the layer 34 and its connection to the metallized area 4 is provided by an opening 36 in the layer 33.
• the internal turn of the coil 3 is connected to the other metallized area 4 by via two superimposed openings 37, 38 made in the insulating layers 33, 34.
• An alternative embodiment consists in inverting the relative positions of the coil 31 and the track 32 on each of the necks insulating shields.
• the micromodule 40 shown in Figures 8 and 9 has two insulating layers 41, 42 and a coil 43 comprising two flat windings 44, 45 superimposed and connected in series.
• the first winding 44 shown in dotted lines in FIG. 8, is deposited on the insulating layer 41.
• One of its ends is connected to a metallized pad 4 of the chip 1 via an opening 46 formed in the first insulating layer 41.
• the other end of the winding 44 is connected to one end of the second winding 45 via an opening 47 made in the second insulating layer 42.
• the other end of the winding 45 is connected to the other metallized area 4 of the chip 1 by means of two superimposed openings 48, 49 made in the two insulating layers 41, 42.
• FIGS. 10A and 10B respectively represent the rear face 60-1 and the front face 60-2 of a hybrid micromodule 60 for a smart card with two operating modes.
• the micromodule 60 comprises a support plate 61 of small thickness, for example an epoxy plate.
• a micromodule 50 according to the invention comprising a support wafer 2 and a coil 51 surrounding a silicon chip 52 buried in an insulating layer 53.
• the coil 51 produced on two first levels of the insulating layer 53, is covered by a third level of the insulating layer 53 and / or by a protective resin.
• the silicon chip 52 is an integrated circuit with two operating modes of a known type, for example that described in application WO 97/49059.
• the chip 52 thus comprises two metallized areas 4 connected to the coil 51, for the contactless operating mode, and metallized areas 54 for the contacting operating mode.
• the pads 54 are accessible through openings 55 leading to the open air, formed in the insulating layer 53 as well as, if necessary, in the protective resin.
• the pads 54 are electrically connected, via wires 62 of aluminum or gold and orifices 63 made in the support plate 61, to contact pads C1 to C6 of the ISO 7816 type. arranged on the front face 60-2 of the ⁇ cror ⁇ odule hybrid 60 ( Figure 10B).
• the micromodule 60 comprises two other areas C7 to C8 provided for by the above-mentioned standard but generally not used.
• the integrated circuit 52 can be activated via the contact pads C1 to C6 or by electromagnetic induction.
• the location occupied by the micromodule 50 on the rear face 60-1 is shown in dotted lines in FIG. 10B. It can be seen that the tracks C1 to C8 do not cover the corresponding location on the front face 60-2 so as not to form a screen for the circulation of a magnetic field in the coil 51.
• the hybrid cromodule rr 60 according to the invention thus offers good magnetic permeability and the ranges C1 to C8 do not significantly decrease the communication distance.
• the hybrid micromodule which has just been described can receive any type of micronxxrule according to the invention, for example the micromodule shown in FIG. 4 in which the coil overlaps the integrated circuit.
• the insulating layers on which the upper conductive levels of a micromodule according to the invention rest may be simple oxide layers in order to limit the number of manufacturing steps, or include an alternation of oxide layers and polyimide / oxide layers.
• the method according to the invention is not limited to the technological sector which has just been described and can be implemented with any technology making it possible to bury a silicon chip in an insulating layer, then to deposit or integrate a coil on or in the insulating layer.
• FIG. 11 very schematically represents an example of architecture of an integrated circuit IC operating without contact, communicating by electromagnetic induction with a station RD for transmitting and / or receiving data.
• the circuit IC and the station RD are each equipped with an antenna coil, respectively Lp, Ls.
• the IC circuit includes an input capacity Cp, a central unit UC to microprocessor or wired logic, a MEM memory, a diode bridge Pd, a demodulator-decoder circuit DD and a modulator-coder circuit MC.
• the input capacitance Cp forms with the coil Lp a resonant circuit LpCp of natural frequency Fp.
• the demodulator DD, the modulator MC and the diode bridge Pd are connected in parallel with the antenna circuit LpCp.
• the central unit UC communicates the data to be transmitted to the modulator circuit MC which modulates the load of the coil Lp according to the data which it receives, according to a predetermined coding.
• the load modulations are reflected by inductive coupling on the coil Ls and are detected by the station Rd.
• the extraction of the data received is ensured by an inverse demodulation and decoding operation.
• the station RD modulates the amplitude of the magnetic field as a function of the data to be transmitted, according to a predetermined coding.
• the circuit DD demodulates the voltage Vp, decodes the data received and sends them to the central unit UC, which can load them into the memory MEM.

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• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
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• Power Engineering (AREA)
• Theoretical Computer Science (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
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• 1998
  • 1998-06-29 FR FR9808426A patent/FR2780551B1/fr not_active Expired - Fee Related
• 1999
  • 1999-06-14 CN CNB998100951A patent/CN100342536C/zh not_active Expired - Fee Related
  • 1999-06-14 US US09/720,701 patent/US6319827B1/en not_active Expired - Lifetime
  • 1999-06-14 EP EP99925077A patent/EP1097479A1/de not_active Withdrawn
  • 1999-06-14 WO PCT/FR1999/001405 patent/WO2000001013A1/fr active Application Filing
  • 1999-06-14 AU AU42687/99A patent/AU4268799A/en not_active Abandoned
  • 1999-06-14 JP JP2000557500A patent/JP2002519866A/ja active Pending

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