EP0918997A1 - Configuration de circuit pour capter le courant sous charge d'un element semi-conducteur de puissance avec charge du cote source - Google Patents

Configuration de circuit pour capter le courant sous charge d'un element semi-conducteur de puissance avec charge du cote source

Info

Publication number
EP0918997A1
EP0918997A1 EP97936576A EP97936576A EP0918997A1 EP 0918997 A1 EP0918997 A1 EP 0918997A1 EP 97936576 A EP97936576 A EP 97936576A EP 97936576 A EP97936576 A EP 97936576A EP 0918997 A1 EP0918997 A1 EP 0918997A1
Authority
EP
European Patent Office
Prior art keywords
semiconductor component
load current
circuit arrangement
load
arrangement according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97936576A
Other languages
German (de)
English (en)
Inventor
Adam-Istvan Koroncai
Jenoe Tihanyi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0918997A1 publication Critical patent/EP0918997A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16504—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed
    • G01R19/16519—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed using FET's

Definitions

  • Circuit arrangement for detecting the Las current of a power semiconductor component with a load on the source side
  • the invention relates to a circuit arrangement for detecting the load current in the case of small currents of a power semiconductor component which can be controlled by a field effect according to the preamble of claim 1.
  • Such a circuit arrangement is e.g. from the article "Serviving Short Circuits" by R.Frank and A.Pshaenich, Machine Design, March 8, 1990, pages 89 to 96.
  • This article shows the principle that the load current of a power MOSFET is thereby detected can that the power MOSFET a similar, smaller in area MOSFET connected in parallel and this smaller MOSFET, the so-called “sense" -FET, a measuring resistor is connected in series on the source side. If the power FET is connected to a load on the drain side, a current flows through the further FET which is approximately proportional to the load current. The proportionality factor depends on the ratio of the current-carrying areas of the sense FET to that of the power FET. If a load current flows through the load and thus through the power FET, a part that is approximately proportional to the load current flows through the sense FET and the measuring resistor. A voltage approximately proportional to the load current can then be tapped at the measuring resistor.
  • the prerequisite is that the measuring resistor is matched to the load. With a different load, either the measuring resistance must be changed or the evaluation logic that detects the voltage.
  • the voltage drop across the power transistor is therefore measured. If this voltage drop drops below a specified value, e.g. 10 mV, a logic generated signal that reports the idle. The level of the idle threshold is therefore dependent on the on-resistance of the power transistor and is therefore inaccurate. Furthermore, the error when measuring with small load currents is getting bigger.
  • the object of the present invention is to provide a circuit arrangement for detecting the load current of a power semiconductor component with a load on the source side, with an accurate open circuit detection circuit.
  • the circuit according to the invention advantageously uses the “sense” current to determine a logic signal instead of the voltage drop.
  • control of the semiconductor switch can also be switched off in the absence of a load by the entire arrangement.
  • FIG. 1 shows a circuit arrangement according to the invention and FIG. 2 shows an embodiment for the block 5 shown in FIG. 1.
  • FIG. 1 shows a power semiconductor component in the form of a MOSFET, the drain of which is connected to a supply voltage terminal 11.
  • the source connection is connected to ground via a load 4. Furthermore is a
  • Sense-FET 2 is provided, the drain connection of which is also connected to the supply voltage terminal 11.
  • the source Connection is connected via the load path of a further MOSFET 6 to an input a of an evaluation device 5.
  • An O peration amplifier 3 is provided whose positive input is connected to the source terminal of the power MOSFET 1, and whose inverting input is connected to the source terminal of the MOSFET. 2
  • the output of the operational amplifier 3 is connected to the gate connection of the MOSFET 6.
  • the gate connections of the power MOSFET 1 and the sense MOSFET 2 are connected to one another and to the output of a charge pump 9.
  • the charge pump 9 is connected on the one hand to the supply voltage gauze 11 and is connected via a capacitor 8 to the output of an oscillator 7 which has an input which is connected to an input terminal 10.
  • the oscillator 7 is also connected to ground.
  • the evaluation device 5 is connected to the supply voltage and ground via corresponding connecting lines e and b. It also has outputs d and c, output c being connected to an output terminal 13.
  • the output d is connected to the non-inverting input of a further operational amplifier 14, the inverting input of which is connected to the source connection of the power MOSFET 1.
  • the gate connection of the power MOSFET 1 is connected to its source connection via a resistor 12.
  • the output of the operational amplifier 14 is coupled to a control input of the oscillator 7.
  • FIG. 2 shows an embodiment of the evaluation device 5 according to FIG. 1.
  • Terminal a is connected to the gate terminal and the drain terminal of a MOSFET 20. Furthermore, it is connected to the gate terminal of a MOSFET 21.
  • the drain connection of the MOSFET 21 is connected to the connection terminal e via a current source 22.
  • the connection terminal e is also connected via a resistor 23 to the drain connection of a further MOSFET 24.
  • a diode 25 is connected in parallel with the resistor 23 in the flow direction.
  • the terminal e is connected via a current source 26 to the drain connection of a MOSFET 28 and to the Output terminal c connected.
  • the source connections of the MOSFETs 20, 21, 24 and 28 are connected to the connection terminal b.
  • a zener diode 27 is connected in the reverse direction between the drain connection and the source connection of the MOSFET 28.
  • the drain of the MOSFET 21 is connected to the gate of the
  • MOSFET 24 and the gate connection of MOSFET 28 connected.
  • the drain connection of the MOSFET 24 is connected to the output terminal d.
  • Lastström a correspondingly high reference voltage and a logic signal.
  • the reference voltage is fed to the non-inverting input of the operational amplifier 14, which compares this reference voltage with the voltage drop across the load 4.
  • the oscillator 7 can be switched off by the output signal of the operational amplifier 14 in the absence of a load or in the event of a load loss.
  • the task of the evaluation device 5 is to generate a reference voltage at the output terminal d from the sense current at the input a and to generate a logic voltage for the no-load message at the output c.
  • the exemplary embodiment shown in FIG. 2 in this regard has a first comparator stage through transistors 20 and 21, which compare the incoming proportional load current with the current of current source 22.
  • the voltage drop across resistor 23 determines the reference voltage at output d.
  • the voltage drop of the power transistor 1 is corrected to this voltage.
  • the diode 25 limits the reference voltage to, for example, 0.7 V based on the supply voltage V b at the input terminal e.
  • the comparator 20, 21 switches the level auxiliary stage 26, 27, where the logic signal "No-Load" is generated. The entire circuit arrangement is therefore independent of the on-resistance of the power MOSFET 1 and therefore temperature constant.
  • the invention was explained using a high-boiling switch. However, it can also be used for a low-side switch.
  • Measuring resistor 5 remains connected on the source side of MOSFET 2.

Abstract

L'invention concerne une configuration de circuit conçue pour capter le courant sous charge d'un élément semi-conducteur (1) de puissance à commande par effet de champ, dotée d'un autre élément semi-conducteur (2) à commande par effet de champ où les raccordements de drain et de grille des deux éléments semi-conducteurs sont reliés entre eux et une fraction de courant sous charge passe par d'autres éléments semi-conducteurs; dotée également de dispositifs (3, 6) permettant de régler, en fonction de la tension drain-source des deux éléments semi-conducteurs, le passage du courant sous charge de l'élément semi-conducteur (1, 2) suivant, d'autres dispositifs (5) étant prévus pour comparer avec un courant de référence le courant sous charge (I/n) passant dans l'élément semi-conducteur (2) et émettre un signal de sortie lorsque le signal sous charge est inférieur à une valeur de réglage donnée.
EP97936576A 1996-08-14 1997-07-31 Configuration de circuit pour capter le courant sous charge d'un element semi-conducteur de puissance avec charge du cote source Withdrawn EP0918997A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19632812 1996-08-14
DE19632812 1996-08-14
PCT/DE1997/001621 WO1998007038A1 (fr) 1996-08-14 1997-07-31 Configuration de circuit pour capter le courant sous charge d'un element semi-conducteur de puissance avec charge du cote source

Publications (1)

Publication Number Publication Date
EP0918997A1 true EP0918997A1 (fr) 1999-06-02

Family

ID=7802648

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97936576A Withdrawn EP0918997A1 (fr) 1996-08-14 1997-07-31 Configuration de circuit pour capter le courant sous charge d'un element semi-conducteur de puissance avec charge du cote source

Country Status (4)

Country Link
US (1) US5986441A (fr)
EP (1) EP0918997A1 (fr)
JP (1) JP2000516338A (fr)
WO (1) WO1998007038A1 (fr)

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JP2001326567A (ja) * 2000-03-10 2001-11-22 Rohm Co Ltd Ｍｏｓｆｅｔ駆動回路
DE60238900D1 (de) * 2002-04-02 2011-02-24 Dialog Semiconductor Gmbh Leistungsschalter mit Stromabfühlschaltung
TWI249090B (en) * 2003-01-16 2006-02-11 Shindengen Electric Mfg Switching circuit
US7372685B2 (en) * 2003-05-20 2008-05-13 On Semiconductor Multi-fault protected high side switch with current sense
DE102004030129A1 (de) * 2004-06-22 2006-01-19 Robert Bosch Gmbh Schaltungsanordnung und Verfahren zur Einstellung der Leistungsaufnahme einer an einem Gleichspannungsnetz betreibbaren Last
JP4689473B2 (ja) * 2005-05-16 2011-05-25 シャープ株式会社 直流安定化電源回路
US7759908B2 (en) * 2006-12-28 2010-07-20 Draeger Medical Systems, Inc. Electronic device identification system
JP5552288B2 (ja) * 2009-10-09 2014-07-16 新日本無線株式会社 スイッチング電源装置
JP5674687B2 (ja) * 2012-01-17 2015-02-25 株式会社東芝 スイッチ回路、および電力供給装置
CN103633617B (zh) * 2013-12-02 2016-06-22 嘉兴中润微电子有限公司 一种应用于大功率电机驱动芯片的过流保护检测电路
US9360879B2 (en) * 2014-04-28 2016-06-07 Microsemi Corp.-Analog Mixed Signal Group, Ltd. Sense current generation apparatus and method
DE102014223486A1 (de) * 2014-11-18 2016-05-19 Robert Bosch Gmbh Schutzschaltung für einen Überspannungs- und/oder Überstromschutz
JP2021047057A (ja) * 2019-09-17 2021-03-25 ルネサスエレクトロニクス株式会社 半導体装置、および、パワーデバイス
DE102021206080A1 (de) * 2021-06-15 2022-12-15 Robert Bosch Gesellschaft mit beschränkter Haftung Integrierte Schaltung und Verfahren zum Begrenzen eines schaltbaren Laststroms

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NL8503394A (nl) * 1985-12-10 1987-07-01 Philips Nv Stroomaftastschakeling voor een vermogenshalfgeleiderinrichting, in het bijzonder geintegreerde intelligente vermogenshalfgeleiderschakelaar voor met name automobieltoepassingen.
GB2206010A (en) * 1987-06-08 1988-12-21 Philips Electronic Associated Differential amplifier and current sensing circuit including such an amplifier
GB2207315B (en) * 1987-06-08 1991-08-07 Philips Electronic Associated High voltage semiconductor with integrated low voltage circuitry
JPH07113861B2 (ja) * 1988-01-29 1995-12-06 株式会社日立製作所 半導体素子の状態検出及び保護回路とそれを用いたインバータ回路
GB2217938A (en) * 1988-04-29 1989-11-01 Philips Electronic Associated Current sensing circuit
EP0365697B1 (fr) * 1988-10-25 1993-07-28 Siemens Aktiengesellschaft Circuit pour détecter la rupture d'un circuit composé d'une charge en série avec un interrupteur électronique
US4914542A (en) * 1988-12-27 1990-04-03 Westinghouse Electric Corp. Current limited remote power controller
FR2642176B1 (fr) * 1989-01-20 1991-05-03 Sgs Thomson Microelectronics Dispositif et procede de detection du passage d'un courant dans un transistor mos
IT1238305B (it) * 1989-11-30 1993-07-12 Sgs Thomson Microelectronics "circuito di rilevamento della corrente in un transistore di potenza di tipo mos"
US5164659A (en) * 1991-08-29 1992-11-17 Warren Schultz Switching circuit
US5220207A (en) * 1991-09-03 1993-06-15 Allegro Microsystems, Inc. Load current monitor for MOS driver
JP3080823B2 (ja) * 1993-10-15 2000-08-28 モトローラ株式会社 半導体集積回路装置

Non-Patent Citations (1)

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Title
See references of WO9807038A1 *

Also Published As

Publication number Publication date
WO1998007038A1 (fr) 1998-02-19
US5986441A (en) 1999-11-16
JP2000516338A (ja) 2000-12-05

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