EP0910906A1 - Systeme de traitement numerique de signaux pour transmettre un signal numerique multiplexe par repartition de frequence (mrf) - Google Patents

Systeme de traitement numerique de signaux pour transmettre un signal numerique multiplexe par repartition de frequence (mrf)

Info

Publication number
EP0910906A1
EP0910906A1 EP97932740A EP97932740A EP0910906A1 EP 0910906 A1 EP0910906 A1 EP 0910906A1 EP 97932740 A EP97932740 A EP 97932740A EP 97932740 A EP97932740 A EP 97932740A EP 0910906 A1 EP0910906 A1 EP 0910906A1
Authority
EP
European Patent Office
Prior art keywords
complex
signal processing
processing device
digital signal
dfm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97932740A
Other languages
German (de)
English (en)
Inventor
Heinz Goeckler
Karlheinz Grotz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP0910906A1 publication Critical patent/EP0910906A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J1/00—Frequency-division multiplex systems
    • H04J1/02—Details
    • H04J1/04—Frequency-transposition arrangements
    • H04J1/05—Frequency-transposition arrangements using digital techniques

Definitions

  • the invention relates to a digital signal processing device for transmitting a frequency multiplex signal (FDM signal), with two DFM circuits (digital frequency multiplexers), each of which is supplied with a plurality of channels, in particular television and radio channels, and each one Generate subband comprehensive FDM signal.
  • FDM signal frequency multiplex signal
  • DFM circuits digital frequency multiplexers
  • DFMs are currently being used, to which only half the number of channels, namely 32, are fed. This results in a total bandwidth of the combined signal of 224 MHz.
  • the sampling frequency to be observed is consequently 448 MHz, which is already technologically feasible today.
  • the digital signal processing device with the features of claim 1 has the advantage that a doubling of the transmission bandwidth is possible immediately after the availability of the fast digital / analog converter, without having to replace the very expensive DFM's on the transmitter side. Because the transmitter-side, digital signal processing device has a transmission interface circuit which combines the individual signals of the existing DFMs and feeds them into a common optical fiber, the higher transmission bandwidth can be used on the one hand, but without having to replace the DFMs on the other hand.
  • the DFMs are preferably suitable for the transmission of 32 individual channels with a total bandwidth of approximately 224 MHz.
  • a signal of a DFM comprising a subband is first fed as a real-value signal to a complex half-band filter, which in turn feeds its complex-value output signal to a complex adder.
  • the adder receives a complex signal indirectly or directly from a second complex half-band filter. If the subbands are already in the desired frequency position, the adder can immediately follow the second half-band filter. If, on the other hand, a frequency conversion of the second subband is required, then the second complex halfband filter is first followed by a complex mixer which shifts the frequency position of the output signal of the halfband filter comprising the second subband.
  • the second complex half-band filter is fed by another DFM.
  • the output signal of the adder is then fed to a further complex half-band filter for doubling the sampling rate, of whose complex output signal only the real-valued signal component is passed on (real or imaginary part of the complex output signal).
  • the frequency conversion of the subband does not take place after the first complex half-band filter, but before it.
  • the two complex half-band filters upstream of the adder can share the state memory, that is to say they can use the same state memories.
  • Significant effort can be saved.
  • a further advantageous embodiment variant provides that subordinate complex half-band filters for doubling the sampling rate are split into two corresponding half-band filters, one half-band filter in each case being assigned to a processing branch, that is to say a sub-band signal.
  • the preprocessing of the two subband signals corresponds to the previously mentioned methods.
  • the two real-value output signals of the two branches are then fed to a real adder and combined there.
  • a further embodiment variant is particularly advantageous with regard to the computing effort.
  • This embodiment variant provides for combining the two subordinate complex half-band filters described above with sampling rate doubling to form a complex half-band filter filter. This saves a large number of multipliers in particular.
  • Figure 1 is a schematic representation of a digital signal processing device
  • Figure 2a shows a first embodiment of a transmission interface circuit
  • Figure 2b is a spectral representation of the signal processing of the first embodiment
  • Figure 3a shows a second embodiment of a transmission interface circuit
  • FIG. 3b shows the spectral representation of the transmission interface circuit according to FIG. 3a
  • Figure 4a shows a transmission interface circuit according to a third exemplary embodiment
  • FIG. 4b the associated spectral representation
  • FIG. 5a shows a transmission interface circuit according to a further exemplary embodiment
  • FIG. 5b shows a possible implementation of the filter switch according to FIG. 5a
  • FIG. 6 shows a transmission interface circuit according to a further exemplary embodiment
  • FIG. 7 shows a transmission interface circuit according to a further exemplary embodiment.
  • FIG. 1 shows a digital signal processing device 1 with a dashed border, which has two DFM circuits 3, 5 and an FDM (Frequency Division Multiplex) interface circuit 7 has.
  • FDM Frequency Division Multiplex
  • the DFM circuit 3 processes a number of 32 equivalent TV channels, each with a bandwidth of 7 MHz, to form an FDM signal with a bandwidth of 224 MHz, which is fed to the FDM interface circuit 7 via a line 9.
  • the second DFM circuit 5 also processes 32 individual channels, whereby of course not only television but also radio channels can be processed.
  • the corresponding output signal likewise with a bandwidth of approximately 224 MHz, is fed to a further input of the FDM interface circuit 7 via a line 11.
  • the FDM interface circuit 7 now processes the two input signals in such a way that a single FDM signal with 64 frequency slots of 7 MHz arises. This 64-channel FDM-PCM signal is then transmitted via a fiber optic line 13 to a receiver 15.
  • the digital FDM-PCM signal is converted by a digital / analog converter 17.
  • the sampling rate required by the sampling theorem is 896 MHz.
  • a digital / analog converter with this sampling rate is not yet feasible at the moment, but it can certainly be expected in the next few years.
  • the channels processed by the DFM 3 are usually transmitted in the normal position, while the channels of the second sub-band are transmitted by the DFM 5 in the inverted position.
  • the first exemplary embodiment shown in FIG. 2 shows a first complex half-band filter 19 which is connected to the DFM 3 via the line 9. This half-band filter 19 thus processes the sub-band TB1.
  • Another complex half-band filter 21 is connected to the other DFM 5 via line 11. This half-band filter processes the sub-band TB2.
  • the complex-valued output signal s_ ⁇ _ (2kT) of the first half-band filter 19 is fed to an adder 23, while the likewise complex-valued output signal ⁇ _
  • _ 2 - 2 ⁇ ⁇ ) of the second half-band filter 21 initially by means of a complex mixer 25 by a frequency f of approximately -36. 42 MHz at a sampling frequency f A 452.42 MHz is frequency shifted.
  • the sum signal s (2 kT) is fed to a downstream complex half-band filter 27 which doubles the sampling rate and outputs a real-value signal s (kT).
  • a corresponding spectral diagram is shown in FIG. 2b for clarification. This clearly shows that the first subband S ] ⁇ is transmitted in control position R with a frequency range from 47 to 216 MHz. To filter out this frequency range, the complex half-band filter 19 has a center frequency f of 1/4 f and blocks from a frequency of 236 MHz.
  • the frequency range from 252 MHz to 434 MHz of the second subband S ' 2 is filtered out by the complex half-band filter 21 and shifted downward by a frequency ⁇ f.
  • the composite signal spectrum S supplied by the adder 23 is then shown below, the downstream complex half-band filter 27 filtering out the lower spectral range from 47 MHz to 398 MHz.
  • the lower diagram shows the real-value signal spectrum S present at the output of the FDM interface circuit, which is a mirror image of f A / 2.
  • FIG. 3a shows a second exemplary embodiment, which essentially corresponds to the aforementioned first exemplary embodiment. Therefore, a more detailed description is omitted.
  • the two complex half-band filters 19, 21 can be arranged such that they share state memories, that is to say use the same state memory. This leads to a further saving of effort.
  • FIG. 4a shows a further third exemplary embodiment of an FDM interface circuit 7.
  • the preprocessing of the real-value signals S j ⁇ kT) and s 2 ( 2 kT) is carried out in accordance with the first exemplary embodiment using two complex half-band filters 19 and 21, the complex-valued signal ⁇ _! _ 2 (2kT) of the second half-band filter 21 is shifted in frequency in the mixer 25 by the frequency ⁇ f.
  • the further processing of the two complex signals Signale j _ (2kT) and and s (2kT) takes place in each case with a complex half-band filter 31 or 33, which, as it were, carry out a sampling rate doubling.
  • Their real-value output signals (kT) and s 2 (kT) are fed to an adder 35 and combined there to form a signal s (kT).
  • FIG. 5a shows a fourth exemplary embodiment of an FDM interface circuit 7.
  • the signals s 1 (2kT) and s 2 (2kT) of the subbands TB1 and TB2 are processed by complex half-band filters 19 and 21, the output signal s_ 2 - 2k ⁇ ) being shifted by the mixer 25 by the frequency ⁇ f.
  • the two complex signals s_ ⁇ _ (2kT) and s 2 (2kT) are then supplied to a filter switch 37 in contrast to the exemplary embodiments shown.
  • a filter switch 37 in contrast to the exemplary embodiments shown.
  • Such a combination of two half band filters, as shown in FIG. 4a, shown as 31, 33, is possible if the two half-band filters have the same coefficients, apart from a few signs. Such an implementation enables the interface circuit to be further minimized.
  • FIG. 5b shows an example of a possibility for designing the filter switch 37. It is a canonical structure with a minimal number of state memories. A more detailed description should not be given here. Rather, for inclusion in the disclosure, the patent DE 36 10 195 C2 and the patent application "digital filter filter” from Robert Bosch GmbH from the same day are expressly referred to.
  • FIG. 6 Another exemplary embodiment is shown in FIG. 6. This corresponds essentially to the exemplary embodiment according to FIG. 4a, but the upper processing branch relating to the subband TB1 operates purely as a real value.
  • a real half-band filter 39 takes on the one hand the filtering of the signal S] _ and on the other hand the sampling rate doubling.
  • the two output signals of the half-band filters 33 and 39 are combined via an adder 35 to form a common real-value signal s (kT).
  • the real half-band filter 39 has twice the number Coefficients, which leads to a doubling of the effort.
  • the sixth exemplary embodiment shown in FIG. 7 differs from the fourth exemplary embodiment according to FIG. 5a only in that the subband TB1 is not fed in the desired frequency position. For this reason, a complex mixer 51 is assigned to the complex half-band filter 19.
  • this additional mixer 51 can also be used in all of the above-mentioned exemplary embodiments, provided that the subband TB1 is not in the desired frequency position.

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

L'invention concerne un système de traitement numérique de signaux pour transmettre un signal numérique MRF. Ledit système comprend au moins deux circuits MRF (3, 5) vers chacun desquels conduisent une pluralité de canaux et qui produisent chacun un signal MRF comprenant une sous-bande. Ce système est caractérisé par un circuit d'interface de transmission (7) qui est monté en aval des circuits MRF (3, 5) et réunit les signaux MRF de sortie des circuits MRF en un seul signal MRF pour la transmission.
EP97932740A 1996-07-10 1997-07-04 Systeme de traitement numerique de signaux pour transmettre un signal numerique multiplexe par repartition de frequence (mrf) Withdrawn EP0910906A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19627786 1996-07-10
DE1996127786 DE19627786A1 (de) 1996-07-10 1996-07-10 Digitale Signalverarbeitungseinrichtung
PCT/DE1997/001419 WO1998001969A1 (fr) 1996-07-10 1997-07-04 Systeme de traitement numerique de signaux pour transmettre un signal numerique multiplexe par repartition de frequence (mrf)

Publications (1)

Publication Number Publication Date
EP0910906A1 true EP0910906A1 (fr) 1999-04-28

Family

ID=7799436

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97932740A Withdrawn EP0910906A1 (fr) 1996-07-10 1997-07-04 Systeme de traitement numerique de signaux pour transmettre un signal numerique multiplexe par repartition de frequence (mrf)

Country Status (3)

Country Link
EP (1) EP0910906A1 (fr)
DE (1) DE19627786A1 (fr)
WO (1) WO1998001969A1 (fr)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1132026B (it) * 1980-07-30 1986-06-25 Telettra Lab Telefon Apparato per multiplazione in frequenza a banda laterale unica e a mezzo di elaborazione numerica
DE4337136C1 (de) * 1993-10-30 1995-01-19 Ant Nachrichtentech Verfahren zur Erzeugung eines FDM-Signals
JPH0884049A (ja) * 1994-09-14 1996-03-26 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk ディジタル処理信号分割器及びディジタル処理信号合成器

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9801969A1 *

Also Published As

Publication number Publication date
DE19627786A1 (de) 1998-01-15
WO1998001969A1 (fr) 1998-01-15

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