EP0734643A1 - Datenverarbeitungsvorrichtung - Google Patents
DatenverarbeitungsvorrichtungInfo
- Publication number
- EP0734643A1 EP0734643A1 EP94929254A EP94929254A EP0734643A1 EP 0734643 A1 EP0734643 A1 EP 0734643A1 EP 94929254 A EP94929254 A EP 94929254A EP 94929254 A EP94929254 A EP 94929254A EP 0734643 A1 EP0734643 A1 EP 0734643A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- cables
- electrical
- multiplicity
- lines
- connector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/409—Mechanical coupling
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1438—Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
- H05K7/1439—Back panel mother boards
- H05K7/1442—Back panel mother boards with a radial structure
Definitions
- a connector structure and a novel arrangement of a multiplicity of said connector structures, for shortening the physical and electri ⁇ cal distances between adjacent printed circuit (hereinafter "PC") boards mounting integrated circuit (hereinafter “IC”) chips. Further, it includes a connector for connecting flex ⁇ ible ribbon connector cables between such boards, and for a novel arrangement of a multiplicity of connectors to increase processing rates for said sub-nanosecond electrical signals.
- PC printed circuit
- IC integrated circuit
- Heuer 2,971,179 discloses a female connector for re ⁇ ceiving PC boards or flexible flat cables. The structure of the present invention is distinguishable.
- Roberts et al 4,740,867 discloses a female connector for connecting a flexible flat ribbon cable to a PC board.
- the present invention is distinguishable.
- Takashima 5,301,089 discloses an arrangement of PC boards around a radial bus assembly which contains a cross-bar switch distributing signals to the various PC boards.
- a cross ⁇ bar switch is not an equivalent of the structure of the pre ⁇ sent invention.
- the female connector for receiving a thin flat connector such as the edge of a PC board or the end of a flat flexible ribbon cable.
- the female connector is comprised of two halves which are mirror images of each other. Each half includes a body of two parallel longitudinal members each having a foot end and a head end. Each foot end has a toe portion which extends out ⁇ wardly from the longitudinal body, and the toe portions of the two halves are abutted to one another to form the connector.
- FIG. 2A discloses a 'star' or 'asterisk' structure, the primary structure of the present invention.
- the structure can be obtained by any of several fab ⁇ rication techniques. These can range from a simple soldered or welded connection of a multiplicity N of central coaxial con ⁇ ductors 20A . . . 2ON arranged symmetrically about common point 12, to a machined fixture with coaxial connectors incor ⁇ porating the basic structure therein, and even including a star or asterisk structure fabricated by integrated circuit technology on an IC microchip. Upon reflection, it will be realized by those skilled in the art that signal lead-lengths can be obtained which are extremely short, and that process ⁇ ing rates can be achieved that are as great as twenty times those presently available.
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US1994/010593 WO1996009750A1 (en) | 1994-09-20 | 1994-09-20 | Data processing device |
BR9408102A BR9408102A (pt) | 1994-09-20 | 1994-09-20 | Estruturas para obter reflexões reduzidas em um ponto comum a partir de qualquer uma de uma multiplicidade de linhas de sinal para fazer a conexão juntando em um ponto comum uma multiplicidade de linhas de sinal e para distribuir sinais elétricos e conector elétrico |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0734643A1 true EP0734643A1 (de) | 1996-10-02 |
EP0734643A4 EP0734643A4 (de) | 1997-04-02 |
Family
ID=25664640
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94929254A Ceased EP0734643A4 (de) | 1994-09-20 | 1994-09-20 | Datenverarbeitungsvorrichtung |
Country Status (13)
Country | Link |
---|---|
EP (1) | EP0734643A4 (de) |
JP (1) | JPH09510044A (de) |
AU (1) | AU3464495A (de) |
BR (1) | BR9408102A (de) |
CZ (1) | CZ180196A3 (de) |
FI (1) | FI962098A (de) |
HR (1) | HRP950481A2 (de) |
IL (1) | IL115140A (de) |
NO (1) | NO962013L (de) |
SK (1) | SK81696A3 (de) |
TR (1) | TR199501141A2 (de) |
WO (1) | WO1996009750A1 (de) |
ZA (1) | ZA957230B (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19954942A1 (de) * | 1999-11-16 | 2001-05-17 | Cellware Breitband Technologie | Verfahren und Vorrichtung zur Verbindung von EDV-Modulen mit einem Bus-Controller |
JP5297326B2 (ja) * | 2009-10-08 | 2013-09-25 | 富士通コンポーネント株式会社 | 雄コネクタ、コネクタ及びバックプレーン |
JP5705601B2 (ja) * | 2011-03-16 | 2015-04-22 | 古河電気工業株式会社 | 分岐コネクタ |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3727168A (en) * | 1971-11-08 | 1973-04-10 | Amp Inc | Flat cable harness |
US5119273A (en) * | 1990-01-29 | 1992-06-02 | The United States Of America As Represented By The Secretary Of The Navy | High speed parallel backplane |
EP0506224A2 (de) * | 1991-03-26 | 1992-09-30 | International Business Machines Corporation | Rechnersystemgehäuse |
US5346117A (en) * | 1993-07-27 | 1994-09-13 | International Business Machines Corporation | Method of fabricating a parallel processor package |
US5548734A (en) * | 1993-03-26 | 1996-08-20 | Intel Corporation | Equal length symmetric computer bus topology |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4679872A (en) * | 1986-01-27 | 1987-07-14 | Coe Larry D | Cylindrical back plane structure for receiving printed circuit boards |
US5210682A (en) * | 1990-10-19 | 1993-05-11 | Graphico Co., Ltd. | Radial type of parallel system bus structure having pairs of conductor lines with impedance matching elements |
JP2700837B2 (ja) * | 1990-10-19 | 1998-01-21 | 株式会社 グラフィコ | 放射型・パラレル・システムバスにおける基板接続装置 |
-
1994
- 1994-09-20 AU AU34644/95A patent/AU3464495A/en not_active Abandoned
- 1994-09-20 WO PCT/US1994/010593 patent/WO1996009750A1/en not_active Application Discontinuation
- 1994-09-20 EP EP94929254A patent/EP0734643A4/de not_active Ceased
- 1994-09-20 BR BR9408102A patent/BR9408102A/pt not_active IP Right Cessation
- 1994-09-20 JP JP8510833A patent/JPH09510044A/ja active Pending
- 1994-09-20 CZ CZ961801A patent/CZ180196A3/cs unknown
- 1994-09-20 SK SK816-96A patent/SK81696A3/sk unknown
-
1995
- 1995-08-29 ZA ZA957230A patent/ZA957230B/xx unknown
- 1995-09-01 IL IL11514095A patent/IL115140A/xx not_active IP Right Cessation
- 1995-09-18 HR HRPTC/US94/10593A patent/HRP950481A2/hr not_active Application Discontinuation
- 1995-09-19 TR TR95/01141A patent/TR199501141A2/xx unknown
-
1996
- 1996-05-15 NO NO962013A patent/NO962013L/no not_active Application Discontinuation
- 1996-05-17 FI FI962098A patent/FI962098A/fi unknown
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3727168A (en) * | 1971-11-08 | 1973-04-10 | Amp Inc | Flat cable harness |
US5119273A (en) * | 1990-01-29 | 1992-06-02 | The United States Of America As Represented By The Secretary Of The Navy | High speed parallel backplane |
EP0506224A2 (de) * | 1991-03-26 | 1992-09-30 | International Business Machines Corporation | Rechnersystemgehäuse |
US5548734A (en) * | 1993-03-26 | 1996-08-20 | Intel Corporation | Equal length symmetric computer bus topology |
US5346117A (en) * | 1993-07-27 | 1994-09-13 | International Business Machines Corporation | Method of fabricating a parallel processor package |
Non-Patent Citations (2)
Title |
---|
IEICE TRANSACTIONS ON ELECTRONICS, vol. E77-C, no. 10, 1 October 1994, pages 1694-1701, XP000496095 SASAKI S ET AL: "HIGH-DENSITY, HIGH-PIN-COUNT FLEXIBLE SMD CONNECTOR FOR HIGH-SPEED DATA BUS" * |
See also references of WO9609750A1 * |
Also Published As
Publication number | Publication date |
---|---|
AU3464495A (en) | 1996-04-09 |
BR9408102A (pt) | 1997-08-05 |
SK81696A3 (en) | 1997-06-04 |
NO962013L (no) | 1996-06-28 |
ZA957230B (en) | 1997-02-28 |
FI962098A (fi) | 1996-07-17 |
WO1996009750A1 (en) | 1996-03-28 |
HRP950481A2 (en) | 1997-06-30 |
TR199501141A2 (tr) | 1996-06-21 |
IL115140A (en) | 2000-09-28 |
FI962098A0 (fi) | 1996-05-17 |
JPH09510044A (ja) | 1997-10-07 |
EP0734643A4 (de) | 1997-04-02 |
IL115140A0 (en) | 1995-12-31 |
CZ180196A3 (en) | 1997-06-11 |
NO962013D0 (no) | 1996-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LI NL PT SE |
|
17P | Request for examination filed |
Effective date: 19960927 |
|
A4 | Supplementary search report drawn up and despatched | ||
AK | Designated contracting states |
Kind code of ref document: A4 Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LI NL PT SE |
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17Q | First examination report despatched |
Effective date: 19980707 |
|
GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
18R | Application refused |
Effective date: 20010723 |