FI962098A - Tietojenkäsittelylaite - Google Patents

Tietojenkäsittelylaite Download PDF

Info

Publication number
FI962098A
FI962098A FI962098A FI962098A FI962098A FI 962098 A FI962098 A FI 962098A FI 962098 A FI962098 A FI 962098A FI 962098 A FI962098 A FI 962098A FI 962098 A FI962098 A FI 962098A
Authority
FI
Finland
Prior art keywords
data processing
processing device
data
processing
Prior art date
Application number
FI962098A
Other languages
English (en)
Swedish (sv)
Other versions
FI962098A0 (fi
Inventor
Peter M Compton
Original Assignee
Peter M Compton
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Peter M Compton filed Critical Peter M Compton
Publication of FI962098A0 publication Critical patent/FI962098A0/fi
Publication of FI962098A publication Critical patent/FI962098A/fi

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/409Mechanical coupling
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/14Mounting supporting structure in casing or on frame or rack
    • H05K7/1438Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1439Back panel mother boards
    • H05K7/1442Back panel mother boards with a radial structure

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Electronic Switches (AREA)
FI962098A 1994-09-20 1996-05-17 Tietojenkäsittelylaite FI962098A (fi)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/US1994/010593 WO1996009750A1 (en) 1994-09-20 1994-09-20 Data processing device
BR9408102A BR9408102A (pt) 1994-09-20 1994-09-20 Estruturas para obter reflexões reduzidas em um ponto comum a partir de qualquer uma de uma multiplicidade de linhas de sinal para fazer a conexão juntando em um ponto comum uma multiplicidade de linhas de sinal e para distribuir sinais elétricos e conector elétrico

Publications (2)

Publication Number Publication Date
FI962098A0 FI962098A0 (fi) 1996-05-17
FI962098A true FI962098A (fi) 1996-07-17

Family

ID=25664640

Family Applications (1)

Application Number Title Priority Date Filing Date
FI962098A FI962098A (fi) 1994-09-20 1996-05-17 Tietojenkäsittelylaite

Country Status (13)

Country Link
EP (1) EP0734643A4 (fi)
JP (1) JPH09510044A (fi)
AU (1) AU3464495A (fi)
BR (1) BR9408102A (fi)
CZ (1) CZ180196A3 (fi)
FI (1) FI962098A (fi)
HR (1) HRP950481A2 (fi)
IL (1) IL115140A (fi)
NO (1) NO962013L (fi)
SK (1) SK81696A3 (fi)
TR (1) TR199501141A2 (fi)
WO (1) WO1996009750A1 (fi)
ZA (1) ZA957230B (fi)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19954942A1 (de) * 1999-11-16 2001-05-17 Cellware Breitband Technologie Verfahren und Vorrichtung zur Verbindung von EDV-Modulen mit einem Bus-Controller
JP5297326B2 (ja) * 2009-10-08 2013-09-25 富士通コンポーネント株式会社 雄コネクタ、コネクタ及びバックプレーン
JP5705601B2 (ja) * 2011-03-16 2015-04-22 古河電気工業株式会社 分岐コネクタ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE791001A (fr) * 1971-11-08 1973-05-07 Amp Inc Cable electrique plat
US4679872A (en) * 1986-01-27 1987-07-14 Coe Larry D Cylindrical back plane structure for receiving printed circuit boards
US5119273A (en) * 1990-01-29 1992-06-02 The United States Of America As Represented By The Secretary Of The Navy High speed parallel backplane
US5210682A (en) * 1990-10-19 1993-05-11 Graphico Co., Ltd. Radial type of parallel system bus structure having pairs of conductor lines with impedance matching elements
JP2700837B2 (ja) * 1990-10-19 1998-01-21 株式会社 グラフィコ 放射型・パラレル・システムバスにおける基板接続装置
EP0506224A3 (en) * 1991-03-26 1994-05-11 Ibm Computer system package
US5548734A (en) * 1993-03-26 1996-08-20 Intel Corporation Equal length symmetric computer bus topology
US5346117A (en) * 1993-07-27 1994-09-13 International Business Machines Corporation Method of fabricating a parallel processor package

Also Published As

Publication number Publication date
EP0734643A4 (en) 1997-04-02
AU3464495A (en) 1996-04-09
WO1996009750A1 (en) 1996-03-28
FI962098A0 (fi) 1996-05-17
EP0734643A1 (en) 1996-10-02
TR199501141A2 (tr) 1996-06-21
NO962013D0 (no) 1996-05-15
IL115140A0 (en) 1995-12-31
ZA957230B (en) 1997-02-28
SK81696A3 (en) 1997-06-04
NO962013L (no) 1996-06-28
BR9408102A (pt) 1997-08-05
IL115140A (en) 2000-09-28
HRP950481A2 (en) 1997-06-30
JPH09510044A (ja) 1997-10-07
CZ180196A3 (en) 1997-06-11

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