EP0715240A1 - Spannungsregler für Logikschaltung in gekoppeltem Betriebszustand - Google Patents

Spannungsregler für Logikschaltung in gekoppeltem Betriebszustand Download PDF

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Publication number
EP0715240A1
EP0715240A1 EP95410136A EP95410136A EP0715240A1 EP 0715240 A1 EP0715240 A1 EP 0715240A1 EP 95410136 A EP95410136 A EP 95410136A EP 95410136 A EP95410136 A EP 95410136A EP 0715240 A1 EP0715240 A1 EP 0715240A1
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EP
European Patent Office
Prior art keywords
voltage
source
transistor
current
current source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP95410136A
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English (en)
French (fr)
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EP0715240B1 (de
Inventor
Didier Belot
Patrick Bernard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
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STMicroelectronics SA
SGS Thomson Microelectronics SA
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Publication of EP0715240A1 publication Critical patent/EP0715240A1/de
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00—Electricity: power supply or regulation systems
    • Y10S323/907—Temperature compensation of semiconductor

Definitions

  • the present invention relates to a reference voltage source intended to control a current source of a logic circuit in coupled mode (CML). It applies more particularly to the production of a voltage regulator intended to operate under a low supply voltage of 3 volts.
  • CML logic circuit in coupled mode
  • Logic circuits in coupled mode essentially fall into two categories.
  • Logic circuits with coupled transmitters ECL are produced from bipolar transistors.
  • Logic circuits with coupled sources SCL are produced from MOS transistors.
  • any logic circuit it is sought to obtain the lowest possible supply voltage in order to generate minimum energy consumption.
  • the minimum value of the supply voltage is limited by the circuits used to supply the current sources of the logic circuit with a stable reference voltage in the event of a variation in the supply voltage Vcc or in the operating temperature. This is to keep the input or output level difference of a logic gate constant.
  • This difference can be expressed for an ECL logic as being the potential difference ⁇ V between two complementary outputs of the logic gate.
  • SCL logic this difference can be expressed as the potential difference ⁇ V between two complementary inputs of the logic gate.
  • the difference ⁇ V between two levels of a logic gate whether it is an ECL or SCL logic is for example 0.4 volts.
  • logic circuits The choice between the two technologies (bipolar or MOS) of logic circuits depends on the destination of the circuit. For example, if the switching speed of the logic gates is favored, they are generally made in logic with coupled transmitters.
  • bipolar transistors for the ECL logic
  • MOS transistors for the SCL logic
  • known regulators using bipolar transistors do not allow the supply voltage to be reduced to a value of the order of 3 volts.
  • the invention aims to propose a voltage regulator produced in BICMOS technology which can be intended for current sources of an ECL or SCL logic circuit while allowing a low supply voltage of approximately 3 volts.
  • the present invention provides a voltage regulator intended to control at least one current source of at least one logic gate in coupled mode and which comprises a first current source produced in bipolar technology mounted between ground and a first resistor connected to a supply voltage, said first source being controlled by the voltage across a second resistor which is crossed by a current supplied by a second current source produced in MOS technology, the value of the current of said second source determining the potential of a regulator output terminal by reproduction of this current on a third current source mirrored on the second source.
  • said second current source consists of a P-channel MOS transistor whose source is connected to the supply voltage, the gate of which is connected to its own drain and to the gate of a P channel MOS transistor constituting the third current source, the drain of said MOS transistor of the third current source constituting the output terminal of the regulator.
  • the regulator comprises a first voltage source produced in bipolar technology and connected in series with a second voltage source of opposite direction allowing the transfer of the voltage across the terminals of the first current source to the second resistance terminals.
  • the regulator further comprises switches for removing any energy consumption from the regulator outside of its periods of use.
  • said first current source consists of two bipolar NPN type transistors mounted in mirror, the emitter of a first transistor being connected to ground via two resistors mounted in series while the emitter of a second transistor is connected to the connection point between said two resistors, the bases of the two transistors constituting a control terminal of the current source while the collector of the second transistor constitutes an output terminal connected to the first voltage source.
  • said first voltage source consists of a PNP type bipolar transistor whose collector is connected to ground, the base of which is connected to the second transistor of the first current source and the emitter of which is connected to the gate of an N-channel MOS transistor constituting the second voltage source, the source of said MOS transistor of the second voltage source being connected to ground while its drain is connected to the drain of the MOS transistor of the second current source.
  • the regulator further comprises three P-channel MOS transistors whose sources are connected to the supply voltage by means of a first switch, whose gates are connected to a device starting aid and whose drains are respectively connected to the collectors of the transistors of the first current source and to the emitter of the transistor constituting the first voltage source.
  • a current source of a logic gate consists of an N-channel MOS transistor with gate and drain connected, the drain of said transistor being connected to the output terminal of the regulator and its source being connected to ground.
  • the regulator comprises a voltage-current converter mounted between the output terminal of the regulator and the ground, said converter consisting of a bipolar transistor of NPN type whose emitter is connected to the ground via a resistor and the collector of which is connected to said output terminal; a current source of a logic gate consisting of a bipolar NPN type transistor whose emitter is connected to ground via a resistor and which is mirrored on the transistor of said voltage-current converter .
  • the regulator further comprises an NPN bipolar transistor for compensating the base currents of the current source of the logic gate, the base of said compensation transistor being connected to the output terminal. of the regulator while its collector is connected to the supply voltage and its emitter is connected to the base of the transistor of said voltage-current converter.
  • a voltage regulator according to the invention as shown in FIG. 1 comprises a first current source 11 controlled by the voltage across a resistor R21 placed between the ground and a node C of the circuit.
  • the source 11 produced in bipolar technology, is placed between ground and a first voltage source 12 which is connected to the supply voltage via a resistor R22.
  • the connection node between the resistor R22 and the voltage source 12 is connected to the node C via a second voltage source 13.
  • the node C is connected to the supply voltage Vcc via a second current source 14 produced in MOS technology.
  • a third current source 15, also in MOS technology is mirrored on the source 14 and is connected to an output terminal S of the regulator.
  • the value of the output voltage Vcs on the terminal S is fixed by the value of the resistor R21 and of the current I supplied by the current source 14 and mirrored on the source 15.
  • the potential of the output terminal S is equal to the potential of the node C which corresponds to the product of the resistance R21 by the current I.
  • the potential of the node C is regulated according to the temperature by means of the source 11 In addition, this potential being fixed by the source 11 relative to the ground, it is independent of the supply voltage Vcc.
  • the role of the voltage source 12 is to compensate for the voltage drop provided by the source 13 which constitutes a voltage follower making it possible to transfer the voltage across the terminals of the source 11 to the node C.
  • a change in temperature results in a change in the value of resistance R21.
  • This variation is compensated by a variation of the potential of the node C via the source 11.
  • the potential Vcs of the output terminal S delivered at the terminals of a load Q is independent of the temperature and the voltage d '' Vcc power supply.
  • the minimum supply voltage of the regulator according to the invention may be low, as will be shown in relation to each of the embodiments described below.
  • An advantage of the present invention is that such a regulator can be used to control current sources which are produced either in bipolar technology or in MOS technology.
  • the invention provides for an adaptation of the output of the device to allow current control from the source 15 which is in MOS technology.
  • Figure 3 illustrates this application.
  • Figure 2 shows the diagram of a regulator as shown in Figure 1 for the control of sources of current of a logic circuit based on MOS transistors.
  • the current source 11 consists of two bipolar NPN transistors T11 and T12 linked by a surface factor and the bases of which are connected together and to a first terminal of the resistor R21.
  • the other terminal of resistor R21 is connected to ground.
  • the emitter of transistor T11 is connected to ground via two resistors R23 and R24 connected in series. The link between these two resistors is connected to the emitter of transistor T12.
  • the collectors of the transistors T11 and T12 are respectively connected to the drains of two P-channel MOS transistors MP11 and MP12, the gates of which are connected together and to the drain of the transistor MP11.
  • the sources of the transistors MP11 and MP12 are connected together to the supply voltage Vcc via a first switch 16 whose role will be explained below.
  • the collector of transistor T12 which constitutes the output of the current source 11 is connected to the base of a bipolar transistor T13 of PNP type constituting the voltage source 12.
  • the collector of transistor T12 is connected to ground and its emitter is connected to the drain of a P-channel MOS transistor MP13 as well as to the gate of an N-channel MOS transistor MN13.
  • the transistors MP11, MP12 and MP13 correspond to the resistor R22 symbolized in FIG. 1.
  • the gate of the transistor MP13 is connected to the drain of the transistor MP11 which constitutes an input terminal START of a device for assisting in starting the regulator.
  • the starting aid is a conventional device which is not shown.
  • the START input terminal may if necessary correspond to the emitter of transistor T11.
  • the transistor MN13 constitutes the voltage source 13 of the diagram shown in FIG. 1.
  • the source of this transistor is connected to ground via the resistor R21 while its drain is connected to the drain of a channel MOS transistor P MP14.
  • the transistor MP14 constitutes the current source 14. Its source is connected to the supply voltage Vcc while its gate is connected to its drain and to the gate of a P-channel MOS transistor MP15.
  • This transistor MP15 constitutes the current source 15 and its source is connected to the supply voltage Vcc while its drain constitutes the output terminal S of the regulator.
  • the regulator further comprises two other switches 17 and 18.
  • the switch 17 consists of an N-channel MOS transistor MN14, the source of which is connected to ground and the drain of which is connected to the gate of the transistor MN13.
  • the gate of transistor MN14 is connected to a control terminal PWD.
  • the switch 18 consists of an N-channel MOS transistor MN15, the source of which is connected to ground and the drain of which is connected to the output terminal S of the regulator.
  • the gate of transistor MN15 is connected to the control terminal PWD.
  • the switch 16 consists of a P-channel MOS transistor MP16 whose source is connected to the supply voltage and whose drain is connected to the sources of the transistors MP11, MP12 and MP13.
  • the gate of transistor MP16 is connected to a control terminal NPWD.
  • switches 16, 17 and 18 The role of switches 16, 17 and 18 is to suppress any energy consumption of the regulator outside of its periods of use under the action of a control signal PWD and its inverse NPWD.
  • PWD control signal
  • NPWD inverse NPWD
  • a capacitor C is interposed between the base of transistor T13 and ground to provide an alternating ground on the base of transistor T13.
  • the load Q here consists of one (or more) current sources 2 of an SCL logic.
  • a source is conventionally constituted by an N channel MOS transistor MN3, the source of which is connected to ground and the drain of which is connected to its own gate and to the sources of MOS transistors (not shown) of the logic with coupled sources.
  • the gate of transistor MN3 constitutes the control input for current source 2.
  • the voltage Vcs at the terminals of the charges Q is equal to R21 * I, where I represents the current of the source 14.
  • the minimum operating supply voltage of such a regulator is approximately 2.2 volts corresponding to two threshold voltages of MOS transistors (those of transistors MP14 and MN13) and to a base-emitter voltage (that of transistor T12). .
  • a regulator as shown in FIG. 2 produced with the following resistance values and the width-to-gate length (W / L) ratios for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2.2 to 7 volts and a Vcs voltage of 0.4 volts.
  • R21 30 k ⁇ ;
  • R23 10.8 k ⁇ ;
  • R24 74.1 k ⁇ ;
  • FIG. 3 represents the diagram of a regulator as represented in FIG. 1 for the control of current sources of a logic circuit produced on the basis of bipolar transistors.
  • the load Q here consists of one (or more) current source 1 of an ECL logic gate.
  • a source conventionally consists of a bipolar transistor of NPN T3 type whose emitter is connected to ground via a resistor R3 and whose collector is connected to the emitters of bipolar transistors (not shown) of the emitter logic coupled.
  • the base of transistor T3 constitutes the control input for current source 1.
  • the drain of the transistor MP15 no longer directly constitutes the output terminal S of the regulator, but is connected to the collector of a bipolar transistor of the NPN T14 type whose emitter is connected to ground via a resistor R25.
  • the transistor T14 plays the role of a voltage-current converter to allow the current control of the bipolar transistors T3 of the charges Q.
  • the transistors T3 of the charges Q are mounted in mirror on the transistor T14.
  • transistor T14 is linked to the fact that the current sources being produced in bipolar technology, they are controlled in current whereas in the case of source in MOS technology they are controlled in voltage.
  • a bipolar transistor T15 of NPN type is connected by its base to the drain of transistor MP15 while its collector is connected to supply voltage Vcc and its emitter is connected to the base of transistor T14.
  • This transistor T15 makes it possible to supply sufficient current to control a large number of sources 1 by means of the same regulator.
  • the switch 18 is here placed in parallel on the resistor R21. Switch 18 now acts on the bases of transistors T11 and T12.
  • Vcs of the regulator is here equal to R25 * I + Vbe 14 , where Vbe 14 represents the base-emitter voltage of the transistor T14 and where I represents the current mirrored on the source 14.
  • the minimum operating supply voltage of such a regulator is approximately 2.5 volts corresponding to the threshold voltage of the transistor MP15 and to two base-emitter voltages (those of the transistors T14 and T15).
  • the maximum value of the current which can be delivered to control transistors T3 from sources 1 is approximately 1 mA, which corresponds to a control capacity of approximately four hundred sources 1.
  • a regulator as shown in FIG. 3 produced with the following resistance values and the W / L ratios for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2, 5 to 7 volts and a Vcs voltage of 0.4 volts.
  • R21 30 k ⁇ ;
  • R23 10.8 k ⁇ ;
  • R24 74.1 k ⁇ ;
  • R25 1 k ⁇ ;
  • W / L (MP11, MP12) 40/10;
  • W / L (MP15) 2050/10;
  • the invention makes it possible to use a low supply voltage of around 3 volts, whether for current sources in bipolar or MOS technology.
  • the voltage Vcs delivered by the regulator is moreover stable in the event of variation of the temperature and / or of the supply voltage.
  • the present invention is susceptible of various variants and modifications which will appear to those skilled in the art.
  • each of the components described may be replaced by one or more elements fulfilling the same function.
  • the dimensioning of the various constituents is within the reach of the skilled person according to the functional indications given in the present description.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
EP95410136A 1994-11-30 1995-11-27 Spannungsregler für Logikschaltung in gekoppeltem Betriebszustand Expired - Lifetime EP0715240B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9414604A FR2727534A1 (fr) 1994-11-30 1994-11-30 Regulateur de tension pour circuit logique en mode couple
FR9414604 1994-11-30

Publications (2)

Publication Number Publication Date
EP0715240A1 true EP0715240A1 (de) 1996-06-05
EP0715240B1 EP0715240B1 (de) 2000-06-07

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EP95410136A Expired - Lifetime EP0715240B1 (de) 1994-11-30 1995-11-27 Spannungsregler für Logikschaltung in gekoppeltem Betriebszustand

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US (1) US5646517A (de)
EP (1) EP0715240B1 (de)
JP (1) JP2920246B2 (de)
DE (1) DE69517395T2 (de)
FR (1) FR2727534A1 (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4208770B2 (ja) * 2004-06-10 2009-01-14 キヤノン株式会社 記録ヘッド及び該記録ヘッドが用いられる記録装置
JP6836917B2 (ja) * 2017-01-24 2021-03-03 シナプティクス・ジャパン合同会社 電圧生成回路

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4234841A (en) * 1979-02-05 1980-11-18 Rca Corporation Self-balancing bridge network
US4857823A (en) * 1988-09-22 1989-08-15 Ncr Corporation Bandgap voltage reference including a process and temperature insensitive start-up circuit and power-down capability
EP0422798A2 (de) * 1989-10-13 1991-04-17 Advanced Micro Devices, Inc. BIPOLAR/CMOS Reglerschaltungen
US5084665A (en) * 1990-06-04 1992-01-28 Motorola, Inc. Voltage reference circuit with power supply compensation
FR2670915A1 (fr) * 1990-12-21 1992-06-26 Sgs Thomson Microelectronics Generateur de tension de reference a derive thermique programmable.

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US458088A (en) * 1891-08-18 Corn-harvester
JPS5931404A (ja) * 1982-08-16 1984-02-20 Hitachi Ltd 圧力センサ回路
DE3341344C2 (de) * 1983-11-15 1986-10-09 SGS-ATES Deutschland Halbleiter-Bauelemente GmbH, 8018 Grafing Längsspannungsregler
US4751404A (en) * 1986-10-31 1988-06-14 Applied Micro Circuits Corporation Multi-level ECL series gating with temperature-stabilized source current
US5121049A (en) * 1990-03-30 1992-06-09 Texas Instruments Incorporated Voltage reference having steep temperature coefficient and method of operation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4234841A (en) * 1979-02-05 1980-11-18 Rca Corporation Self-balancing bridge network
US4857823A (en) * 1988-09-22 1989-08-15 Ncr Corporation Bandgap voltage reference including a process and temperature insensitive start-up circuit and power-down capability
EP0422798A2 (de) * 1989-10-13 1991-04-17 Advanced Micro Devices, Inc. BIPOLAR/CMOS Reglerschaltungen
US5084665A (en) * 1990-06-04 1992-01-28 Motorola, Inc. Voltage reference circuit with power supply compensation
FR2670915A1 (fr) * 1990-12-21 1992-06-26 Sgs Thomson Microelectronics Generateur de tension de reference a derive thermique programmable.

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BONACCIO A R ET AL: "A BIFET DIFFERENTIAL CURRENT-MODE TRANSCEIVER FOR THE INTELLIGENT PERIPHERAL INTERFACE", PROCEEDINGS OF THE BIPOLAR CIRCUITS AND TECHNOLOGY MEETING, MINNEAPOLIS, SEPT. 18 - 19, 1989, no. -, 18 September 1989 (1989-09-18), JOPVE J, pages 131 - 134, XP000089836 *
DAVIS D E: "LOW NOISE, LOW POWER VOLTAGE REFERENCE", MOTOROLA TECHNICAL DEVELOPMENTS, vol. 9, pages 83/84, XP000053799 *

Also Published As

Publication number Publication date
DE69517395T2 (de) 2001-01-18
DE69517395D1 (de) 2000-07-13
JP2920246B2 (ja) 1999-07-19
US5646517A (en) 1997-07-08
JPH08237098A (ja) 1996-09-13
EP0715240B1 (de) 2000-06-07
FR2727534B1 (de) 1997-02-14
FR2727534A1 (fr) 1996-05-31

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