EP0625277B1 - Flacher bildschirm mit einzelnen dipol-geschuetzten mikropunkten. - Google Patents

Flacher bildschirm mit einzelnen dipol-geschuetzten mikropunkten. Download PDF

Info

Publication number
EP0625277B1
EP0625277B1 EP94900903A EP94900903A EP0625277B1 EP 0625277 B1 EP0625277 B1 EP 0625277B1 EP 94900903 A EP94900903 A EP 94900903A EP 94900903 A EP94900903 A EP 94900903A EP 0625277 B1 EP0625277 B1 EP 0625277B1
Authority
EP
European Patent Office
Prior art keywords
microtip
dipole
layer
flat
protected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP94900903A
Other languages
English (en)
French (fr)
Other versions
EP0625277A1 (de
Inventor
Michel Garcia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pixtech SA
Original Assignee
Pixel International SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pixel International SA filed Critical Pixel International SA
Publication of EP0625277A1 publication Critical patent/EP0625277A1/de
Application granted granted Critical
Publication of EP0625277B1 publication Critical patent/EP0625277B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
    • H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
    • H01J29/04—Cathodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02—Main electrodes
    • H01J1/30—Cold cathodes, e.g. field-emissive cathode
    • H01J1/304—Field-emissive cathodes
    • H01J1/3042—Field-emissive cathodes microengineered, e.g. Spindt-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2201/00—Electrodes common to discharge tubes
    • H01J2201/30—Cold cathodes
    • H01J2201/319—Circuit elements associated with the emitters by direct integration

Definitions

  • the present invention relates to a screen microtip dish individually protected by dipole.
  • Known microtip screens are vacuum tubes generally consisting of two plates of thin glass tightly sealed the plate rear or cathode plate comprising an array array of field effect transmitters formed by microtips, and the front plate or anode plate being covered with a transparent conductive layer and phosphors.
  • each light point is associated with a cathodic emissive surface located opposite screw and made up of a large number of microtips (approximately 10,000 per mm2).
  • This emissive surface is defined by the intersection of a line (grid) and a column (cathode conductor) of the matrix.
  • a potential difference of less than 100 volts applied between row and column allows to get to the top of the peak, an electric field sufficient to cause electron emission and high luminance with a low voltage phosphor.
  • the main purpose of the resistive layer is to limit the current in each transmitter so to homogenize the electronic emission, and to limit the maximum current that would pass in the tip in case tip / grid short circuit.
  • the load characteristic which results from the placing in series, with the point, of a resistance is a line.
  • the voltage drop in this resistance is proportional to the current flowing through it and can prove to be quite significant if the current emitted by the tip is important.
  • the tension that must be applied to the tip-resistance protection system is increased by the same amount, which has consequences important on the consumption of the screen in particular.
  • the device according to the present invention proposes to solve these problems. It allows effect not only of getting an effective limitation of current flowing through each microtip by self-regulation of the emission current beyond a threshold, even if the tip is in direct contact with the grid, but also better homogeneity and efficient and simplified control of the screen luminance.
  • EP-A-0496572 describes a microtip flat screen in which the addressing system is integrated. Tripole components such as bipolar or MOS transistors are associated with microtips to order them.
  • An electron beam 11 emitted under vacuum by microtips 12 electrically connected to cathodic conductors and modulated by the potential of the grid 6 is accelerated towards the anode 9 where it excites the phosphors 10 (typical operation triode). Thanks to the short tip-anode distance, the focusing is obtained by proximity effect without no electronic optics.
  • each microtip 12 is protected against excess current by putting in series of a load resistor (fig 2).
  • This resistance generally consists of a layer resistive 3 of amorphous silicon (or other material resistant).
  • each microtip 12 is no longer by putting a series load resistance, but by the serialization of a dipole 13 whose voltage-current characteristic is not not linear.
  • This dipole consists of a transistor with field effect (FET), preferably of the grid type depleted insulator, whose drain D is connected to the microtip 12 and source S to conductor column 3 corresponding, the door or "gate" G (or pinch electrode) of each transistor being directly connected either to the source S or to the drain D.
  • FET transistor with field effect
  • This arrangement allows for a complete protection of microtip 12 against frank short circuits between tip and grid 6 by complete blockage of current in the tip.
  • the dipoles 13 will advantageously manufactured in integrated technology, on a substrate 14 single silicon (solid or thin layer), so that we can, by polarizing said substrate, which may be common to all the dipoles 13, modify globally (on all points in same time) the protection threshold and the level of emission current (modulation of the brightness of screen).
  • Figure 4 shows a partial section of a microtip emissive cathode protected by dipoles 13, these being made at from a P-type substrate 14 in which are formed of N-type overdoped zones 15 obtained by diffusion or other (establishment) and constituting the sources, channel 20 (depletion transistor) formed by example by an N-type ion implantation, as well than a layer of grid insulation 16 made of silica obtained by surface oxidation or deposit.
  • the electrode pinch 17 is created at the same time as the column conductor 3 by metallization. The point is carried out in the usual way, but is based on the transistor pinch gate.
  • drains located under the microtips are not overdoped, as usual in MOS structures classics.
  • the constituting field effect transistor the dipole 13 can advantageously have a circular geometry, its conduction channel being located all around microtip 12 (Figure 5).
  • dipole 13 The operation of dipole 13 is then next: The extraction voltage is applied to electrode 6 (grid). When this voltage is low (low enough for the voltage peak / source is less than the threshold of the transistor at depletion), the dipole in series with the tip 12 is, at roughly equivalent to the resistance of channel 20 implanted, its value is quite low.
  • the gate pinch 17 does its job and "pinch" channel 20 limiting the current in the dipole to a value (saturation current of the depletion transistor) which is, in the first order, more function than geometric dimensions of the assembly and of the tension of the substrate 14 relative to the source 15.
  • the emissive cathode can be itself realized on silicon in integrated technology.
  • the column conductors 3, and possibly the line conductors (or grid 6) may be made up of diffused layers, buried or not, with as an alternative to double, in places, the layer diffused by a metallization (positioned in a uncluttered area for example or so minimize coupling capacities)

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Cold Cathode And The Manufacture (AREA)
  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)

Claims (5)

  1. Flach-ebener Mikrospitzen-Bildschirm,
       dadurch gekennzeichnet daß jede Mikrospitze (12) jeweils mit einem Spaltenleiter (3) über einen Dipol (13) verbunden ist, der aus einem Feldeffekttransistor vom Verarmungstyp besteht, welcher eine mit der Mikrospitze verbundene Drain-Elektrode, eine mit dem Spaltenleiter verbundene Source-Elektrode und ein direkt mit der Source- oder mit der Drain-Elektrode verbundenes isoliertes Gitter aufweist.
  2. Flach-ebener Mikrospitzen-Bildschirm nach Anspruch 1, dadurch gekennzeichnet, daß er eine Siliciumschicht (14) eines ersten Leitfähigkeitstyps aufweist und jeweils in Zuordnung zu jeder Mikrospitze:
    einen in der genannten Schicht (14) ausgebildeten und mit einem Kathodenleiter (3) verbundenen ersten Bereich (15) eines zweiten Leitfähigkeitstyps mit hohem Dotierungspegel;
    einen in der genannten Schicht (14) ausgebildeten zweiten Bereich (20) des zweiten Leitfähigkeitstyps mit einem niedrigen Dotierungspegel, der neben dem ersten Bereich (15) liegt und mit einer mit einer Öffnung versehenen Isolierschicht (16) überzogen ist;
    eine sich auf die genannte Öffnung und über die Isolierschicht (16) erstreckende Leiterschicht (17) zwischen der genannten Öffnung und dem ersten Bereich; sowie
    eine über der genannten Leiterschicht ausgebildete Mikrospitze
       aufweist.
  3. Flach-ebener Mikrospitzen-Bildschirm nach Anspruch 2, dadurch gekennzeichnet daß die Öffnung, die Mikrospitze, die Leiterschicht, der zweite und der erste Bereich vom zweiten Leitfähigkeitstyp konzentrisch sind.
  4. Flach-ebener Mikrospitzen-Bildschirm nach Anspruch 2 oder 3, dadurch gekennzeichnet, daß die Spaltenleiter aus in der genannten Siliciumschicht hergestellten Diffusionsbereichen bestehen.
  5. Flach-ebener Mikrospitzen-Bildschirm nach einem der Ansprüche 2 bis 4, dadurch gekennzeichnet, daß er Mittel zur Modifizierung der Vorspannung des Substrats der genannten MOS-Transistoren vom Verarmungstyp aufweist.
EP94900903A 1992-12-04 1993-12-03 Flacher bildschirm mit einzelnen dipol-geschuetzten mikropunkten. Expired - Lifetime EP0625277B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9214893 1992-12-04
FR9214893A FR2698992B1 (fr) 1992-12-04 1992-12-04 Ecran plat à micropointes protégées individuellement par dipôle.
PCT/FR1993/001190 WO1994014153A1 (fr) 1992-12-04 1993-12-03 Ecran plat a micropointes protegees individuellement par dipole

Publications (2)

Publication Number Publication Date
EP0625277A1 EP0625277A1 (de) 1994-11-23
EP0625277B1 true EP0625277B1 (de) 1998-06-17

Family

ID=9436433

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94900903A Expired - Lifetime EP0625277B1 (de) 1992-12-04 1993-12-03 Flacher bildschirm mit einzelnen dipol-geschuetzten mikropunkten.

Country Status (5)

Country Link
EP (1) EP0625277B1 (de)
JP (1) JP3486904B2 (de)
DE (1) DE69319225T2 (de)
FR (1) FR2698992B1 (de)
WO (1) WO1994014153A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5514937A (en) * 1994-01-24 1996-05-07 Motorola Apparatus and method for compensating electron emission in a field emission device
JP3026484B2 (ja) * 1996-08-23 2000-03-27 日本電気株式会社 電界放出型冷陰極
JP2000260299A (ja) * 1999-03-09 2000-09-22 Matsushita Electric Ind Co Ltd 冷電子放出素子及びその製造方法
US6648711B1 (en) * 1999-06-16 2003-11-18 Iljin Nanotech Co., Ltd. Field emitter having carbon nanotube film, method of fabricating the same, and field emission display device using the field emitter
JP4670137B2 (ja) * 2000-03-10 2011-04-13 ソニー株式会社 平面型表示装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2656843B2 (ja) * 1990-04-12 1997-09-24 双葉電子工業株式会社 表示装置
JPH04221990A (ja) * 1990-12-25 1992-08-12 Sony Corp 画像表示装置
US5212426A (en) * 1991-01-24 1993-05-18 Motorola, Inc. Integrally controlled field emission flat display device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
U. Tietze, Ch. Schenck: "Halbleiterschaltungstechnik", cinquième édition 1980, pages 87, 88, *

Also Published As

Publication number Publication date
DE69319225T2 (de) 1998-11-19
FR2698992B1 (fr) 1995-03-17
JPH07506456A (ja) 1995-07-13
EP0625277A1 (de) 1994-11-23
FR2698992A1 (fr) 1994-06-10
DE69319225D1 (de) 1998-07-23
JP3486904B2 (ja) 2004-01-13
WO1994014153A1 (fr) 1994-06-23

Similar Documents

Publication Publication Date Title
EP0461990B1 (de) Elektronenquelle mit Mikropunktkathoden
US6398608B1 (en) Method of preventing junction leakage in field emission displays
FR2796489A1 (fr) Dispositif d'affichage a emission de champ comportant un film de nanotube en carbone en tant qu'emetteurs
EP0316214A1 (de) Elektronenquelle mit Mikrospitzen-Emissionskathoden und diese Quelle benutzende Bildwiedergabe-Anordnung, die auf durch Feldemission angeregter Kathodolumineszenz beruht
US6417605B1 (en) Method of preventing junction leakage in field emission devices
EP0704877A1 (de) Elektrischer Schutz von einer Anode eines flachen Bildschirms
FR2760893A1 (fr) Cathode a emission de champ
EP0625277B1 (de) Flacher bildschirm mit einzelnen dipol-geschuetzten mikropunkten.
US10141154B2 (en) Array substrate, display panel and display apparatus having the same, and fabricating method thereof
EP1210721B1 (de) Flache feldemissionsanzeigevorrichtung mit modulationselektrode
US5894187A (en) Field emission cold cathode having concentric cathode areas and feeder areas, and cathode ray tube having such a field emission cold cathode
WO1994014182A1 (fr) Procede de realisation sur silicium, de cathodes emissives a micropointes, pour ecran plat de petites dimensions, et produits obtenus
EP0616356B1 (de) Mikrospitzebildwiedergabeanordnung und Herstellungsverfahren
US5920296A (en) Flat screen having individually dipole-protected microdots
US6278229B1 (en) Field emission displays having a light-blocking layer in the extraction grid
US5903100A (en) Reduction of smearing in cold cathode displays
JP3465890B2 (ja) 電子放出素子、およびそれを用いたフラットディスプレイ
JP2752014B2 (ja) 画像表示装置
FR2798507A1 (fr) Dispositif permettant de produire un champ electrique module au niveau d'une electrode et son application aux ecrans plats a emission de champ
EP0789930B1 (de) Feldemissionsanzeigevorrichtung
EP0867908A1 (de) Vergleichmässigung der potentiellen Elektronenemission einer Kathode eines flachen Mikrospitzen-Bildschirms
KR20000043850A (ko) 전계방출표시소자 및 그 형성방법
FR2910175A1 (fr) Structure de cathode pour ecran plat avec grille de refocalisation
FR2788879A1 (fr) Ecran a emission de champ equipe de microcanaux

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19940824

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB IT

17Q First examination report despatched

Effective date: 19960912

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB IT

REF Corresponds to:

Ref document number: 69319225

Country of ref document: DE

Date of ref document: 19980723

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 19980803

RAP2 Party data changed (patent owner data changed or rights of a patent transferred)

Owner name: PIXTECH SA

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
REG Reference to a national code

Ref country code: FR

Ref legal event code: GC

REG Reference to a national code

Ref country code: GB

Ref legal event code: 732E

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20030602

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20030627

Year of fee payment: 10

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20030630

Year of fee payment: 10

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20031203

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20040701

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20031203

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20040831

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20051203