EP0349415A1 - Verfahren und Einrichtung zur Steuerung eines Matrixbildschirmes, der Grauwerte anzeigt - Google Patents

Verfahren und Einrichtung zur Steuerung eines Matrixbildschirmes, der Grauwerte anzeigt Download PDF

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Publication number
EP0349415A1
EP0349415A1 EP89401825A EP89401825A EP0349415A1 EP 0349415 A1 EP0349415 A1 EP 0349415A1 EP 89401825 A EP89401825 A EP 89401825A EP 89401825 A EP89401825 A EP 89401825A EP 0349415 A1 EP0349415 A1 EP 0349415A1
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EP
European Patent Office
Prior art keywords
line
gray level
numbers
screen
columns
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Granted
Application number
EP89401825A
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English (en)
French (fr)
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EP0349415B1 (de
Inventor
Anne Ghis
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0693—Calibration of display systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Definitions

  • the present invention relates to a method and a device for controlling a matrix display screen intended for displaying images having gray levels. It applies in particular to the control of fluorescent micro-tip screens or liquid crystal screens.
  • the images can be in black and white or in color, the expression "gray level” meaning in the latter case “color halftone”.
  • the lines are successively addressed, that is to say carried from an appropriate potential Vlp to another suitable potential Vla une times per image and during a time T called "line time" which is the same for all the lines and which is equal to the quotient of the duration of an image by the number of lines; simultaneously with the addressing of each line, the columns receive signals making it possible to control the respective states of the image elements, or pixels, of the line considered, according to the desired image: a column is brought to an appropriate potential Vca if the corresponding pixel must be on and at another suitable potential Vce if the corresponding pixel must, on the contrary, be off.
  • the addressing of the line considered ceases and the next line is addressed, the signals received by the columns depending on the respective states desired for the pixels of this next line and so on.
  • a first technique consists in subjecting a column to an intermediate potential between Vca and Vce so that the corresponding pixel has an intermediate brightness between that which corresponds to the lit pixel and that which corresponds to the extinct pixel.
  • a second technique consists in bringing a column to the Vca potential only for a fraction of the line time, proportional to the quantity of light desired for the corresponding pixel and then to bringing this column to the Vce potential during the rest of the line time (temporal modulation of the control potential of each column).
  • this time for establishing the voltage across a pixel further depends on the access resistance to this pixel linked to its position in the screen. It follows that the charge time of the pixel also depends on this position: for the same control potential, two pixels for example located at the two ends of the same column do not have the same brightness, the pixel closest to the column contact to which the control potential having the highest brightness is applied.
  • the present invention relates to a method and a device for controlling a matrix screen displaying gray levels, which uses a temporal modulation of the control potential of each column and therefore does not have the drawback of the first known technique mentioned above. , and which also does not cause a problem of non-linearity as posed by the second known technique mentioned above.
  • the present invention firstly relates to a method for controlling a matrix display screen intended to display images having gray levels which are identified by whole numbers increasing from 0 to a number integer m at least equal to 1, this screen comprising a plurality of rows and a plurality of columns whose intersections are respectively associated with picture elements, method according to which, for each picture, these rows are successively activated for a given time T called line time which is the same for all the lines, and, when each line is activated, the columns are respectively controlled by signals intended to activate these columns, each signal being applied for a time which depends on the level of gray of the image element corresponding to the intersection of the activated line considered and of the column controlled by the signal considered, process characterized in that the line time T is subdivided into N equal time intervals dt, N being an integer at least equal to m, in that each gray level i of each line is associated with a chosen integer Nil of intervals dt, l representing the number of the line considered, the numbers Nil forming, for all
  • the present invention makes it possible to correlate the time of application of the potential Vac during the line time with the voltage-brightness characteristic of the screen considered.
  • Nil quantities in the present invention and the possibility of choosing these quantities means that one can balance a posteriori - that is to say once the screen and the electronic circuits associated with it are ready to operate or even have already operated - the gray levels obtained with respect to each other, either to obtain a particular gray scale, regular or logarithmic for example, or to compensate for an aging of the screen-circuit assembly, or else to choose a better compromise between coupling and brightness.
  • the coupling in question is a phenomenon which is linked to the resistance of access to different pixels and which visually results in "smudges" from one line of the screen to the other.
  • the sequences of numbers Nil1 and Nil2 can be identical (non-differentiation of the lines on the screen, the lines l1 and l2 not necessarily being successive lines.
  • the gray levels can be adjusted as follows: at least two zones are formed on the screen corresponding respectively to the gray level 0 and to the gray level m, the fraction of the line time during which the columns are activated for the image elements at the gray level m is varied, until a desired image quality is obtained on the screen, - a uniform image is formed on the screen having the gray level m thus defined and the brightness of this uniform image is measured, - the luminosity which must be obtained for each of the other gray levels 1 to m-1, on the basis of a chosen gray level scale, is calculated from this measured brightness value, and - For each of these other gray levels, a uniform image is formed on the screen having this other gray level and the number of said sequence which corresponds to it is adjusted so as to obtain the brightness calculated for this other level of Grey.
  • the maximum gray levels can be adjusted as follows: - the respective luminosities of all the lines of the screen are measured when these lines are at the maximum gray level and the lowest brightness line which is taken for reference is determined, and - for each of the other lines l, the number Nml corresponding to the maximum gray level is adjusted so that the resulting brightness is equal to the reference brightness.
  • the other gray levels 1 to m-1 can then be adjusted as follows: - the brightness which must be obtained for each of the other gray levels 1 to m-1 is calculated from the reference brightness value, according to a chosen gray level scale, and - For each of these other gray levels and for each line, the image of this line having this other gray level is formed on the screen and the number of said series corresponding to it is adjusted so as to obtain the brightness calculated for this other gray level.
  • Nml is less than N, which makes it possible to suppress the phenomenon of smearing from one line to the other, as will be seen more clearly below.
  • the present invention also relates to a device for controlling a matrix display screen intended to display images having gray levels which are identified by whole numbers increasing from 0 to an integer m at least equal to 1 , this screen comprising a plurality lines and a plurality of columns whose intersections are respectively associated with picture elements, this device comprising: means provided for successively activating the lines for a given time T called line time which is the same for all the lines and this, for each image, and - Column control means, provided to generate, when activating each line, signals intended to activate the columns respectively, each signal being applied for a time which depends on the gray level of the picture element corresponding to the intersection of the activated line considered and the column controlled by the signal considered, device characterized in that the column control means comprise: - means which are common to all the columns and which include: .
  • memorization means provided for memorizing, at least for each non-zero gray level i of each line, information linked to a chosen integer Nile, l representing the number of the line considered, the Nil numbers forming, for all l fixed , a strictly increasing sequence of the variable i of the last term Nml less than or equal to N, and - means provided for applying said signal for a time equal to the product of dt by that of the numbers in said sequence which corresponds to said line and to said gray level, and for deactivating said column after said time during which said signal is applied, up to 'when the line is activated following, the application time of any signal corresponding to the display of a gray level image element 0 being zero, the Nil numbers being chosen so as to obtain a determined distribution for the light intensities of the different levels of Grey.
  • the column control means further comprise a shift register whose number of positions is equal to the number of columns and which receives gray level information for the columns as input. , each position being associated with a given column, and occupied during the activation of a line, by the gray level information i relating to this column, the means provided for applying said signal comprise for each column: a register which receives as input the information contained in the corresponding position of the shift register and which is controlled by line start signals, and a comparator with two inputs, the first input of which is connected to the output of said register and the output of which controls the activation of the corresponding column by means of amplification, and the means common to all the columns are provided for sending to the second input of each comparator information representing whole numbers k, this information varying from 0 to m in an increasing manner over the course of the line time so that the corresponding column to this comparator is activated as long as k is less than i then deactivated and maintained in the deactivated
  • the means common to all the columns further comprise: - a first counter provided for counting down, and a second counter which is reset to zero at the start of a line, which is incremented by an end of counting signal sent by the first counter, and which sends the information representing the numbers k to the second input of each comparator, this first counter is decremented by the means provided for generating the pulses, the storage means comprise at least m registers numbered from 0 to m-1 and an address bus on which are sent the information representing the numbers k, the signals of output of these storage means control the initialization of the first counter which takes these output signals into account when sending its end of count signal, and the information present at the address i of the storage means, i taking any of the values 0 to m-1, is equal to the difference between the numbers N (i + 1) l and N
  • the means common to all the columns further comprise: - a first counter designed to count down, - a second counter which is reset to zero at the start of a line, which is incremented by a end of counting signal emitted by the first counter, and which sends the information representing the numbers k to the second input of each comparator, and - a third counter which is reset to zero at the start of an image and incremented at the start of each line, the first counter is decremented by the means provided for generating the pulses, the storage means comprise at least mxL registers, L being the number of lines, and an address bus on which the information representing the numbers k is sent in the form of binary words in two parts, the most significant part corresponding to the output signals of the third counter and the least significant part corresponding to the information representing the numbers k, the output signals from these storage means control the initialization of the first counter
  • FIG. 1 schematically illustrates the principle of the all-or-nothing display in the case of a particular fluorescent screen with microtips.
  • all or nothing display means a display for which each pixel can only be in the off state or in the on state, with no intermediate state.
  • FIG. 1 also shows specific addressing signals for the first three columns of the screen C1, C2 and C3, these signals leading to the following image on the screen: the pixels corresponding to the intersections of the columns C1 , C2 and C3 with line L1 are respectively in the states off, on and off; the intersections of these same columns with the line L2 respectively lead to pixels in the on, off and off states and the same intersections with the line L3 respectively lead to pixels in the on, off and on states.
  • the line time T is divided into N equal intervals dt.
  • N is at least equal to m.
  • N is much greater than m.
  • the gray level 0 (pixel off) is associated with 0 intervals regardless of the number l of the line. In other words, N0l is zero whatever l.
  • the number of intervals dt associated with each of the gray levels is strictly increasing with the brightness of this gray level.
  • the sequence of numbers Nil is a strictly increasing sequence of the variable i.
  • the maximum gray level m (corresponding to a lit pixel) is associated with a number of intervals Nml less than or equal to N whatever l.
  • the column electrode whose pixel must have the non-zero gray level brightness i is carried, from the beginning of the line time T, at the activation potential Vca (0V for certain fluorescent micro-tip screens) and maintained at this potential for Nil time intervals dt, l being the number of the line considered, after which this electrode is brought back at the extinction potential Vce (45V for these fluorescent micro-tip screens) and this, until the start of the next line.
  • the gray levels obtained with a regular distribution over time were compared in accordance with the second known technique, mentioned above (application time of Vac proportional to the desired brightness) with the gray levels obtained with an adjusted distribution.
  • for a fluorescent microtip screen whose emission characteristic is shown in FIG. 3.
  • the variations of the intensity J of the electronic current are represented as a function of the voltage v between a cathode (column) and a grid (line) of the screen. , expressed in volts.
  • the invention makes it possible to obtain luminosity ratios which increase substantially in arithmetic progression, which is not the case. in the prior art.
  • the coupling is limited to 2.7% of the current emitted by a gray level point 15 and this coupling is zero for the other levels 0 to 14.
  • Nile numbers can be determined as follows: - the image of a checkerboard is formed on the screen, or a succession of bands alternately lit (maximum gray level) and unlit (gray level 0). It suffices in fact to form an image comprising an extinct part and a lit part and more precisely, an image comprising at least on the same column a lit point immediately followed by a lit point.
  • the fraction of the line time during which the column electrodes are maintained at the activation potential is then varied, for the lit pixels, either by varying Nml to N constant, or by varying N to Nml constant. In this way, the best compromise between the coupling and the brightness is sought, knowing that the larger Nml / N, the better the brightness but the stronger the coupling.
  • a uniform gray level image m resulting from the previous compromise is then formed on the screen and the brightness of this image is measured for example by means of a photometer or by measuring the anode current (in the case a fluorescent screen with micro-tips).
  • the luminosity which must be obtained for each of the other gray levels is calculated according to a luminosity scale which has been set (regular or logarithmic scale by example).
  • the lowest brightness line is first determined by measuring the respective luminosities of all the lit lines, successively for example.
  • the lowest brightness line is generally the last line, that is to say the one furthest from the contacts allowing the addressing of the screen columns.
  • the number of intervals dt to be assigned to the maximum gray level of this other line is then adjusted, for each other line, so that it has the same brightness as said lowest brightness, the latter being taken for reference. During this adjustment, only said other line considered is lit on the screen.
  • FIG. 5 schematically represents a first particular embodiment of the device which is the subject of the invention, making it possible to control a matrix screen 2, for example a fluorescent screen with microtips, for which the lines of the point of view of their brightness.
  • This screen includes a set of lines 4 parallel to each other and a set of columns 6 which are parallel to each other and perpendicular to the lines.
  • the end of each line is provided with a line contact.
  • the end of each column is provided with a column contact.
  • the device shown in FIG. 5 comprises means 8 for controlling the lines and means 10 for controlling the columns.
  • the intersection of a given line and a given column defines a picture element 12 which appears on the screen when this line and this column are addressed in an appropriate manner.
  • the device represented in FIG. 5 further comprises means 13 provided for supplying the information concerning the gray levels of the pixels, this information being coded in binary system, on 4 bits and denoted GP, and the synchronization pulses, in particular those of start of line.
  • the GP information is presented successively to the input of the shift register 14 and moved in this register 14 so that at the start of the addressing of a line, each information item, which is associated with a pixel, occupies the position of the shift register which is associated with the column corresponding to this pixel.
  • each item of information GP is transferred from its position in the register 14 to the inputs D of the flip-flop 16 of 4 bits associated with this position.
  • the non-inverting outputs Q of this flip-flop are sent to one P of the two inputs (4 bits) of the comparator 18 of 2x4 bits, the other Q input (4 bits) of this comparator receiving GC information which is common to all column commands and coded on 4 bits.
  • This GC information which comes from the means 22 common to all the columns, changes in an increasing manner over the course of the line time T.
  • the output of the comparator 18 is connected to the input of the corresponding amplification means 20, the output of which controls the corresponding column.
  • the output of the comparator 18 remains at logic level 0 and the contact of the column corresponding to the comparator 18 considered is maintained at the potential 0 volt (activation).
  • the output of the comparator 18 passes and remains at logic level 1 and the contact in question is brought and maintained at the potential 45 volts (extinction).
  • the means 22 which are common to all the columns include a first 8-bit counter 24, intended for counting down, a second 4-bit counter 26, a clock 28 and a memory 30.
  • the counters 24 and 26 are for example of the type 74193.
  • the means 22 also comprise a first door 32 of the AND type and a second door 34 also of the AND type.
  • the output of door 32 is connected to the clock input CK of the counter 26.
  • the output of door 34 is connected to the (reversing) loading input LD ("load") of the counter 24.
  • An input of the door 32 is connected to the (reverse) retaining output RE ("carry") of the counter 26 and the (reverse) output of end of countdown BO (“borrow”) of the counter 24 is connected to the other input of the door 32 as well as at an entrance to door 34.
  • the means 13 are provided for sending line start information to the line control means 8 and to the reset input RESET of the counter 26. This line start information is also sent to the clock input CK ("latch") of each flip-flop 16 and at the other input of door 34 via an inverter 36.
  • the clock 28 is a regular clock of frequency 1 / dt, that is to say N / T.
  • the pulses supplied by the clock are sent to the DC down counting input of counter 24.
  • the GC information coded on 4 bits comes from the counter 26 and sent on the one hand to the input Q of each of the comparators 18 and on the other hand to the bus address A of memory 30 (the content of counter 26 therefore corresponds to an address of memory).
  • This memory 30 is a memory of 15 words of 8 bits.
  • the outputs Si of this memory 30 are presented on the initialization bus of the counter 24.
  • the counter 26 is reset to zero at the start of the line and incremented by a countdown end signal sent by the output B0 of the counter 24. In fact, at the end of each countdown, the output B0 of the counter 24 goes to the state logic 1 and, the output RE of counter 26 being in logic state 1, the input CK of this counter 26 receives a pulse.
  • the counter 24 is decremented by the clock 28 and takes into account the outputs Si of the memory 30 during the transmission of its down-counting signal. This signal in fact corresponds to a transition from the output BO of the counter 24 to the logic state 1 and, as the output of the inverter is in the logic state 1, the input LD of the counter 24 receives a pulse.
  • the information Si is placed at the address i of the memory and is equal to the number of intervals dt to count to pass from the number of intervals corresponding to the gray level i to the number of intervals corresponding to the gray level i + 1.
  • the content of the memory 30 is as follows: Address 0 1 2 3 4 5 6 7 8 Content 116 30 23 20 18 17 17 16 15 Address 9 10 11 12 13 14 15 Content 15 14 14 13 13 -
  • the means 22 therefore operate in the following manner: at the start of the line, the counter 26 is reset to zero. Its content is then 0. At address 0, the memory 30 includes the number of intervals dt corresponding to the gray level 1. This number is transferred to the counter 24 which is decremented by the clock 28 of frequency 1 / dt. When the counter 24 is at zero, it sends a pulse to the counter 26 which is incremented due to this pulse. The new content of the counter 26 is then 1. At the address 1, the memory 30 includes the additional number of intervals to be counted to reach the number of intervals corresponding to the gray level 2. This additional number is transferred to the counter 24 ... And so on.
  • the memory 30 is for example of the PROM type. To make the gray level adjustments mentioned above, which implies modifications to the content of this memory, it suffices to replace it by a device called "PROM emulator", all other things being equal and, once the settings completed, replace this emulator with memory 30 in which the values obtained with this emulator are written. In addition, if these settings require the number N to be varied, it is sufficient to do so to change the clock 28.
  • FIG. 6 there is shown schematically a second particular embodiment of the device object of the invention, allowing the control of the screen 2 with line differentiation.
  • the device schematically shown in Figure 6 differs from the device which is shown in Figure 5 in that it further comprises a third counter 38 whose incrementation is controlled by the line start pulses (which are sent to the 'clock input CK of counter 38) and whose reset to zero is controlled by an image start signal DI which is supplied by means 13.
  • the number s of output of counter 38 is such that 2 s is at least equal to L (number of lines on the screen).
  • the memory 30 is replaced by a memory 31 of n 8-bit words, n being at least equal to the product of the number of lines of the screen by the number m, equal to 15 in the example given.
  • the words presented on the address bus A of the memory 31 comprise a least significant part and a most significant part.
  • the outputs SL of the counter 38 constitute the most significant part of each of these words, the least significant part of which is the word supplied as an output by the counter 26.
  • the addresses of the memory are therefore identified by words of s + 4 bits .

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Liquid Crystal Display Device Control (AREA)
EP89401825A 1988-06-29 1989-06-27 Verfahren und Einrichtung zur Steuerung eines Matrixbildschirmes, der Grauwerte anzeigt Expired - Lifetime EP0349415B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8808756 1988-06-29
FR8808756A FR2633764B1 (fr) 1988-06-29 1988-06-29 Procede et dispositif de commande d'un ecran matriciel affichant des niveaux de gris

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EP0349415A1 true EP0349415A1 (de) 1990-01-03
EP0349415B1 EP0349415B1 (de) 1993-06-09

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EP89401825A Expired - Lifetime EP0349415B1 (de) 1988-06-29 1989-06-27 Verfahren und Einrichtung zur Steuerung eines Matrixbildschirmes, der Grauwerte anzeigt

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US (1) US5075683A (de)
EP (1) EP0349415B1 (de)
JP (1) JPH0264692A (de)
KR (1) KR970006858B1 (de)
CA (1) CA1325297C (de)
DE (1) DE68906969T2 (de)
FR (1) FR2633764B1 (de)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0499979A3 (en) * 1991-02-16 1993-06-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
EP0513551A3 (en) * 1991-04-17 1993-06-23 Casio Computer Company Limited Image display apparatus
EP0598913A4 (de) * 1992-05-08 1994-10-26 Seiko Epson Corp Steuerungsverfahren und -schaltung für flüssigkristallelemente und bildanzeigevorrichtung.
EP0651368A1 (de) * 1993-09-01 1995-05-03 Sony Corporation Flüssigkristall-Anzeigevorrichtung mit aktiver Matrix und Signalimpuls-Modulation
FR2739712A1 (fr) * 1995-10-05 1997-04-11 Micron Display Tech Inc Procede et appareil de modulation de niveaux de gris d'un affichage matriciel
WO1997035225A3 (en) * 1996-03-07 1997-11-27 Gray scale driving method for a birefringent liquid crystal display device
FR2749431A1 (fr) * 1996-05-31 1997-12-05 Pixtech Sa Reglage de la luminosite d'ensemble d'un ecran matriciel a emission de champ
US5877738A (en) * 1992-03-05 1999-03-02 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
WO1999018560A1 (en) * 1997-10-03 1999-04-15 Motorola Inc. Method for providing a gray scale in a field emission display
US5900856A (en) * 1992-03-05 1999-05-04 Seiko Epson Corporation Matrix display apparatus, matrix display control apparatus, and matrix display drive apparatus
US5959603A (en) * 1992-05-08 1999-09-28 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
US5963189A (en) * 1992-03-05 1999-10-05 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
EP0953959A3 (de) * 1998-04-30 2000-10-18 Hewlett-Packard Company Elektrooptisches Anzeigegerät mit analogen Steuereinrichtungen für Bildelemente
US6195139B1 (en) 1992-03-04 2001-02-27 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
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JP2845303B2 (ja) 1991-08-23 1999-01-13 株式会社 半導体エネルギー研究所 半導体装置とその作製方法
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JP2500417B2 (ja) * 1992-12-02 1996-05-29 日本電気株式会社 液晶駆動回路
FR2708129B1 (fr) * 1993-07-22 1995-09-01 Commissariat Energie Atomique Procédé et dispositif de commande d'un écran fluorescent à micropointes.
US5477110A (en) * 1994-06-30 1995-12-19 Motorola Method of controlling a field emission device
US5543691A (en) * 1995-05-11 1996-08-06 Raytheon Company Field emission display with focus grid and method of operating same
JP3322809B2 (ja) 1995-10-24 2002-09-09 富士通株式会社 ディスプレイ駆動方法及び装置
US6252347B1 (en) 1996-01-16 2001-06-26 Raytheon Company Field emission display with suspended focusing conductive sheet
US6057809A (en) * 1996-08-21 2000-05-02 Neomagic Corp. Modulation of line-select times of individual rows of a flat-panel display for gray-scaling
JPH10177370A (ja) * 1996-10-16 1998-06-30 Oki Lsi Technol Kansai:Kk 多階調出力回路及び液晶表示装置
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FR2786597B1 (fr) * 1998-11-27 2001-02-09 Pixtech Sa Adressage numerique d'un ecran plat de visualisation
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FR2880173B1 (fr) 2004-12-28 2007-05-11 Commissariat Energie Atomique Procede de commande d'un ecran de visualisation matriciel

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EP0499979A3 (en) * 1991-02-16 1993-06-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US5844533A (en) * 1991-04-17 1998-12-01 Casio Computer Co., Ltd. Gray scale liquid crystal display
EP0513551A3 (en) * 1991-04-17 1993-06-23 Casio Computer Company Limited Image display apparatus
US5347294A (en) * 1991-04-17 1994-09-13 Casio Computer Co., Ltd. Image display apparatus
US5465102A (en) * 1991-04-17 1995-11-07 Casio Computer Co., Ltd. Image display apparatus
US8035773B2 (en) 1992-03-04 2011-10-11 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US7123320B2 (en) 1992-03-04 2006-10-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6618105B2 (en) 1992-03-04 2003-09-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6195139B1 (en) 1992-03-04 2001-02-27 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6452578B1 (en) 1992-03-05 2002-09-17 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
US6084563A (en) * 1992-03-05 2000-07-04 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US5877738A (en) * 1992-03-05 1999-03-02 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
US6483497B1 (en) 1992-03-05 2002-11-19 Seiko Epson Corporation Matrix display with signal electrode drive having memory
US5900856A (en) * 1992-03-05 1999-05-04 Seiko Epson Corporation Matrix display apparatus, matrix display control apparatus, and matrix display drive apparatus
US7095397B2 (en) 1992-03-05 2006-08-22 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US5963189A (en) * 1992-03-05 1999-10-05 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US6611246B1 (en) 1992-03-05 2003-08-26 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
US6421040B2 (en) 1992-03-05 2002-07-16 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US7138972B2 (en) 1992-03-05 2006-11-21 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
US6208323B1 (en) 1992-03-05 2001-03-27 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US6252573B1 (en) 1992-03-05 2001-06-26 Seiko Epson Corporation Drive method, a drive circuit and a display device for liquid crystal cells
US5959603A (en) * 1992-05-08 1999-09-28 Seiko Epson Corporation Liquid crystal element drive method, drive circuit, and display apparatus
EP0598913A4 (de) * 1992-05-08 1994-10-26 Seiko Epson Corp Steuerungsverfahren und -schaltung für flüssigkristallelemente und bildanzeigevorrichtung.
US5506599A (en) * 1993-09-01 1996-04-09 Sony Corporation Active matrix liquid crystal display apparatus with varying pulse widths and a constant pulse width-pulse height product
EP0651368A1 (de) * 1993-09-01 1995-05-03 Sony Corporation Flüssigkristall-Anzeigevorrichtung mit aktiver Matrix und Signalimpuls-Modulation
US6252572B1 (en) 1994-11-17 2001-06-26 Seiko Epson Corporation Display device, display device drive method, and electronic instrument
FR2739712A1 (fr) * 1995-10-05 1997-04-11 Micron Display Tech Inc Procede et appareil de modulation de niveaux de gris d'un affichage matriciel
US5767823A (en) * 1995-10-05 1998-06-16 Micron Display, Inc. Method and apparatus for gray scale modulation of a matrix display
US6519013B1 (en) 1996-03-07 2003-02-11 Asahi Glass Company Ltd. Gray scale driving method for a birefringent liquid display service
WO1997035225A3 (en) * 1996-03-07 1997-11-27 Gray scale driving method for a birefringent liquid crystal display device
FR2749431A1 (fr) * 1996-05-31 1997-12-05 Pixtech Sa Reglage de la luminosite d'ensemble d'un ecran matriciel a emission de champ
WO1999018560A1 (en) * 1997-10-03 1999-04-15 Motorola Inc. Method for providing a gray scale in a field emission display
EP0953959A3 (de) * 1998-04-30 2000-10-18 Hewlett-Packard Company Elektrooptisches Anzeigegerät mit analogen Steuereinrichtungen für Bildelemente

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JPH0264692A (ja) 1990-03-05
KR900000830A (ko) 1990-01-31
DE68906969T2 (de) 1993-12-23
CA1325297C (en) 1993-12-14
FR2633764A1 (fr) 1990-01-05
FR2633764B1 (fr) 1991-02-15
US5075683A (en) 1991-12-24
EP0349415B1 (de) 1993-06-09
KR970006858B1 (ko) 1997-04-30
DE68906969D1 (de) 1993-07-15

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