EP0265326A1 - Verfahren zur Steuerung einer elektrooptischen Matrixanzeige und dafür geeignete Steuerungsschaltung - Google Patents

Verfahren zur Steuerung einer elektrooptischen Matrixanzeige und dafür geeignete Steuerungsschaltung Download PDF

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Publication number
EP0265326A1
EP0265326A1 EP87402277A EP87402277A EP0265326A1 EP 0265326 A1 EP0265326 A1 EP 0265326A1 EP 87402277 A EP87402277 A EP 87402277A EP 87402277 A EP87402277 A EP 87402277A EP 0265326 A1 EP0265326 A1 EP 0265326A1
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EP
European Patent Office
Prior art keywords
control
during
frame
type
circuit
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Granted
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EP87402277A
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English (en)
French (fr)
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EP0265326B1 (de
Inventor
Robert Hehlen
Maurice Le Galguen
Bruno Mourey
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Thomson Grand Public
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Thomson Grand Public
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • the invention relates to a method for controlling an electrooptical matrix screen and a control circuit implementing this method. It is applicable in particular for the control of liquid crystal screens in which the control voltages are periodically reversed.
  • electro-optical display panels such as liquid crystal displays are controlled by alternating signals, with the aim of increasing their lifespan.
  • the integrated control circuits being, for economic reasons, unipolar and generally controlled between 0 volts and V volts, it is necessary to reverse the phase of the control signals either all the lines, or all the frames to obtain voltages + Vrms and -Vrms across the capacitor trapping the electrooptical material.
  • FIG. 2 To control an elementary screen, such as that of FIG. 1, comprising two lines L1, L2 and two columns C1, C2, and to switch on point A intersection of the line L1 and of column C1, the operation of the screen in control mode by line inversion is represented in FIG. 2.
  • a voltage V X of value + V DD is applied to line L1 during a first half of time t.
  • the column wire C1 which must allow the ignition of point A is set to a potential V Y of substantially zero value.
  • the potential difference applied to point A is therefore + V DD and point A lights up.
  • Line wire L2 which is not controlled at this time receives a potential + V1.
  • the potential difference at the terminals of point C is V1 and that at the terminals of point D is V1 - V3. These points are not lit.
  • the potential difference across point A is -V DD . This point is on.
  • the potential differences at the terminals of points B, C and D are respectively -V4, V DD -V2and V DD -V4. These points are not lit.
  • FIG. 3 The operation of the same screen in frame inversion control mode is represented in FIG. 3.
  • the potentials applied to the wires of lines L1 and L2 are + V DD and + V1 and those applied to the wires of columns C1 and C2 are 0 volts and + V3.
  • the line wires L1 and L2 receive the potentials 0 volts and + V2
  • the column wires C1 and C2 receive the potentials + V DD and + V4.
  • the potential differences at the terminals of points A, B, C and D are respectively -V DD , -V4, V DD - V2 and V DD -V4. Only point A is always on.
  • the object of the invention is to obtain an image showing the information to be displayed on a homogeneous background.
  • the aim will be to obtain an image in which point A is black and points B, C and D all white or, indeed, all gray (but with the same shade of gray ).
  • the invention therefore relates to a method for controlling an electro-optical matrix screen, comprising a plurality of cells arranged in rows and columns, each cell being provided with control electrodes, providing for the application to the control electrodes of each cell of at least a first control voltage of a first determined sign and at least a second control voltage of a second sign opposite to the first, characterized in that: the cell lines being controlled during line time intervals, said time intervals can be of a first type or of a second type; - during a determined frame time, and during the intervals of the first type, the cell lines are controlled by said first control voltage and during the intervals of the second type, the lines of the frame are controlled by said second voltage; - During the next frame and during the intervals of the first type, the cell lines are controlled by a second voltage while during the intervals of the second type, the lines are controlled by said first voltage.
  • the invention also relates to a circuit for controlling an electrooptical screen implementing the above method and comprising: a liquid crystal screen comprising cells arranged in rows and columns, each cell being controlled by a row electrode and a column electrode, and the screen comprising a determined number of rows; - supply circuits making it possible to supply at least a first control voltage of a first determined sign and at least a second control voltage of a second sign opposite to that of the first sign; - an inversion circuit making it possible to apply to said row and column electrodes either the first control voltage or the second control voltage; - a line time clock determining the command time for each line; - a frame frequency signal generator determining the display time of a frame; characterized in that it further comprises: - a generator of N random codes, all different, in number equal to the number N of lines, connected to the inversion circuit and making it possible, according to the value of each code, to control the inversion circuit so that it applies to each line to be controlled, during each line time, either the first control voltage or the second
  • the method of the invention provides, during a frame time T corresponding to the display of an image on the screen and having distributed this frame time in line time intervals t, to distinguish in these line time intervals intervals of a first type ta and intervals of a second type tb.
  • the control of the screen is such that the voltage at the terminals of each cell (or point) of the image has a determined value and a polarity also determined. , positive for example.
  • a line (L1) which should give rise to the display of information during a time ta, receives a potential + V DD .
  • the other lines (L2) which should not give rise to the display of information receive a potential + V1 (see FIG. 13).
  • the other columns (C2) receive a potential + V3 and the points of intersection (B) with the commanded line (L1) are subjected to a potential difference V DD -V3.
  • the other lines of the screen are commanded to display either during a time of type ta as has just been described, or during a time of type tb as will now be described.
  • the different line times of each frame are distributed randomly in time intervals of the first type ta and in time intervals of the second type tb. However, it is also possible to provide substantially equal numbers of times ta and times tb.
  • Each frame time comprises, by way of example, 8 line times t1 to t8 for the frame time T1 and 8 times t'1 to t'8 for the frame time T2. These times are divided into time of the first type ta and time of the second type tb such that each time of the second frame T2 is of the same type as the time of the same rank of the first frame T1.
  • t ⁇ 3, t ⁇ 4, t ⁇ 7 of the T2 frame are of the first type.
  • the times t2, t5, t6, t8 of the frame T1 and t ⁇ 2, t ⁇ 5, t ⁇ 6, t ⁇ 8 of the frame T2 are of the second type.
  • the times of the first type ta and of the second tb are used in a contrary manner, this is why the times ta of the frame T2 are hatched and the times tb are not hatched.
  • the system operates, as shown in FIG. 7, for two frames, then the distribution of the times ta and tb is modified to operate during the next two frames with a new distribution of the times ta and tb, and so on.
  • the possible existence of display faults can only be fleeting and will not be annoying for an observer.
  • An electrooptical screen such as a liquid crystal screen CL has been represented by its row electrodes and its column electrodes. For simplicity, a screen is shown comprising only 15 row electrodes L1 to L15 and 15 column electrodes C1 to C15.
  • the line electrodes L1 to L15 are controlled and supplied by an addressing circuit ADD.L.
  • the column electrodes C1 to C15 are controlled and supplied by an addressing circuit ADD.C.
  • This one was represented by a register comprising as many stages as there are column electrodes.
  • This addressing register receives its control information from an inversion register IN which provides for each column electrode a bit 0 or 1
  • An IN.V inversion circuit makes it possible to invert the content of each stage of the IN inversion register.
  • An inversion control circuit C.INV triggers the operation of the inversion circuit INV.
  • All of these circuits are placed under the control of a central control circuit CC, the operation of which is controlled by a frame frequency generator GFT and a line time clock HT.
  • the HT clock provides a line time signal CK at regular intervals and controls the display, by the circuit CC and the addressing circuit ADD.L (signal CC1), of a line of the screen by application of 'a potential such as + V DD on the line to be displayed and a potential such as + V1 on all the other lines of the matrix as has been described in relation to FIG. 2.
  • each line time signal CK controls the recording in the register IN of information INF 1/15 to be displayed on the line to be controlled.
  • This information consists of as many binary elements 0 or 1 as there are column electrodes. These bits are transmitted to the column electrodes C1 to C15 by an address register ADD.C. Thus, at each line time signal, information INF 1/15 is displayed on the column electrodes C1 to C15.
  • the inversion control circuit C.INV pseudo-randomly controls the control of the screen in time of type ta or in time of type tb. Under the control of this circuit C.INV, the circuit INV reverses the value of each binary element 0 or 1 contained in each stage of the register IN. The content of the address register ADD.C is also inverted in the same way and the potentials applied to the column electrodes C1 to C15 are also inverted. Simultaneously, the circuit C.INV controls, in the addressing circuit ADD.L, the inversion of the line potentials applied to the line electrodes L1 to L15.
  • the DC control circuits and the C.INV circuit authorize such operation for a whole frame time, the C.INV circuits controlling switching of control voltages from time ta to tb and vice versa.
  • the C.INV circuit reverses the use of times ta and tb.
  • the C.INV circuit renews the operation of the screen for the two frames which follow the two frames which have just been displayed and so on.
  • the circuit C.INV modifies, every two frames, the distribution of times of the first type ta and of the second type tb.
  • FIG. 9 represents an exemplary embodiment of the C.INV inversion control circuit produced in the form of a pseudo-random sequence generator. It includes a shift register RD. The number of stages in this register is such that the number of bit combinations it provides covers the number of lines of the liquid crystal screen. For a liquid crystal screen of fifteen lines we therefore take a 4 floors. This register therefore has 4 inputs, 4 outputs, an offset input (DEC) and a clock input (CK).
  • DEC offset input
  • CK clock input
  • FIG. 9 comprises a door with two inputs to which are connected the outputs of stages 1 and 4 of the RD register.
  • This gate delivers a level 1 signal when its two inputs are at different logic levels (one at level 0 and the other at level 1). It delivers a signal of level 0 in the case where the two inputs are at the same logic level (either 0 or 1).
  • This output signal is applied to the offset input DEC of the register RD. It is also supplied on a V S link to be used as a reverse control signal.
  • the register RD receives on its inputs a loading word CHR such as the word 1001 as indicated in FIG. 9. From this word, the content register RD takes at each clock pulse CK a different value by shifting its content to the left and by entering a binary element 0 or 1, depending on the state of gate P3, in stage 1 of the register.
  • a loading word CHR such as the word 1001 as indicated in FIG. 9.
  • FIG. 10 illustrates an operating diagram of the circuit of FIG. 9.
  • a loading word CHR is loaded as indicated in FIG. 10.
  • the register RD receives the different clock pulses CK.
  • a signal is then obtained at the output V S having the form indicated on the line V S in FIG. 10.
  • the values of the signal V S of logic level 1 would command, for example, the control of the screen by positive voltages and the values of the signal V S of logic level O would command the control of the screen by negative voltages.
  • the circuits detailed in FIG. 11 allow this operation to be implemented on several frames.
  • the GFT frame generator supplies a CH frame frequency signal to a frequency divider D1 by two.
  • This divider D1 during the different successive frames, alternately supplies a level 1 signal and a signal level 0.
  • This signal is applied to a P2 gate of the EXCLUSIVE OR type having two inputs and which also receives the inversion control signal.
  • Gate P2 therefore provides an inversion control signal which is identical to the signal V S when the divider D1 supplies a level 0 signal and which reverses the signal V S when the divider D1 supplies a level 1 signal.
  • the circuits of FIG. 11 also allow the loading word CHR supplied to the register RD to be changed during operation.
  • a counter CP having as many outputs as the register RD has inputs provides a loading word to the register RD.
  • a frequency divider D2 by two receives the signal supplied by the divider D1. It controls the advancement of the counter CP every two frames. Each time the counter CP advances, the loading word CHR changes value. Thus the loading word CHR supplied to the register RD remains the same for two frames allowing the reverse operations on two frames as explained above. During the following two frames, this operation is repeated with a different loading word.
  • the detection is carried out by a gate P1 of the NAND type with 6 inputs connected to the outputs of the counter CP and the output of which is connected to a gate P4 of the EXCLUSIVE OR type. Forcing is carried out by gate P4 which receives a signal CP counter output and P1 gate output signal. Gate P4 controls an entry in the RD register.
EP87402277A 1986-10-17 1987-10-13 Verfahren zur Steuerung einer elektrooptischen Matrixanzeige und dafür geeignete Steuerungsschaltung Expired - Lifetime EP0265326B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8614413A FR2605444A1 (fr) 1986-10-17 1986-10-17 Procede de commande d'un ecran matriciel electrooptique et circuit de commande mettant en oeuvre ce procede
FR8614413 1986-10-17

Publications (2)

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EP0265326A1 true EP0265326A1 (de) 1988-04-27
EP0265326B1 EP0265326B1 (de) 1991-02-06

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US (1) US5055833A (de)
EP (1) EP0265326B1 (de)
JP (1) JP2930949B2 (de)
DE (1) DE3767964D1 (de)
FR (1) FR2605444A1 (de)
WO (1) WO1988002909A1 (de)

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FR2605444A1 (fr) 1988-04-22
WO1988002909A1 (fr) 1988-04-21
DE3767964D1 (de) 1991-03-14
JPH01501101A (ja) 1989-04-13
US5055833A (en) 1991-10-08
EP0265326B1 (de) 1991-02-06
JP2930949B2 (ja) 1999-08-09

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