EP0362071A1 - Verfahren zur Adressierung eines ferroelektrischen Flüssigkristallanzeigeschirms mit chiral-smektischer Phase - Google Patents

Verfahren zur Adressierung eines ferroelektrischen Flüssigkristallanzeigeschirms mit chiral-smektischer Phase Download PDF

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Publication number
EP0362071A1
EP0362071A1 EP89402673A EP89402673A EP0362071A1 EP 0362071 A1 EP0362071 A1 EP 0362071A1 EP 89402673 A EP89402673 A EP 89402673A EP 89402673 A EP89402673 A EP 89402673A EP 0362071 A1 EP0362071 A1 EP 0362071A1
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EP
European Patent Office
Prior art keywords
line
signals
pulse
duration
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP89402673A
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English (en)
French (fr)
Inventor
Jean Dijon
Thierry Leroux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
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Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP0362071A1 publication Critical patent/EP0362071A1/de
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes

Definitions

  • the present invention relates to a method for addressing a ferroelectric liquid crystal screen having a chiral smectic phase. It finds an application in optoelectronics, in television and mainly in the binary (or analog) display of complex images or in the display of alpha-numeric characters.
  • Liquid crystal display screens of this kind are well known and in particular described in documents EP-A-0 092 181 and EP-A-0 032 362. The main known characteristics will be recalled here.
  • Such a display device shown schematically in longitudinal section in FIG. 1, generally comprises a first linear polarizer 2 and a second crossed linear polarizer 4 between which is inserted a sealed display cell 6.
  • This display cell operating in transmission, is formed by two transparent insulating walls 10 and 12, generally made of glass. These walls, parallel to each other, are made integral by their edges by means of a weld 14 serving as seal.
  • the walls 10 and 12 are respectively covered with an electrode 16 and a counter-electrode 18 of a shape suitable for display, made of a transparent conductive material.
  • the electrode and the counter-electrode are in particular each formed of parallel conductive strips, or row conductors and column conductors, forming the elements of the matrix addressing network of the screen.
  • the row conductors and the column conductors are crossed at right angles and each crossing point defines a pixel of the image in the liquid crystal.
  • the magnitude Vt is shown on the abscissa, which is homogeneous to the product of a potential difference by the time of application of this potential difference.
  • the two stable states of the pixels have been represented, namely for the abscissa axis the black state (state 0) and for the upper part of the graph, the white state (state 1) of this same pixel.
  • a frame, or set of black and white pixels of the same image, is always written line by line, each line being "opened” successively with a signal VL applied during a line time TL, during which the corresponding column signals VC in the state to be written for the different pixels of this line are transmitted simultaneously to each of them.
  • the column signals VC are sent continuously to the screen on the column conductors, so that the voltage VP across the terminals of a pixel of the crystal is never zero, but equal either to VL-VC or to VC.
  • FIGS. 3a and 3b show two types of line signals which are represented in FIGS. 3a and 3b and each consisting of two consecutive pulses of the same duration and of the same amplitude but of opposite direction of a type to the other.
  • Figure 3a shows the signals of the first type
  • Figure 3b shows the signals of the second type.
  • a line signal VL consisting of a first positive pulse of duration ⁇ and amplitude VL followed by a negative symmetrical pulse of amplitude -VL and also duration ⁇ .
  • the line opening time TL which is of the order of 50 microseconds corresponds to the time 2 ⁇ during which the signal VL is present.
  • the preceding addressing process which represents the state of the art closest to the invention requires, for the writing of a total image, two consecutive frames, namely one using the sequences of FIG. 3a which makes it possible to write the blacks and to maintain the white pixels and the other using the sequences of FIG. 3b during which the white pixels are written and the black pixels are maintained.
  • This process with two separate fields for writing blacks and whites therefore has a major drawback which is the lengthening to 4 ⁇ of the time necessary to write a line, since each line is addressed twice for the registration of a single image, namely once to write the whites and once to write the blacks.
  • the present invention specifically relates to a method of addressing a ferroelectric liquid crystal display screen with chiral smectic phase which makes it possible to overcome the above drawbacks and to achieve faster and more efficient addressing using means whose implementation is as simple as for the methods of the prior art.
  • This method of addressing a ferroelectric liquid crystal display screen with chiral smectic phase comprising a cell enclosing the crystal and associated with linear polarization means provided on its walls with two matrix systems of row conductors and column conductors with angle right, the different pixels of the image being defined by the superimposed crossings of these conductors, the switching from black to white (or vice versa) of each pixel being under the dependence of the electric field E applied to this pixel from the difference of potential V established for a time t between the row conductor and the column conductor relating to this pixel, this switching being effective as soon as the product Vt exceeds a threshold value (Vt) threshold function of the geometrical and dielectric parameters of the cell, l writing of the screen taking place for each image or frame sequentially line by line, line i being open to writing for the time TL-2 ⁇ by a line signal VLi, the signals VC corresponding to the black state ( VCN) or white (VCB) of each pixel of this line are transmitted simultaneously by
  • the addressing method is also characterized in that: - the line signals VLi belong to two distinct types, the sum of which has a zero mean value, namely: signals of a first type having a positive pulse of amplitude VL of duration k ⁇ followed by a negative pulse of amplitude -VL of duration ⁇ ; signals of a second type having a negative pulse of amplitude -VL of duration k ⁇ followed by a positive pulse of amplitude VL of duration ⁇ ; the associated column signals are alternating signals composed of two consecutive pulses of duration ⁇ and of respective amplitude + VC and -VC for the signal VCB for writing white and -VC and + VC for the signal VCN for writing of black ; the second pulse of the column signals is in synchronism with the second pulse of the line signal, and constitutes the writing pulse proper which either confirms the prior writing state of the pixel concerned, or else the reverse; - the line addressing signals of the two types are used in equal number during
  • the line signals VLi belong to two complementary types (the sum of two of them has a zero mean value).
  • the writing amplitude VL and the duration k ⁇ of the first pulse constituting the line signal are chosen so that there is switching, either in the white state or in the black state, of the pixel being d 'writing before the arrival of the second pulse of the column signal VC carrying the information relating to the image considered.
  • the line time is equal to 2 ⁇ and each column signal VC thus comprises a first part or pulse for balancing the signal and a second part or active pulse for writing proper, of sign opposite to the balancing pulse.
  • the addressing method is characterized in that: - the line signals VLi belong to two distinct types, the sum of which has a zero mean value, namely: - signals of a first type having a first amplitude pulse
  • This second particular mode differs from the first previous mode essentially by the following two characteristics: on the one hand, some of the signals of columns VC are signals at zero voltage or if one prefers absence of signals and on the other hand, the second category column signals which consist of two equal pulses and of opposite direction have a writing phase of duration ⁇ in synchronism with the second part of the line signal and a balancing phase which is after or before the signal proper writing depending on whether they are line signals of the first type or line signals of the second type.
  • this same equality of use of the line signals VLi of the two types is achieved by practicing line-to-line and frame-to-frame interleaving in the following manner: the line i and the line i + 1 receive during the frame p of the line addressing signals of the first and second types respectively, while these same lines i and i + 1 receive, during the frame p + 1, line addressing signals of the second and first types respectively.
  • Figure 4 shows all the signals of rows and columns used in the first embodiment of the addressing method which is the subject of the invention.
  • VL which consists of a first positive pulse of duration k ⁇ , and of amplitude + VL.
  • the duration k ⁇ and the amplitude VL are chosen in accordance with the invention so that a switching of the addressed pixel, for example in the white state, is obtained before the arrival of the column pulse VC corresponding to the writing.
  • the proportionality coefficient k is not necessarily an integer; it must only be greater than 1 and can in particular be fractional.
  • VCN column signals for writing black and VCB for writing white have the form, the amplitude and the phase represented in the figure, and they last during all the line opening time TL-2 ⁇ .
  • the different pulses of rows, columns and pixel voltage are described in the case where the row signal used is of the second type, namely has a negative pulse of amplitude -VL and of duration k ⁇ followed by a positive pulse of amplitude + VL and of duration ⁇ .
  • the first negative pulse of the line signal VL has a duration k and an amplitude -VL such that the switching to the black state of the addressed pixel is ensured, and this before the arrival of all write pulses from the columns.
  • two column pulses VC have been represented having the same phases and separated by the dead time tm, the latter being by definition equal to the time which elapses between the end of the writing of the line i and the start of writing the line i + 1.
  • tm dead time
  • FIG. 6 represents the situation of the same pulses in the case where no dead time is used and where the column signals VC relating to the same column j and to the line i and to the line i + 1 are directly juxtaposed in time.
  • the advantages of this signal structure are the same as before and the precise study of the conditions imposed on the different parameters for the system to be consistent shows that the value of k must then obey the inequality 1 ⁇ k ⁇ 3 for the addressing according to the first mode and with the inequality 1 ⁇ k ⁇ 2 for addressing according to the second mode.
  • FIG. 7 makes it possible to understand the main advantage which there is in separating by a dead time tm two consecutive column signals.
  • the problem which we seek to solve by this arrangement is that which arises at the borders of the white and black zones, where disturbances of the image may occur as a result of the following phenomenon.
  • FIG. 8a relates to the line signals and to the column signals in association with a line signal of the first type, that is to say comprising a first pulse of width k ⁇ of amplitude -VL followed by a second pulse of amplitude + VL and of width ⁇ , the first pulse of amplitude -VL and of width k ⁇ being chosen intentionally and in accordance with the invention so as to switch the addressed pixel towards the black state.
  • the black write column signal is a signal at zero voltage, or if there is an absence of signal
  • the white write column signal VCB is an alternating signal composed of two amplitude pulses - VC and + VC and of duration ⁇ .
  • FIG. 8b describes the row and column signals associated with the row signals VL of the second type, which start with a pulse of amplitude + VL and of width k ⁇ followed by a second pulse of negative amplitude -VL and of width ⁇ .
  • the writing column signal of the black VCN is identical to the writing column signal of the white VCB in FIG. 8a, but appears in time at a time ⁇ earlier, c that is to say before the end of the first pulse of the line signal VL. It is also verified under these conditions that the signal VCN causes the written pixel to switch to black while the signal VCB at zero voltage naturally maintains this same pixel in the white state obtained by application of the only line signal VL.
  • the signals of non-zero columns consist of two equal pulses of opposite sign, one of which corresponds to the writing and the other to the balancing of the zero mean value of the voltage applied to the crystal. liquid.
  • the family of signals of FIG. 8a it is the first pulse of the column signal which is used for writing whereas in the family of the signals of FIG. 8b, it is the second pulse of this same column signal which corresponds to this writing.
  • the signals of FIGS. 8a and 8b can be used with a dead time of duration tm between two consecutive column signals belonging to two rows i and i + 1 and then the parameters ⁇ , k and tm must satisfy the inequality ⁇ ⁇ k ⁇ ⁇ 2 ⁇ + 2tm.
  • the lines of a frame are addressed with line signals of the first type and the lines of the following frame with line signals of the second type.
  • the line signals are interleaved both by line and by frame, which leads to the following diagram: line i and line i + 1 receive, during frame p, addressing signals lines respectively of the first and the second types, while these same lines i and i + 1 receive, during the frame p + 1, signals for addressing lines of the second and first type respectively.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)
EP89402673A 1988-09-30 1989-09-28 Verfahren zur Adressierung eines ferroelektrischen Flüssigkristallanzeigeschirms mit chiral-smektischer Phase Withdrawn EP0362071A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8812811 1988-09-30
FR8812811A FR2637408A1 (fr) 1988-09-30 1988-09-30 Procede d'adressage d'un ecran d'affichage a cristaux liquides ferroelectriques a phase smectique chirale

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EP0362071A1 true EP0362071A1 (de) 1990-04-04

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EP89402673A Withdrawn EP0362071A1 (de) 1988-09-30 1989-09-28 Verfahren zur Adressierung eines ferroelektrischen Flüssigkristallanzeigeschirms mit chiral-smektischer Phase

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EP (1) EP0362071A1 (de)
JP (1) JPH02148018A (de)
FR (1) FR2637408A1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0632425A1 (de) * 1993-06-29 1995-01-04 Central Research Laboratories Limited Adressierung einer Matrix von bistabiler Pixeln
FR2725546A1 (fr) * 1994-10-05 1996-04-12 Nippon Denso Co Dispositif d'affichage a cristaux liquides en matrice utilisant la caracteristique d'hysteresis des cristaux pour l'affichage d'une image fixe, et son procede d'attaque

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3235143A1 (de) * 1982-09-23 1984-03-29 BBC Aktiengesellschaft Brown, Boveri & Cie., 5401 Baden, Aargau Verfahren zur ansteuerung einer multiplexierbaren, bistabilen fluessigkristallanzeige
EP0176763A1 (de) * 1984-09-05 1986-04-09 Hitachi, Ltd. Flüssigkristallbauelement und Verfahren zu dessen Betrieb
EP0214857A2 (de) * 1985-09-06 1987-03-18 Matsushita Electric Industrial Co., Ltd. Verfahren zur Ansteuerung eines Flüssigkristallrasterbildschirmes
US4765720A (en) * 1986-07-22 1988-08-23 Canon Kabushiki Kaisha Method and apparatus for driving ferroelectric liquid crystal, optical modulation device to achieve gradation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3235143A1 (de) * 1982-09-23 1984-03-29 BBC Aktiengesellschaft Brown, Boveri & Cie., 5401 Baden, Aargau Verfahren zur ansteuerung einer multiplexierbaren, bistabilen fluessigkristallanzeige
EP0176763A1 (de) * 1984-09-05 1986-04-09 Hitachi, Ltd. Flüssigkristallbauelement und Verfahren zu dessen Betrieb
EP0214857A2 (de) * 1985-09-06 1987-03-18 Matsushita Electric Industrial Co., Ltd. Verfahren zur Ansteuerung eines Flüssigkristallrasterbildschirmes
US4765720A (en) * 1986-07-22 1988-08-23 Canon Kabushiki Kaisha Method and apparatus for driving ferroelectric liquid crystal, optical modulation device to achieve gradation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0632425A1 (de) * 1993-06-29 1995-01-04 Central Research Laboratories Limited Adressierung einer Matrix von bistabiler Pixeln
FR2725546A1 (fr) * 1994-10-05 1996-04-12 Nippon Denso Co Dispositif d'affichage a cristaux liquides en matrice utilisant la caracteristique d'hysteresis des cristaux pour l'affichage d'une image fixe, et son procede d'attaque
US5917466A (en) * 1994-10-05 1999-06-29 Nippondenso Co., Ltd. Matrix liquid crystal display using liquid crystal hysteresis characteristics for still picture display

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FR2637408A1 (fr) 1990-04-06
JPH02148018A (ja) 1990-06-06

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