EP0641475B1 - Darstellungsverfahren von verschiedenen grauwerten und system zur durchführung dieses verfahrens. - Google Patents
Darstellungsverfahren von verschiedenen grauwerten und system zur durchführung dieses verfahrens. Download PDFInfo
- Publication number
- EP0641475B1 EP0641475B1 EP93910133A EP93910133A EP0641475B1 EP 0641475 B1 EP0641475 B1 EP 0641475B1 EP 93910133 A EP93910133 A EP 93910133A EP 93910133 A EP93910133 A EP 93910133A EP 0641475 B1 EP0641475 B1 EP 0641475B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- screen
- sub
- brightnesses
- transcoding
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
- G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
Definitions
- the invention relates to a method for displaying different levels of gray and a system for implementing this method.
- the display system of the invention applies, in particular, to microtip screens.
- shade of gray covers that of "shades of color”.
- the analog solution can give satisfaction for television applications.
- current technology for matrix screen control circuits only allows sampling rates of around 5 MHz, which is insufficient for computer applications.
- the "data" clock for a VGA screen (current screen size standard) is around 25 MHz.
- IT we have a digital data source.
- An analog control mode therefore requires an additional step of transformation of the source signal by means of a digital-analog converter.
- a time modulation of the FRC (Frame Rate Control) type consists in carrying out several scans of the image by successively assigning "ON” or "OFF” states to the same image elements, the eye acting as an integrator.
- This modulation is also limited in number of shades of gray, because the multiple addressing of the same picture element leads, on the one hand, to high frequencies at the level of the data flow at the input of the circuits and, on the other hand, at too short selection periods on the outputs.
- STN Super Twisted Nematic or Multiplexed LCD
- Such a method is illustrated in European patent applications EP-0-384 403 A2 -SEIKO and EP-0-364 307 A2 -COMPAQ.
- One method using multi-level circuits consists in using circuits which can switch N different voltage levels (in practice, N-8 or N-16).
- the analog output multiplexer ensuring the switching of fairly high voltages, its size "silicon" is relatively large.
- Such multi-level circuits can be associated with the FRC method, as described in the article by H. Mano, T. Furukashi and T. Tanaka, entitled “Multicolor Display Control Method for TFT-LCD” (SID 91 Digest pages 547 at 550).
- Frame 1 is representative of the least significant and is obtained by using a first set of eight voltages applied to the multiplexers, the second, representative of the most significant, being made by means of a second set of eight voltages distinct from the first.
- Figure 1 illustrates this method by giving an example of a block diagram for sixty four gray levels with two sets of eight different tension levels.
- a source 10 of digital data to be displayed delivers these digital data to three logical multiplexers 11 with two inputs and one output, the bits of weight 1, 2 and 4 being respectively connected to a first input of these multiplexers 11, the weight bits 8, 16 and 32 being respectively connected to the second input of these multiplexers 11.
- the three outputs of these multiplexers are respectively connected to three data storage circuits 12 comprising shift registers associated with storage registers.
- a generator 15 supplies a first set of eight voltages V oa to V 7a and a second set of eight voltages V Ob to V 7b which are two by two connected to the inputs of seven "high" multiplexer 14 with two inputs and one output.
- a controller 16 connected to the data source 10 delivers a control signal ST which is sent to each of the logic multiplexers 11 and to each of the "high" voltage multiplexers 14.
- a circuit 13 for column control of the screen 17 receives on the one hand the outputs of the circuits 12 and, on the other hand, those of the "high" voltage multiplexers 14.
- This control circuit 13 is formed of eight analog multiplexers with eight inputs and an output.
- the line control circuit has not been shown. It can be a conventional circuit, using for example shift registers, making it possible to successively select the lines of the screen one by one.
- the data source includes a memory for storing data corresponding to a screen page.
- the signal ST connected to all the multiplexers 11 and 14, with two inputs and one output, is a selection signal multiplexer by frame parity.
- Such a method requires sixteen voltage values for sixty four gray levels (and twenty four if it is to be applied to two hundred fifty six levels over three fields) with fairly important details.
- the combination of the tension values is done according to an increasing or decreasing arrangement.
- the invention also relates to a system allowing the implementation of this gray level display method digitally on a matrix screen.
- the screen controller is linked to the data storage system.
- the data storage system includes shift registers associated with storage registers.
- the screen column control circuit comprises several circuits making it possible to select a voltage from among several discrete voltages, this voltage controlling the column considered in the screen.
- the screen controller is linked directly to the screen control means.
- the transcoding circuit comprises transcoding sub-matrices each corresponding to a sub-time.
- the data storage system comprises parallel shift registers each associated with a register and each linked to a transcoding sub-matrix.
- the screen column control circuit includes circuits allowing a voltage to be selected from among several discrete voltages, this voltage controlling the relevant column of the screen and digital multiplexers linked to the controller and disposed between the associated registers and said circuits.
- the system of the invention makes it possible to mix the only time mode (PWM method: division of the line time into S line sub-time) and the mode only in voltage (choice between n output voltages for the column circuit), in a mixed time / voltage mode with a distribution grid which, while avoiding both code "holes" and loss of luminance, makes it possible to achieve a large number of gray levels with a minimum of time and voltage inputs.
- PWM method division of the line time into S line sub-time
- the mode only in voltage choice between n output voltages for the column circuit
- line sub-time we will also discuss line sub-time. Indeed, during the selection of the same row, it is envisaged to be able to apply to the columns (therefore to the same pixels) S successive information during S row sub-time of duration equal to T R / S. However, if the use of line sub-time is preferable in the case of microtip screens, the method of the invention applies identically in the case of the use of sub-frames (in the case of TFT-LCD or Thin Film Transistor Type Liquid Crystal Displays).
- the number of voltages used is equal to the number of levels switchable by the analog output multiplexers.
- a transcoding matrix which can be for example a PROM (Programmable Read Only Memory), which directly supplies the address of the voltage to be validated on the analog multiplexer of the output considered.
- N voltages which are adjusted so that we can describe the Q s desired shades of gray.
- the selected voltage is therefore switched directly to the screen column control circuit 24.
- This circuit 24 is here produced by several analog multiplexers 26 with eight inputs and one output.
- the controller 21 supplies a given clock CK, a line end of sequence signal LE, a line synchronization clock HL and counting signals SC (sequence counter) which give the number of the sub- current time.
- a shift register with p inputs receives this word of p bits.
- a clock stroke CK passes it into the first register 28, each clock stroke CK coming to advance it by one box in the registers 28.
- the signal LE is validated and the preceding words pass into the associated registers 29.
- the transcoding circuit 22 is constituted by the juxtaposition of S sub-matrices 30 which make it possible to process in parallel the data corresponding to the S sub-time lines.
- the screen driver assembly 23, 24 consists of S shift register subsets 31 + associated registers 33 of p bits.
- the data corresponding to the S line sub-times are thus stored in the associated registers 33 and presented to the inputs of the p logic multiplexers 32 among S.
- the signals HL (line synchronization clock) and LE (end of line sequence) are identical.
- the logic multiplexers 32 controlled by the line sub-time counter, make it possible to switch the word of the sub-time considered to the analog output multiplexer 26 which thus validates the preselected voltage.
- the system of the invention requiring a measurement of the screen brightness for a given adjustment, it is advantageously possible to reserve an area outside the pupil addressed in a similar manner to the rest of the screen and coupled to a photodiode.
- Such a device, coupled to a controller makes it possible to automatically readjust the various output voltages of the circuits.
- Each voltage level Vi is associated with a level L (vi) of luminance (or of transmission for a passive screen). To perform the temporal sum of S luminance levels and thus reach a large number of grays, it is necessary to assign coefficients to these N luminance levels.
- Q 5 be the number of grays we wish to display. This number Q s not necessarily meeting the number Q of gray possible, it is necessary to adapt the value of K a to Q s , that is: the optimum being the smallest possible integer meeting this criterion.
- K a must be less than (Q-1) / S, K a must be less than 65.
- K a must be less than (Q-1) / S, K a must be less than 65.
- the coefficients K x with x ranging from 1 to a are assigned to groups of four luminances.
- the Q s gray levels given in the following table can be obtained by associating with each of these signals, three luminances (one with each of the sub-times T 0 T 1 and T 2 ).
- the groups of four coefficients in general are built on the model K x -2S, K x - (S + 1), K x -1, K x , with x going from 1 to a.
- the combination of the S values is preferably done in an increasing or decreasing arrangement.
- FIG. 6 a column signal using an increasing arrangement for successive rows R j , R (j + 1), R (j + 2), R (j + 3), being the index of the row , and in FIG. 7, a column signal using an increasing then decreasing arrangement.
- Redundancy can also be used by producing several combinations for the same gray and by rotating these different combinations from one column output to the other (in the event of optical effects linked to code reversals).
- a command mode making it possible to describe more than 256 gray levels can be useful for obtaining an image with a palette of gray having a response closer to a real image (correction of y).
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Claims (7)
dadurch gekennzeichnet,
und dadurch, daß diese N wählbaren Helligkeiten erzeugt werden durch Einstellen der N Spannungen V0 ,...., VN-1, und ermöglichen, eine Anzahl Q (Q≥QS) von wählbaren Helligkeiten zu erhalten, gleich :
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9206206 | 1992-05-21 | ||
FR9206206A FR2691568B1 (fr) | 1992-05-21 | 1992-05-21 | Procede d'affichage de differents niveaux de gris et systeme de mise en óoeuvre de ce procede. |
PCT/FR1993/000481 WO1993023841A1 (fr) | 1992-05-21 | 1993-05-18 | Procede d'affichage de differents niveaux de gris et systeme de mise en ×uvre de ce procede |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0641475A1 EP0641475A1 (de) | 1995-03-08 |
EP0641475B1 true EP0641475B1 (de) | 1996-08-21 |
Family
ID=9430033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP93910133A Expired - Lifetime EP0641475B1 (de) | 1992-05-21 | 1993-05-18 | Darstellungsverfahren von verschiedenen grauwerten und system zur durchführung dieses verfahrens. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5638091A (de) |
EP (1) | EP0641475B1 (de) |
JP (1) | JP3453141B2 (de) |
DE (1) | DE69304199T2 (de) |
FR (1) | FR2691568B1 (de) |
WO (1) | WO1993023841A1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6025818A (en) * | 1994-12-27 | 2000-02-15 | Pioneer Electronic Corporation | Method for correcting pixel data in a self-luminous display panel driving system |
JP3922736B2 (ja) * | 1995-10-18 | 2007-05-30 | 富士通株式会社 | 液晶表示装置 |
JP3417246B2 (ja) | 1996-09-25 | 2003-06-16 | 日本電気株式会社 | 階調表示方法 |
US6016132A (en) * | 1997-01-22 | 2000-01-18 | Kabushiki Kaisha Toshiba | Gradation controlled LED display device and method for controlling the same |
US5898415A (en) * | 1997-09-26 | 1999-04-27 | Candescent Technologies Corporation | Circuit and method for controlling the color balance of a flat panel display without reducing gray scale resolution |
US6169529B1 (en) * | 1998-03-30 | 2001-01-02 | Candescent Technologies Corporation | Circuit and method for controlling the color balance of a field emission display |
US6100863A (en) * | 1998-03-31 | 2000-08-08 | Matsushita Electric Industrial Co., Ltd. | Motion pixel distortion reduction for digital display devices using dynamic programming coding |
KR100292405B1 (ko) * | 1998-04-13 | 2001-06-01 | 윤종용 | 오프셋 제거 기능을 갖는 박막트랜지스터 액정표시장치 소스드라이버 |
JP2000029439A (ja) * | 1998-07-13 | 2000-01-28 | Seiko Instruments Inc | 液晶表示回路 |
KR100486282B1 (ko) * | 2002-11-16 | 2005-04-29 | 삼성전자주식회사 | 에스티엔(STN :Super TvistedNematic) 액정 표시 장치 구동 회로 및 구동 방법. |
JP2006221060A (ja) * | 2005-02-14 | 2006-08-24 | Sony Corp | 映像信号処理装置、映像信号の処理方法、映像信号の処理プログラム及び映像信号の処理プログラムを記録した記録媒体 |
US9792866B2 (en) * | 2005-12-02 | 2017-10-17 | Flextronics Computing Mauritus Ltd. | Detecting and eliminating method for ghosting effect of LCD |
KR20140030473A (ko) * | 2012-08-30 | 2014-03-12 | 삼성전자주식회사 | 멀티 뷰 영상 처리 방법 및 이를 수행하는 장치 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2622724B1 (fr) * | 1987-10-30 | 1993-02-12 | Thomson Csf | Dispositif de generation de niveaux de brillance sur un ecran de visualisation |
FR2632436B1 (fr) * | 1988-06-01 | 1991-02-15 | Commissariat Energie Atomique | Procede d'adressage d'un ecran matriciel fluorescent a micropointes |
US4921334A (en) * | 1988-07-18 | 1990-05-01 | General Electric Company | Matrix liquid crystal display with extended gray scale |
EP0391655B1 (de) * | 1989-04-04 | 1995-06-14 | Sharp Kabushiki Kaisha | Ansteuerschaltung für ein Matrixanzeigegerät mit Flüssigkristallen |
US5198803A (en) * | 1990-06-06 | 1993-03-30 | Opto Tech Corporation | Large scale movie display system with multiple gray levels |
JP2659473B2 (ja) * | 1990-09-28 | 1997-09-30 | 富士通株式会社 | 表示パネル駆動回路 |
EP0478386B1 (de) * | 1990-09-28 | 1995-12-13 | Sharp Kabushiki Kaisha | Steuerschaltung für ein Anzeigegerät |
US5103144A (en) * | 1990-10-01 | 1992-04-07 | Raytheon Company | Brightness control for flat panel display |
JP2743683B2 (ja) * | 1991-04-26 | 1998-04-22 | 松下電器産業株式会社 | 液晶駆動装置 |
US5495287A (en) * | 1992-02-26 | 1996-02-27 | Hitachi, Ltd. | Multiple-tone display system |
-
1992
- 1992-05-21 FR FR9206206A patent/FR2691568B1/fr not_active Expired - Fee Related
-
1993
- 1993-05-10 US US08/338,570 patent/US5638091A/en not_active Expired - Lifetime
- 1993-05-18 EP EP93910133A patent/EP0641475B1/de not_active Expired - Lifetime
- 1993-05-18 DE DE69304199T patent/DE69304199T2/de not_active Expired - Lifetime
- 1993-05-18 WO PCT/FR1993/000481 patent/WO1993023841A1/fr active IP Right Grant
- 1993-05-18 JP JP51995393A patent/JP3453141B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69304199D1 (de) | 1996-09-26 |
JP3453141B2 (ja) | 2003-10-06 |
FR2691568A1 (fr) | 1993-11-26 |
WO1993023841A1 (fr) | 1993-11-25 |
FR2691568B1 (fr) | 1996-12-13 |
US5638091A (en) | 1997-06-10 |
JPH07507158A (ja) | 1995-08-03 |
DE69304199T2 (de) | 1997-03-06 |
EP0641475A1 (de) | 1995-03-08 |
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