Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
  • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
  • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
  • H01L21/565—Moulds
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
  • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
  • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
  • B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
  • B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
  • B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
  • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
  • B29C70/00—Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts
  • B29C70/68—Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts by incorporating or moulding on preformed parts, e.g. inserts or layers, e.g. foam blocks
  • B29C70/72—Encapsulating inserts having non-encapsulated projections, e.g. extremities or terminal portions of electrical components
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
  • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
  • H01L2224/45001—Core members of the connector
  • H01L2224/45099—Material
  • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
  • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
  • H01L2224/45144—Gold (Au) as principal constituent
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/4805—Shape
  • H01L2224/4809—Loop shape
  • H01L2224/48091—Arched
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/42—Wire connectors; Manufacturing methods related thereto
  • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
  • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
  • H01L2224/481—Disposition
  • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
  • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
  • H01L2924/151—Die mounting substrate
  • H01L2924/156—Material
  • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
  • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
  • H01L2924/15747—Copper [Cu] as principal constituent
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/30—Technical effects
  • H01L2924/301—Electrical effects
  • H01L2924/3025—Electromagnetic shielding
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49121—Beam lead frame or beam lead device
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
  • Y10T29/49155—Manufacturing circuit on or in base
  • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
  • Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating
  • Y10T29/49172—Assembling electrical component directly to terminal or elongated conductor with encapsulating by molding of insulating material

Definitions

• the present invention relates to the encapsulation of integrated circuits.
• the first consists in using as a support strip a cut metal grid (copper grid for example) which comprises, for each component location, on the one hand a base for receiving an integrated circuit chip and on the other hand individual conductors serving as external connection pins for the integrated circuit.
• a cut metal grid copper grid for example
• the conductors constituting the external pins are connected to each other by elements of the grid and they are therefore short-circuited with respect to each other. It's not that at the time of detachment of an individual component with a view to its mounting, the pins are shorted by cutting the elements which connect the conductors together.
• the second type of manufacturing consists in using as a support strip a dielectric film (in general a polyimide) on which is formed a pattern of thin film conductors, conductors which, again, will serve as external pins for the component during its mounting. on a printed circuit.
• the conductors are printed on the dielectric film; it is therefore the dielectric film which ensures their mechanical strength, even if in places this film has openings over which the conductors pass. It is not necessary to provide connecting elements between the various conductors to ensure the mechanical rigidity of these.
• the first problem is that of testing integrated circuits, the second is that of their protection.
• the strips formed from a cut metal grid make it impossible to test the circuits as long as they are on strip since their pins are all short-circuited until separation into individual components. viduals; the test can be done on the integrated circuit chip before it is fixed on the grid and connected to the conductors of this grid (edge test); it can also be done after detaching an individual component at the time of mounting on a printed circuit, but it is too late because it is preferable to deliver rolls of components already tested to the user.
• thermosetting resin case For the strips formed from a conductive grid, this does not pose a problem, the protection is done by encapsulation in a thermosetting resin case; the technique is that which is commonly used for the production of integrated circuits in a plastic case. This technique is that of transfer molding consisting in placing the grid carrying the chips in a mold, and in injecting a thermosetting resin around the assembly.
• thermosetting resin is injected at a high temperature and deforms the dielectric tape in an irreversible manner; the deformed tape is not satisfactory from the point of view of appearance and it does not lend itself to winding in a tight reel.
• transfer molding a drop of a polymerizable resin is deposited on the chip which coats the chip and the ends of the printed conductors. connected to the chip.
• thermosetting resin e.g., epoxy-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-styrene-st
• the invention starts from the experimental observation that the deformation of the dielectric tape which makes a priori unusable the transfer molding of a thermosetting resin can be avoided by using a molding operation different from that which is usually used.
• thermosetting resin In the known techniques for encapsulating integrated circuits in thermosetting resin, molding is always used between two separable molding plates which are closed after placing the conductive grid carrying the chips between these plates; the injection of thermosetting resin is done by the joint plane between the two molding plates. This allows to clean the molding plates and the resin injection orifice easily after the molding has been carried out and the strip of encapsulated components has been removed from the mold.
• the present invention proposes to carry out a molding called tip molding, which is usually used for molding thermopiastic resins rather than thermosetting resins but which will be used here with a thermosetting resin.
• Point molding consists in injecting the resin, into the molding cavity formed between the molding plates, through an orifice which
• thermosetting resins are usually injected through the joint plane, it is because ⁇ c that these resins solidify irreversibly as they stiffen and that the injection through an orifice which does not open with the mold makes it much more difficult to clean the orifice after each molding operation.
• thermoplastic resins can be injected through an orifice which does not open with the plates
• the present invention proposes to inject this same resin, at the same temperature, but in a manner which is unusual for the circuits integrated and which is not a priori desirable for
• thermosetting resins 30 thermosetting resins.
• FIG. 1 represents a perspective view of a dielectric strip carrying printed conductors
• FIG. 2 schematically represents an enlarged section of this ribbon at the level of a chip
• FIGS. 3, -, 5, 6 represent variants of encapsulation modes of the prior art
• FIG. 7 represents, in side view, a strip of components encapsulated according to the present invention.
• FIG. 8 schematically represents the constitution of the mold allowing this encapsulation
• a continuous strip 10 of flexible dielectric material intended to support integrated circuits and to be wound up to be delivered in the form of rolls to a user can be recognized.
• the tape 10 is for example made of polyimide with a thickness of about 0.125 millimeter.
• lateral perforations 12 such as those found on the edges of cinematographic films. These perforations are intended to allow automatic continuous or step-by-step automatic advancement of the ribbon 10, both during the manufacture of the bands carrying the integrated circuits and when these bands are used for supplying components of a machine for mounting components on printed circuit boards.
• the tape 10 also includes other perforations, the role of which will be explained below.
• the tape 10 also includes electrical conductors
• printed conductors are meant conductors formed according to a
• the pattern of conductors i-h and the pattern of perforations over which these conductors pass is repeated at regular intervals along the strip 10, each pattern corresponding to the location of an integrated circuit to be mounted on the strip.
• Each driver essentially consists of three parts:
• This central part is that which will serve as an external connection pin for the integrated circuit when it is encapsulated.
• the central perforation 16 and the peripheral perforations 22 are separated 0 by bridges 2 *. dielectric material of the tape. These bridges 2 ⁇ serve to improve the mechanical strength of the conductors 14 which adhere to the dielectric both on the outside (on the side of the test pads, beyond the peripheral perforation 22) and on the side interior (on deck 24 near the interior end of the conductors).
• the central perforation 16 and the peripheral perforations 22 are combined in a single perforation, the conductors 14 then being supported only on one side and being in door to false over the entire length corresponding to the central part and the inner end. It is understood that this arrangement is only possible if this length is not too large.
• the strip of components After polymerization of the resin the strip of components is ready; the individual components can be tested using the test pads 18 corresponding to each of the external connection conductors of the integrated circuit.
• FIG. 2 corresponds to the case where bridges of dielectric tape 24 exist between the central perforation 16 and the perfo ⁇ peripheral rations 22.
• FIG. 3 corresponds to the case where there is only a central perforation and no peripheral perforation.
• FIG. 4 corresponds to the case where a rear protective sheet 30, for example made of glass cloth impregnated with epoxy resin, has been placed at the rear of the chip, before depositing the drop of resin.
• FIG. 5 corresponds to the case where the conductors formed on the dielectric tape are not soldered directly to the contact pads of the chip, but conductive bridges 32 are soldered between the printed conductors 14 and the contact pads of the chip.
• FIG. 6 corresponds to the case where wires 34 (gold or aluminum) are soldered between the printed conductors 14 and the contact pads of the chip.
• the central perforation of the dielectric tape 10 becomes unnecessary, only the peripheral perforations remain; the bridges 24 drawn in FIG. 1 then occupy all the space of the central perforation and the chip rests on the ribbon, possibly metallized at the location of the chip.
• FIG. 7 represents in section a strip of components encapsulated according to the invention.
• FIG. 8 represents in schematic section the structure of the mold used in the method according to the invention.
• This mold has two movable plates delimiting between them when they are applied one against the other (closed mold) the mold cavities corresponding to the location of each component to be coated.
• the mold has two cavities 40 and 42 allowing the two components shown in FIG. 7 to be molded simultaneously.
• the movable plates delimiting these cavities are respecti ⁇ vely an inner plate 44 and a plate known as an intermediate plate 46.
• thermosetting resin In the intermediate plate 46 is provided, terminating in each of the cavities, a respective orifice for injecting thermosetting resin, respectively 48 for the cavity 40 and 50 for the cavity 42.
• This orifice is not placed in the closing plane of the plates 44 and 46, that is to say the plane which contains the ribbon 10 during the molding operation (plane perpendicular to the sheet in FIG. 7 and s extending along the dotted line 52). '
• the injection lump for each cavity is located well away from the plane containing the ribbon 10.
• the intermediate plate 46 and the lower plate 44 are shaped, in their surfaces facing each other, so as not to crush the different parts of the dielectric tape
• the mold comprises an upper plate 54 provided with orifices (56 and 58) facing the respective injection orifices (48 and 50) of the intermediate plate, and provided with resin injection means, symbolized by respective pistons 60 and 62 capable of delivering liquid thermosetting resin from the orifices 56 and 58 of the upper plate 54 towards the orifices 48 and 50 of the intermediate plate and from there into the cavities 40 and 42.
• the orifices of the upper plate 54 are preferably cylindrical.
• Those of the intermediate plate 46 are preferably conical to facilitate the extraction of the resin "carrots" after a molding operation, that is to say the extraction of hardened resin remaining in the orifices 48 and 50 after cooling of the mold. Thanks to the process according to the invention, well protected components, encapsulated in a case of well reproducible size, are obtained by allowing storage on flexible dielectric tape allowing the individual testing of the components on tape.
• the injection orifice is not oriented vertically, that is to say perpendicular to the plane of closure of the plates, but horizontally, parallel to the plane of the ribbon 10.
• FIG. 9 represents the configuration of the mold, with such an orifice.
• the mold essentially comprises an upper plate 64 and a lower plate 66 delimiting between them, when they are closed a molding cavity 68.
• the injection is made by a horizontal piston (or pistons) 70 pushing the thermosetting resin into an orifice conical 72 of general direction parallel to the closing plane of lacquers (plane designated by the dashed line 74).
• the orifice 72 is however away from this plane and is, in this embodiment, delimited on one side by the lower plate 66 and on the other by an intermediate plate 76 which is in contact with the dielectric film 10 when 'it is placed in the mold and which therefore separates this film from the injection orifice 72.
• the method according to the invention can be used for different configurations of printed conductors, perforations of the ribbon, and of connection mode between the printed conductors and the chip, and in particular for configurations corresponding to the components of FIGS. 2 to 6.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Mechanical Engineering (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Composite Materials (AREA)
• Chemical & Material Sciences (AREA)
• Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
• Casting Or Compression Moulding Of Plastics Or The Like (AREA)
• Transmitters (AREA)
• Injection Moulding Of Plastics Or The Like (AREA)
• Details Of Aerials (AREA)

Applications Claiming Priority (2)

Publications (1)

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• 1986
  • 1986-04-30 FR FR8606333A patent/FR2598258B1/fr not_active Expired
• 1987
  • 1987-04-29 US US07/148,655 patent/US4857483A/en not_active Expired - Lifetime
  • 1987-04-29 JP JP62502800A patent/JP2759083B2/ja not_active Expired - Fee Related
  • 1987-04-29 WO PCT/FR1987/000143 patent/WO1987006763A1/fr not_active Application Discontinuation
  • 1987-04-29 EP EP87400986A patent/EP0244322B1/de not_active Expired - Lifetime
  • 1987-04-29 EP EP87902560A patent/EP0264416A1/de active Pending
  • 1987-04-29 AT AT87400986T patent/ATE64493T1/de active
  • 1987-04-29 DE DE8787400986T patent/DE3770691D1/de not_active Expired - Fee Related
  • 1987-12-30 KR KR1019870701258A patent/KR880701460A/ko not_active Application Discontinuation

Non-Patent Citations (1)

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