EA200200310A1 - Управляющий программный продукт и система обработки данных - Google Patents
Управляющий программный продукт и система обработки данныхInfo
- Publication number
- EA200200310A1 EA200200310A1 EA200200310A EA200200310A EA200200310A1 EA 200200310 A1 EA200200310 A1 EA 200200310A1 EA 200200310 A EA200200310 A EA 200200310A EA 200200310 A EA200200310 A EA 200200310A EA 200200310 A1 EA200200310 A1 EA 200200310A1
- Authority
- EA
- Eurasian Patent Office
- Prior art keywords
- command
- field
- data processing
- control program
- execution
- Prior art date
Links
- PWPJGUXAGUPAHP-UHFFFAOYSA-N lufenuron Chemical compound C1=C(Cl)C(OC(F)(F)C(C(F)(F)F)F)=CC(Cl)=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F PWPJGUXAGUPAHP-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Stored Programmes (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Communication Control (AREA)
- Circuits Of Receivers In General (AREA)
- Image Processing (AREA)
- Saccharide Compounds (AREA)
- Eye Examination Apparatus (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Facsimiles In General (AREA)
- Vehicle Body Suspensions (AREA)
- Steering Control In Accordance With Driving Conditions (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Abstract
Обеспечивают набор команд, имеющий первое поле для описания команды выполнения для обозначения содержания операции или обработки данных, которую выполняют, по меньшей мере, в одном блоке обработки, формирующем систему обработки данных, и второе поле для описания подготовительной информации в целях установки блока обработки в состояние готовности выполнить работу или обработку данных, которую выполняют согласно команде выполнения, тем самым делая возможным обеспечение программы управления, имеющей набор команд, в котором подготовительную информацию, независимую от команды выполнения, описываемой в первом поле, описывают во втором поле. Соответственно подготовку выполнения последующей команды выполнения осуществляют на основе подготовительной информации. Поскольку в наборе команд адрес назначения команды ветвления описывают во втором поле, и он известен заранее, поэтому обеспечивают решение проблем, которые не могут быть решены с помощью набора обычных команд.Международная заявка была опубликована вместе с отчетом о международном поиске.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24413799 | 1999-08-30 | ||
PCT/JP2000/005848 WO2001016710A1 (fr) | 1999-08-30 | 2000-08-30 | Processeur de donnees |
Publications (2)
Publication Number | Publication Date |
---|---|
EA200200310A1 true EA200200310A1 (ru) | 2002-10-31 |
EA004196B1 EA004196B1 (ru) | 2004-02-26 |
Family
ID=17114319
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EA200200309A EA004071B1 (ru) | 1999-08-30 | 2000-08-30 | Управляющий программный продукт и система обработки данных |
EA200200310A EA004196B1 (ru) | 1999-08-30 | 2000-08-30 | Управляющий программный продукт и система обработки данных |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EA200200309A EA004071B1 (ru) | 1999-08-30 | 2000-08-30 | Управляющий программный продукт и система обработки данных |
Country Status (16)
Country | Link |
---|---|
US (4) | US6826674B1 (ru) |
EP (2) | EP1134654A4 (ru) |
JP (2) | JP4234925B2 (ru) |
KR (2) | KR100497078B1 (ru) |
CN (3) | CN1145879C (ru) |
AT (1) | ATE466330T1 (ru) |
AU (3) | AU782238B2 (ru) |
BR (2) | BR0013595A (ru) |
CA (2) | CA2348259A1 (ru) |
DE (1) | DE60044300D1 (ru) |
EA (2) | EA004071B1 (ru) |
HK (1) | HK1047326A1 (ru) |
IL (4) | IL142676A0 (ru) |
NZ (2) | NZ516679A (ru) |
TW (2) | TW504608B (ru) |
WO (3) | WO2001016717A1 (ru) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110209629A (zh) * | 2019-07-15 | 2019-09-06 | 北京一流科技有限公司 | 协处理器的数据处理路径中的数据流动加速构件及其方法 |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW504608B (en) * | 1999-08-30 | 2002-10-01 | Ip Flex Inc | Program product and data processing device |
JP2003140886A (ja) * | 2001-10-31 | 2003-05-16 | Seiko Epson Corp | インストラクションセット及びコンパイラ |
US7093225B2 (en) | 2002-07-17 | 2006-08-15 | Osann Robert Jr | FPGA with hybrid interconnect |
US7679398B2 (en) * | 2002-07-17 | 2010-03-16 | Osann Jr Robert | Reprogrammable instruction DSP |
JP4002151B2 (ja) * | 2002-07-31 | 2007-10-31 | 富士通株式会社 | 情報処理装置 |
RU2006100275A (ru) * | 2003-06-18 | 2006-07-10 | Амбрик, Инк. (Us) | Система разработки интегральной схемы |
US20070186076A1 (en) * | 2003-06-18 | 2007-08-09 | Jones Anthony M | Data pipeline transport system |
US20050097306A1 (en) * | 2003-09-29 | 2005-05-05 | Gajski Daniel D. | No-instruction-set-computer processor |
DE10360998B4 (de) * | 2003-12-23 | 2008-09-04 | Infineon Technologies Ag | Schutz von Chips gegen Attacken |
US7937557B2 (en) | 2004-03-16 | 2011-05-03 | Vns Portfolio Llc | System and method for intercommunication between computers in an array |
US9047094B2 (en) * | 2004-03-31 | 2015-06-02 | Icera Inc. | Apparatus and method for separate asymmetric control processing and data path processing in a dual path processor |
JP4451733B2 (ja) * | 2004-06-30 | 2010-04-14 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
JP4893309B2 (ja) * | 2004-10-28 | 2012-03-07 | 富士ゼロックス株式会社 | 再構成可能な論理回路を有するデータ処理装置 |
CN100346292C (zh) * | 2005-12-02 | 2007-10-31 | 浙江大学 | 多地址空间异步计算等待响应指令的控制方法 |
JP4795025B2 (ja) * | 2006-01-13 | 2011-10-19 | キヤノン株式会社 | ダイナミックリコンフィギャラブルデバイス、制御方法、及びプログラム |
US7617383B2 (en) * | 2006-02-16 | 2009-11-10 | Vns Portfolio Llc | Circular register arrays of a computer |
US7966481B2 (en) | 2006-02-16 | 2011-06-21 | Vns Portfolio Llc | Computer system and method for executing port communications without interrupting the receiving computer |
US7904615B2 (en) * | 2006-02-16 | 2011-03-08 | Vns Portfolio Llc | Asynchronous computer communication |
JP4410297B2 (ja) * | 2006-03-09 | 2010-02-03 | 富士通株式会社 | リコンフィギャラブル回路 |
US7555637B2 (en) * | 2007-04-27 | 2009-06-30 | Vns Portfolio Llc | Multi-port read/write operations based on register bits set for indicating select ports and transfer directions |
WO2008142750A1 (ja) * | 2007-05-17 | 2008-11-27 | Fujitsu Limited | 演算ユニット、プロセッサ及びプロセッサアーキテクチャ |
US7752592B2 (en) * | 2007-10-10 | 2010-07-06 | International Business Machines Corporation | Scheduler design to optimize system performance using configurable acceleration engines |
US20100023730A1 (en) * | 2008-07-24 | 2010-01-28 | Vns Portfolio Llc | Circular Register Arrays of a Computer |
US9069918B2 (en) * | 2009-06-12 | 2015-06-30 | Cadence Design Systems, Inc. | System and method implementing full-rate writes for simulation acceleration |
JP5718558B2 (ja) * | 2009-09-16 | 2015-05-13 | 富士ゼロックス株式会社 | 画像データ処理装置 |
TWI563479B (en) * | 2009-12-30 | 2016-12-21 | Tatung Co | Field emission display |
JP5617282B2 (ja) * | 2010-03-09 | 2014-11-05 | 富士通セミコンダクター株式会社 | データ処理システム |
JP5580404B2 (ja) * | 2010-03-29 | 2014-08-27 | 株式会社東芝 | 半導体装置 |
GB2483903A (en) * | 2010-09-24 | 2012-03-28 | Advanced Risc Mach Ltd | Instruction which specifies the type of the next instruction to be executed |
US9412022B2 (en) * | 2012-09-06 | 2016-08-09 | Leonard Flom | Iris identification system and method |
US9880842B2 (en) * | 2013-03-15 | 2018-01-30 | Intel Corporation | Using control flow data structures to direct and track instruction execution |
JP6321325B2 (ja) | 2013-04-03 | 2018-05-09 | ルネサスエレクトロニクス株式会社 | 情報処理装置および情報処理方法 |
US20170083313A1 (en) * | 2015-09-22 | 2017-03-23 | Qualcomm Incorporated | CONFIGURING COARSE-GRAINED RECONFIGURABLE ARRAYS (CGRAs) FOR DATAFLOW INSTRUCTION BLOCK EXECUTION IN BLOCK-BASED DATAFLOW INSTRUCTION SET ARCHITECTURES (ISAs) |
KR102276718B1 (ko) * | 2015-11-25 | 2021-07-13 | 삼성전자주식회사 | Vliw 인터페이스 장치 및 제어 방법 |
DE102017208818A1 (de) * | 2017-05-24 | 2018-11-29 | Wago Verwaltungsgesellschaft Mbh | Initialisierung von Datenbusteilnehmern |
RU182446U1 (ru) * | 2018-03-13 | 2018-08-17 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Казанский государственный энергетический университет" | Усовершенствованное устройство проверки однородности нескольких однотипных выборок |
CN113760364B (zh) * | 2020-06-03 | 2022-06-17 | 广东高云半导体科技股份有限公司 | 逻辑器件的控制器 |
Family Cites Families (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5626062B2 (ru) | 1973-12-12 | 1981-06-16 | ||
JPS61294548A (ja) * | 1985-06-21 | 1986-12-25 | Toshiba Corp | 機械命令実行装置 |
US5038386A (en) | 1986-08-29 | 1991-08-06 | International Business Machines Corporation | Polymorphic mesh network image processing system |
JPS6482131A (en) * | 1987-09-24 | 1989-03-28 | Mitsubishi Electric Corp | Data processor |
JPH01156824A (ja) * | 1987-12-14 | 1989-06-20 | Hitachi Ltd | マイクロプロセッサ |
JPH02183332A (ja) | 1989-01-10 | 1990-07-17 | Fujitsu Ltd | プログラムド制御方式 |
GB9123271D0 (en) | 1991-11-02 | 1991-12-18 | Int Computers Ltd | Data processing system |
US5452455A (en) * | 1992-06-15 | 1995-09-19 | International Business Machines Corporation | Asynchronous command support for shared channels for a computer complex having multiple operating systems |
JP3684579B2 (ja) | 1993-04-27 | 2005-08-17 | 富士通株式会社 | 分散型並列計算機のプロセッサエレメント |
US5535406A (en) * | 1993-12-29 | 1996-07-09 | Kolchinsky; Alexander | Virtual processor module including a reconfigurable programmable matrix |
US5551570B1 (en) | 1994-02-02 | 1999-10-05 | Tartan Paper Products | Decorative packaging system including a method and kit therefor |
JPH07253882A (ja) * | 1994-03-15 | 1995-10-03 | Hitachi Ltd | 命令制御装置 |
JPH07319692A (ja) | 1994-05-25 | 1995-12-08 | Fuji Electric Co Ltd | プログラマブルコントローラ |
US5617431A (en) * | 1994-08-02 | 1997-04-01 | Advanced Micro Devices, Inc. | Method and apparatus to reuse existing test patterns to test a single integrated circuit containing previously existing cores |
US6128720A (en) * | 1994-12-29 | 2000-10-03 | International Business Machines Corporation | Distributed processing array with component processors performing customized interpretation of instructions |
US6052773A (en) | 1995-02-10 | 2000-04-18 | Massachusetts Institute Of Technology | DPGA-coupled microprocessors |
US5742180A (en) | 1995-02-10 | 1998-04-21 | Massachusetts Institute Of Technology | Dynamically programmable gate array with multiple contexts |
JP2987308B2 (ja) * | 1995-04-28 | 1999-12-06 | 松下電器産業株式会社 | 情報処理装置 |
US5826072A (en) * | 1995-11-13 | 1998-10-20 | Oasis Design, Inc. | Pipelined digital signal processor and signal processing system employing same |
US5956518A (en) | 1996-04-11 | 1999-09-21 | Massachusetts Institute Of Technology | Intermediate-grain reconfigurable processing device |
US5771362A (en) * | 1996-05-17 | 1998-06-23 | Advanced Micro Devices, Inc. | Processor having a bus interconnect which is dynamically reconfigurable in response to an instruction field |
US6023564A (en) * | 1996-07-19 | 2000-02-08 | Xilinx, Inc. | Data processing system using a flash reconfigurable logic device as a dynamic execution unit for a sequence of instructions |
US5805875A (en) * | 1996-09-13 | 1998-09-08 | International Computer Science Institute | Vector processing system with multi-operation, run-time configurable pipelines |
DE19654846A1 (de) * | 1996-12-27 | 1998-07-09 | Pact Inf Tech Gmbh | Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.) |
JPH10260832A (ja) * | 1997-03-18 | 1998-09-29 | Hitachi Ltd | 情報処理装置 |
JP3790607B2 (ja) * | 1997-06-16 | 2006-06-28 | 松下電器産業株式会社 | Vliwプロセッサ |
US5970254A (en) * | 1997-06-27 | 1999-10-19 | Cooke; Laurence H. | Integrated processor and programmable data path chip for reconfigurable computing |
US5966534A (en) | 1997-06-27 | 1999-10-12 | Cooke; Laurence H. | Method for compiling high level programming languages into an integrated processor with reconfigurable logic |
JP3414209B2 (ja) | 1997-07-30 | 2003-06-09 | 松下電器産業株式会社 | プロセッサ |
JP3449186B2 (ja) * | 1997-08-19 | 2003-09-22 | 富士通株式会社 | パイプラインバイパス機能を有するデータ処理装置 |
US6282627B1 (en) * | 1998-06-29 | 2001-08-28 | Chameleon Systems, Inc. | Integrated processor and programmable data path chip for reconfigurable computing |
US6647511B1 (en) * | 1998-09-17 | 2003-11-11 | Texas Instruments Incorporated | Reconfigurable datapath for processor debug functions |
JP2000207202A (ja) | 1998-10-29 | 2000-07-28 | Pacific Design Kk | 制御装置およびデ―タ処理装置 |
US6181163B1 (en) * | 1999-01-21 | 2001-01-30 | Vantis Corporation | FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals |
US6477683B1 (en) * | 1999-02-05 | 2002-11-05 | Tensilica, Inc. | Automated processor generation system for designing a configurable processor and method for the same |
TW504608B (en) * | 1999-08-30 | 2002-10-01 | Ip Flex Inc | Program product and data processing device |
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2000
- 2000-08-30 TW TW089117580A patent/TW504608B/zh not_active IP Right Cessation
- 2000-08-30 DE DE60044300T patent/DE60044300D1/de not_active Expired - Lifetime
- 2000-08-30 IL IL14267600A patent/IL142676A0/xx active IP Right Grant
- 2000-08-30 US US09/830,664 patent/US6826674B1/en not_active Expired - Lifetime
- 2000-08-30 KR KR10-2001-7005452A patent/KR100497078B1/ko not_active IP Right Cessation
- 2000-08-30 NZ NZ516679A patent/NZ516679A/en not_active IP Right Cessation
- 2000-08-30 AT AT00956782T patent/ATE466330T1/de not_active IP Right Cessation
- 2000-08-30 JP JP2001520598A patent/JP4234925B2/ja not_active Expired - Lifetime
- 2000-08-30 CA CA002348259A patent/CA2348259A1/en not_active Abandoned
- 2000-08-30 WO PCT/JP2000/005850 patent/WO2001016717A1/ja active Application Filing
- 2000-08-30 WO PCT/JP2000/005848 patent/WO2001016710A1/ja active IP Right Grant
- 2000-08-30 KR KR10-2001-7005453A patent/KR100491593B1/ko active IP Right Grant
- 2000-08-30 TW TW089117579A patent/TW495711B/zh not_active IP Right Cessation
- 2000-08-30 WO PCT/JP2000/005849 patent/WO2001016711A1/ja not_active Application Discontinuation
- 2000-08-30 BR BR0013595-0A patent/BR0013595A/pt not_active IP Right Cessation
- 2000-08-30 AU AU68642/00A patent/AU782238B2/en not_active Ceased
- 2000-08-30 EP EP00956783A patent/EP1134654A4/en not_active Withdrawn
- 2000-08-30 US US09/830,704 patent/US6904514B1/en not_active Expired - Lifetime
- 2000-08-30 AU AU68643/00A patent/AU776972B2/en not_active Ceased
- 2000-08-30 CN CNB008018251A patent/CN1145879C/zh not_active Expired - Fee Related
- 2000-08-30 EA EA200200309A patent/EA004071B1/ru not_active IP Right Cessation
- 2000-08-30 CN CNB008018243A patent/CN1148647C/zh not_active Expired - Lifetime
- 2000-08-30 AU AU68644/00A patent/AU6864400A/en not_active Abandoned
- 2000-08-30 JP JP2001520597A patent/JP3842129B2/ja not_active Expired - Lifetime
- 2000-08-30 EA EA200200310A patent/EA004196B1/ru not_active IP Right Cessation
- 2000-08-30 CN CNB2004100055960A patent/CN1301459C/zh not_active Expired - Lifetime
- 2000-08-30 EP EP00956782A patent/EP1215569B1/en not_active Expired - Lifetime
- 2000-08-30 BR BR0013594-1A patent/BR0013594A/pt not_active IP Right Cessation
- 2000-08-30 NZ NZ516680A patent/NZ516680A/en not_active IP Right Cessation
- 2000-08-30 IL IL14267500A patent/IL142675A0/xx active IP Right Grant
- 2000-08-30 CA CA002348261A patent/CA2348261C/en not_active Expired - Fee Related
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2001
- 2001-04-18 IL IL142675A patent/IL142675A/en not_active IP Right Cessation
- 2001-04-18 IL IL142676A patent/IL142676A/en not_active IP Right Cessation
-
2002
- 2002-11-13 HK HK02108232.9A patent/HK1047326A1/zh unknown
-
2004
- 2004-09-22 US US10/946,746 patent/US20050038550A1/en not_active Abandoned
-
2005
- 2005-04-11 US US11/103,345 patent/US20050240757A1/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110209629A (zh) * | 2019-07-15 | 2019-09-06 | 北京一流科技有限公司 | 协处理器的数据处理路径中的数据流动加速构件及其方法 |
CN110209629B (zh) * | 2019-07-15 | 2023-12-15 | 北京一流科技有限公司 | 协处理器的数据处理路径中的数据流动加速装置及其方法 |
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