DE69901534D1 - Speicherschaltung mit eingebautem Selbsttest - Google Patents
Speicherschaltung mit eingebautem SelbsttestInfo
- Publication number
- DE69901534D1 DE69901534D1 DE69901534T DE69901534T DE69901534D1 DE 69901534 D1 DE69901534 D1 DE 69901534D1 DE 69901534 T DE69901534 T DE 69901534T DE 69901534 T DE69901534 T DE 69901534T DE 69901534 D1 DE69901534 D1 DE 69901534D1
- Authority
- DE
- Germany
- Prior art keywords
- test
- circuit
- built
- self
- bist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/36—Data generation devices, e.g. data inverters
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/31813—Test pattern generators
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19990103479 EP1031995B1 (de) | 1999-02-23 | 1999-02-23 | Speicherschaltung mit eingebautem Selbsttest |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69901534D1 true DE69901534D1 (de) | 2002-06-27 |
DE69901534T2 DE69901534T2 (de) | 2003-01-09 |
Family
ID=8237619
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69901534T Expired - Lifetime DE69901534T2 (de) | 1999-02-23 | 1999-02-23 | Integrierte Selbsttestschaltung für eine Speichereinrichtung |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP1031995B1 (de) |
DE (1) | DE69901534T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100356481C (zh) * | 2004-01-30 | 2007-12-19 | 北京中星微电子有限公司 | 一种嵌入式存储器的测试装置 |
TWI459008B (zh) * | 2012-05-30 | 2014-11-01 | Ind Tech Res Inst | 三維記憶體與其內建自我測試電路 |
US9859019B1 (en) | 2017-01-24 | 2018-01-02 | International Business Machines Corporation | Programmable counter to control memory built in self-test |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1047437B (it) * | 1975-10-08 | 1980-09-10 | Cselt Centro Studi Lab Telecom | Procedimento e dispositivo per il controllo in linea di memorie logiche sequenziali operanti a divisione di tempo |
KR100191143B1 (ko) * | 1994-08-19 | 1999-06-15 | 오우라 히로시 | 고속패턴 발생기 |
US5883905A (en) * | 1997-02-18 | 1999-03-16 | Schlumberger Technologies, Inc. | Pattern generator with extended register programming |
-
1999
- 1999-02-23 DE DE69901534T patent/DE69901534T2/de not_active Expired - Lifetime
- 1999-02-23 EP EP19990103479 patent/EP1031995B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69901534T2 (de) | 2003-01-09 |
EP1031995B1 (de) | 2002-05-22 |
EP1031995A1 (de) | 2000-08-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69902221D1 (de) | Speicherschaltungen mit eingebautem Selbsttest | |
WO2002001719A3 (en) | Method and apparatus for testing high performance circuits | |
JPS647400A (en) | Ic tester | |
KR870002582A (ko) | 테스트 패턴 발생회로를 갖는 반도체 기억장치 | |
EP1370880A4 (de) | Mehrfacherfassungs-dft-system für integrierte schaltungen auf scan-basis | |
KR930022383A (ko) | 메모리칩의 리프레시 어드레스 테스트 회로 | |
KR970003207A (ko) | 반도체 메모리 장치의 클럭 발생 장치 | |
KR920020524A (ko) | Lsi의 시험방법 및 lsi | |
KR910018812A (ko) | 다중 주파수 회로용 스캔 검사 회로 | |
EP1168369A3 (de) | Synchrone Halbleiterspeichervorrichtung | |
DE69901534D1 (de) | Speicherschaltung mit eingebautem Selbsttest | |
US20020071334A1 (en) | Testing of high speed DDR interface using single clock edge triggered tester data | |
SG138454A1 (en) | Memory testing apparatus and method | |
KR970051415A (ko) | 반도체 메모리 장치의 병합 데이타 출력 모드 선택 방법 | |
Kay et al. | Controllable LFSR for BIST | |
US6647524B1 (en) | Built-in-self-test circuit for RAMBUS direct RDRAM | |
JPH07140207A (ja) | 半導体装置及びその試験方法 | |
DE69229160D1 (de) | Prüfmustererzeugungsverfahren für Abtastschaltung | |
JPS5518778A (en) | Pseudo fault generator | |
JPS58166275A (ja) | 集積回路装置 | |
JP4285816B2 (ja) | パターン発生器、パターン発生方法及び試験装置 | |
US20010026172A1 (en) | Embedding of dynamic circuits in a static environment | |
TW428100B (en) | Built-in self-test circuit and test method of memory | |
KR20010011641A (ko) | 반도체장치의 테스트를 위한 내부 클럭 발생장치 | |
KR970029888A (ko) | 반도체 메모리의 패키지 번인 테스트회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |