DE69838023D1 - Nichtflüchtige Speicherstruktur und das entsprechende Herstellungsverfahren - Google Patents

Nichtflüchtige Speicherstruktur und das entsprechende Herstellungsverfahren

Info

Publication number
DE69838023D1
DE69838023D1 DE69838023T DE69838023T DE69838023D1 DE 69838023 D1 DE69838023 D1 DE 69838023D1 DE 69838023 T DE69838023 T DE 69838023T DE 69838023 T DE69838023 T DE 69838023T DE 69838023 D1 DE69838023 D1 DE 69838023D1
Authority
DE
Germany
Prior art keywords
volatile memory
memory structure
corresponding manufacturing
manufacturing
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69838023T
Other languages
English (en)
Inventor
Libera Giovanna Dalla
Federico Pio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69838023D1 publication Critical patent/DE69838023D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
DE69838023T 1998-07-30 1998-07-30 Nichtflüchtige Speicherstruktur und das entsprechende Herstellungsverfahren Expired - Lifetime DE69838023D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP98202563A EP0977267B1 (de) 1998-07-30 1998-07-30 Nichtflüchtige Speicherstruktur und das entsprechende Herstellungsverfahren

Publications (1)

Publication Number Publication Date
DE69838023D1 true DE69838023D1 (de) 2007-08-16

Family

ID=8233990

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69838023T Expired - Lifetime DE69838023D1 (de) 1998-07-30 1998-07-30 Nichtflüchtige Speicherstruktur und das entsprechende Herstellungsverfahren

Country Status (3)

Country Link
US (2) US6204531B1 (de)
EP (1) EP0977267B1 (de)
DE (1) DE69838023D1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180036652A (ko) * 2015-05-24 2018-04-09 리보닉스 인코포레이티드 표면을 소독하기 위한 시스템 및 방법
CN110854115B (zh) * 2019-11-26 2023-09-22 上海华力集成电路制造有限公司 一种基于FinFET工艺的标准单元版图结构

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2365859A1 (fr) * 1976-09-24 1978-04-21 Thomson Csf Memoire non volatile pour signaux rapides
US4288256A (en) * 1977-12-23 1981-09-08 International Business Machines Corporation Method of making FET containing stacked gates
JPH02237077A (ja) * 1989-03-09 1990-09-19 Toshiba Corp 不揮発性画像記憶装置
JPH0821638B2 (ja) * 1989-12-15 1996-03-04 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
US5338969A (en) * 1991-06-27 1994-08-16 Texas Instruments, Incorporated Unerasable programmable read-only memory
JPH05190809A (ja) * 1992-01-14 1993-07-30 Kawasaki Steel Corp 半導体装置の製造方法
JP3150438B2 (ja) * 1992-08-18 2001-03-26 ローム株式会社 光記憶装置およびその製法
US6023085A (en) * 1997-12-18 2000-02-08 Advanced Micro Devices, Inc. Core cell structure and corresponding process for NAND-type high performance flash memory device

Also Published As

Publication number Publication date
US6204531B1 (en) 2001-03-20
EP0977267A1 (de) 2000-02-02
EP0977267B1 (de) 2007-07-04
US20010005333A1 (en) 2001-06-28

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Legal Events

Date Code Title Description
8332 No legal effect for de