DE60042500D1 - Halbleieterspeicheranordnung und zugehöriges Steuerungsverfahren - Google Patents
Halbleieterspeicheranordnung und zugehöriges SteuerungsverfahrenInfo
- Publication number
- DE60042500D1 DE60042500D1 DE60042500T DE60042500T DE60042500D1 DE 60042500 D1 DE60042500 D1 DE 60042500D1 DE 60042500 T DE60042500 T DE 60042500T DE 60042500 T DE60042500 T DE 60042500T DE 60042500 D1 DE60042500 D1 DE 60042500D1
- Authority
- DE
- Germany
- Prior art keywords
- semi
- control method
- associated control
- memory arrangement
- carrier memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2227—Standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Power Sources (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31845899 | 1999-11-09 | ||
JP2000241019 | 2000-08-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60042500D1 true DE60042500D1 (de) | 2009-08-13 |
Family
ID=26569375
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60042258T Expired - Lifetime DE60042258D1 (de) | 1999-11-09 | 2000-09-27 | Halbleiterspeicheranordnung und ihre Steuerungsverfahren |
DE60042500T Expired - Lifetime DE60042500D1 (de) | 1999-11-09 | 2000-09-27 | Halbleieterspeicheranordnung und zugehöriges Steuerungsverfahren |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60042258T Expired - Lifetime DE60042258D1 (de) | 1999-11-09 | 2000-09-27 | Halbleiterspeicheranordnung und ihre Steuerungsverfahren |
Country Status (4)
Country | Link |
---|---|
EP (7) | EP2267723B1 (de) |
KR (1) | KR100592352B1 (de) |
DE (2) | DE60042258D1 (de) |
TW (1) | TW456033B (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5041631B2 (ja) * | 2001-06-15 | 2012-10-03 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
KR20010084970A (ko) * | 2001-06-19 | 2001-09-07 | 김태진 | 클럭동기회로 및 내부전압회로를 갖는 반도체회로 및 장치 |
JP4392740B2 (ja) | 2001-08-30 | 2010-01-06 | 株式会社ルネサステクノロジ | 半導体記憶回路 |
EP1388864A3 (de) * | 2002-08-08 | 2005-02-09 | Fujitsu Limited | Halbleiterspeichervorrichtung und Verfahren für das Steuern der Halbleiterspeichervorrichtung |
US6850105B1 (en) | 2003-09-30 | 2005-02-01 | Starcore, Llc | Method and circuitry for preserving a logic state |
KR101143396B1 (ko) * | 2006-10-12 | 2012-05-22 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치의 내부전압 발생기 |
KR101348170B1 (ko) * | 2007-01-31 | 2014-01-09 | 재단법인서울대학교산학협력재단 | 반도체 집적 회로 장치 및 그것의 전력 제어 방법 |
KR100919811B1 (ko) * | 2008-03-18 | 2009-10-01 | 주식회사 하이닉스반도체 | 내부전압 생성회로 |
JP2010086642A (ja) * | 2008-10-03 | 2010-04-15 | Nec Electronics Corp | 半導体装置および半導体装置の内部電源供給方法 |
EP2631657A1 (de) | 2012-02-25 | 2013-08-28 | Neurotune AG | Immunoassay zur Detektion des 22kDa-C-terminalen-Fragments (CAF) von Agrin |
US10284260B2 (en) | 2013-07-15 | 2019-05-07 | Hisense Co., Ltd. | Electronic device and communication method between electronic devices |
CN103701674B (zh) * | 2013-12-27 | 2017-11-03 | 海信集团有限公司 | 电力线设备接入方法、电力线设备和电子设备 |
CN108108564B (zh) * | 2017-12-29 | 2021-06-11 | 安徽皖通邮电股份有限公司 | 一种提高系统启动速度的装置和方法 |
CN110753163B (zh) * | 2019-10-28 | 2021-05-18 | 上海市共进通信技术有限公司 | 用于光网络终端voip功能模块的保护装置及其方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4799495A (en) | 1987-03-20 | 1989-01-24 | National Standard Company | Localization needle assembly |
US5197026A (en) * | 1989-04-13 | 1993-03-23 | Microchip Technology Incorporated | Transparent EEPROM backup of DRAM memories |
JPH05189961A (ja) * | 1992-01-17 | 1993-07-30 | Hitachi Ltd | 半導体記憶装置 |
JPH05299616A (ja) * | 1992-04-16 | 1993-11-12 | Hitachi Ltd | 半導体記憶装置 |
US5461338A (en) * | 1992-04-17 | 1995-10-24 | Nec Corporation | Semiconductor integrated circuit incorporated with substrate bias control circuit |
US5483152A (en) * | 1993-01-12 | 1996-01-09 | United Memories, Inc. | Wide range power supply for integrated circuits |
IL121044A (en) * | 1996-07-15 | 2000-09-28 | Motorola Inc | Dynamic memory device |
KR19990070489A (ko) * | 1998-02-16 | 1999-09-15 | 이병수 | 매직퍼즐의 센터블록 방향 전환방법 |
KR100284296B1 (ko) * | 1999-04-13 | 2001-03-02 | 김영환 | 내부전원 발생회로 |
-
2000
- 2000-09-27 EP EP10177225.9A patent/EP2267723B1/de not_active Expired - Lifetime
- 2000-09-27 DE DE60042258T patent/DE60042258D1/de not_active Expired - Lifetime
- 2000-09-27 EP EP00308482A patent/EP1100089B1/de not_active Expired - Lifetime
- 2000-09-27 DE DE60042500T patent/DE60042500D1/de not_active Expired - Lifetime
- 2000-09-27 EP EP09156495A patent/EP2083424A1/de not_active Withdrawn
- 2000-09-27 EP EP10165898.7A patent/EP2237281B8/de not_active Expired - Lifetime
- 2000-09-27 EP EP10165897.9A patent/EP2246859B1/de not_active Expired - Lifetime
- 2000-09-27 EP EP09156492A patent/EP2083423A1/de not_active Withdrawn
- 2000-09-27 EP EP03016398A patent/EP1361580B1/de not_active Expired - Lifetime
- 2000-09-29 KR KR1020000057304A patent/KR100592352B1/ko active IP Right Grant
- 2000-09-29 TW TW089120270A patent/TW456033B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP2246859A1 (de) | 2010-11-03 |
EP2083423A1 (de) | 2009-07-29 |
EP1361580A3 (de) | 2004-06-09 |
EP1361580A2 (de) | 2003-11-12 |
EP2267723A1 (de) | 2010-12-29 |
EP1100089B1 (de) | 2009-05-27 |
DE60042258D1 (de) | 2009-07-09 |
EP2237281A1 (de) | 2010-10-06 |
EP2267723B1 (de) | 2014-06-04 |
KR100592352B1 (ko) | 2006-06-22 |
TW456033B (en) | 2001-09-21 |
KR20010070113A (ko) | 2001-07-25 |
EP1361580B1 (de) | 2009-07-01 |
EP2237281B1 (de) | 2013-07-17 |
EP2083424A1 (de) | 2009-07-29 |
EP1100089A1 (de) | 2001-05-16 |
EP2246859B1 (de) | 2013-10-09 |
EP2237281B8 (de) | 2013-10-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE |