DE69835180D1 - Mikrostruktur und Verfahren zu ihrer Herstellung - Google Patents

Mikrostruktur und Verfahren zu ihrer Herstellung

Info

Publication number
DE69835180D1
DE69835180D1 DE69835180T DE69835180T DE69835180D1 DE 69835180 D1 DE69835180 D1 DE 69835180D1 DE 69835180 T DE69835180 T DE 69835180T DE 69835180 T DE69835180 T DE 69835180T DE 69835180 D1 DE69835180 D1 DE 69835180D1
Authority
DE
Germany
Prior art keywords
microstructure
preparation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69835180T
Other languages
English (en)
Other versions
DE69835180T2 (de
Inventor
Dirk Tobben
Peter Weigand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE69835180D1 publication Critical patent/DE69835180D1/de
Publication of DE69835180T2 publication Critical patent/DE69835180T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00111—Tips, pillars, i.e. raised structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0102—Surface micromachining
    • B81C2201/0105—Sacrificial layer
    • B81C2201/0109—Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0156—Lithographic techniques
    • B81C2201/0159—Lithographic techniques not provided for in B81C2201/0157
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/88—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by patterning layers, e.g. by etching conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/92—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by patterning layers, e.g. by etching conductive layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Analytical Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Micromachines (AREA)
DE69835180T 1997-03-31 1998-03-17 Mikrostruktur und Verfahren zu ihrer Herstellung Expired - Lifetime DE69835180T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US829255 1992-02-03
US08/829,255 US5926716A (en) 1997-03-31 1997-03-31 Method for forming a structure

Publications (2)

Publication Number Publication Date
DE69835180D1 true DE69835180D1 (de) 2006-08-24
DE69835180T2 DE69835180T2 (de) 2007-06-14

Family

ID=25253980

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69835180T Expired - Lifetime DE69835180T2 (de) 1997-03-31 1998-03-17 Mikrostruktur und Verfahren zu ihrer Herstellung

Country Status (7)

Country Link
US (2) US5926716A (de)
EP (1) EP0869556B1 (de)
JP (1) JPH10294442A (de)
KR (1) KR100537282B1 (de)
CN (1) CN1135614C (de)
DE (1) DE69835180T2 (de)
TW (1) TW434840B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6421223B2 (en) 1999-03-01 2002-07-16 Micron Technology, Inc. Thin film structure that may be used with an adhesion layer
DE19948087B4 (de) * 1999-10-06 2008-04-17 Evotec Ag Verfahren zur Herstellung eines Reaktionssubstrats
US8851442B2 (en) 2008-01-22 2014-10-07 Honeywell International Inc. Aerogel-bases mold for MEMS fabrication and formation thereof
CN108598262B (zh) * 2018-06-13 2023-10-27 青岛科技大学 一种铁电薄膜变容器的制备方法
FI129648B (en) * 2019-12-20 2022-06-15 Aalto Univ Foundation Sr Electrode structure

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918032A (en) * 1988-04-13 1990-04-17 General Motors Corporation Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures
JP2838412B2 (ja) * 1988-06-10 1998-12-16 三菱電機株式会社 半導体記憶装置のキャパシタおよびその製造方法
JPH07114260B2 (ja) * 1989-11-23 1995-12-06 財団法人韓国電子通信研究所 コップ状のポリシリコン貯蔵電極を有するスタック構造のｄｒａｍセル，およびその製造方法
JPH05183121A (ja) * 1991-04-01 1993-07-23 Fujitsu Ltd 半導体装置とその製造方法
US5240871A (en) * 1991-09-06 1993-08-31 Micron Technology, Inc. Corrugated storage contact capacitor and method for forming a corrugated storage contact capacitor
US5126916A (en) * 1991-12-20 1992-06-30 Industrial Technology Research Institute Stacked capacitor dram cell and method of fabricating
US5352622A (en) * 1992-04-08 1994-10-04 National Semiconductor Corporation Stacked capacitor with a thin film ceramic oxide layer
US5382547A (en) * 1992-07-31 1995-01-17 Sultan; Pervaiz Void free oxide fill for interconnect spaces
US5543346A (en) * 1993-08-31 1996-08-06 Hyundai Electronics Industries Co., Ltd. Method of fabricating a dynamic random access memory stacked capacitor
US5436188A (en) * 1994-04-26 1995-07-25 Industrial Technology Research Institute Dram cell process having elk horn shaped capacitor
KR960006030A (ko) * 1994-07-18 1996-02-23 김주용 반도체소자의 캐패시터 제조방법
KR0126623B1 (ko) * 1994-08-03 1997-12-26 김주용 반도체소자의 캐패시터 제조방법
US5518950A (en) * 1994-09-02 1996-05-21 Advanced Micro Devices, Inc. Spin-on-glass filled trench isolation method for semiconductor circuits
US5491104A (en) * 1994-09-30 1996-02-13 Industrial Technology Research Institute Method for fabricating DRAM cells having fin-type stacked storage capacitors
US5438011A (en) * 1995-03-03 1995-08-01 Micron Technology, Inc. Method of forming a capacitor using a photoresist contact sidewall having standing wave ripples
EP0814498A1 (de) * 1996-05-31 1997-12-29 Texas Instruments Incorporated Kondensator und Verfahren zu seiner Herstellung

Also Published As

Publication number Publication date
EP0869556B1 (de) 2006-07-12
KR19980080675A (ko) 1998-11-25
DE69835180T2 (de) 2007-06-14
KR100537282B1 (ko) 2006-04-21
US6015988A (en) 2000-01-18
TW434840B (en) 2001-05-16
EP0869556A1 (de) 1998-10-07
CN1195190A (zh) 1998-10-07
CN1135614C (zh) 2004-01-21
US5926716A (en) 1999-07-20
JPH10294442A (ja) 1998-11-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE