DE69830823D1 - Übertragungsbus mit unterschiedlichen übertragungsraten - Google Patents

Übertragungsbus mit unterschiedlichen übertragungsraten

Info

Publication number
DE69830823D1
DE69830823D1 DE69830823T DE69830823T DE69830823D1 DE 69830823 D1 DE69830823 D1 DE 69830823D1 DE 69830823 T DE69830823 T DE 69830823T DE 69830823 T DE69830823 T DE 69830823T DE 69830823 D1 DE69830823 D1 DE 69830823D1
Authority
DE
Germany
Prior art keywords
different transmission
transmission rates
transfer bus
bus
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69830823T
Other languages
English (en)
Other versions
DE69830823T2 (de
Inventor
Herman Schutte
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69830823D1 publication Critical patent/DE69830823D1/de
Publication of DE69830823T2 publication Critical patent/DE69830823T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/16—Arrangements for providing special services to substations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection (CSMA-CD)
    • H04L12/4135—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection (CSMA-CD) using bit-wise arbitration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
DE69830823T 1997-01-30 1998-01-12 Übertragungsbus mit unterschiedlichen übertragungsraten Expired - Lifetime DE69830823T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP97200250 1997-01-30
EP97200250 1997-01-30
PCT/IB1998/000041 WO1998034376A2 (en) 1997-01-30 1998-01-12 Communications bus using different transmission rates

Publications (2)

Publication Number Publication Date
DE69830823D1 true DE69830823D1 (de) 2005-08-18
DE69830823T2 DE69830823T2 (de) 2006-05-18

Family

ID=8227968

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69830823T Expired - Lifetime DE69830823T2 (de) 1997-01-30 1998-01-12 Übertragungsbus mit unterschiedlichen übertragungsraten

Country Status (8)

Country Link
US (1) US6038623A (de)
EP (1) EP0900493B1 (de)
JP (1) JP3987583B2 (de)
KR (1) KR100464467B1 (de)
CN (1) CN1123162C (de)
DE (1) DE69830823T2 (de)
TW (1) TW362178B (de)
WO (1) WO1998034376A2 (de)

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US6361440B1 (en) * 1999-02-04 2002-03-26 Namco Ltd. Game system, game machine, game data distribution machine, network system and information storage medium
US6753739B1 (en) 1999-03-24 2004-06-22 Cypress Semiconductor Corp. Programmable oscillator scheme
US6191660B1 (en) 1999-03-24 2001-02-20 Cypress Semiconductor Corp. Programmable oscillator scheme
US6946920B1 (en) 2000-02-23 2005-09-20 Cypress Semiconductor Corp. Circuit for locking an oscillator to a data stream
US6297705B1 (en) 2000-02-23 2001-10-02 Cypress Semiconductor Corp. Circuit for locking an oscillator to a data stream
US6407641B1 (en) 2000-02-23 2002-06-18 Cypress Semiconductor Corp. Auto-locking oscillator for data communications
US6501815B1 (en) 2000-06-30 2002-12-31 Cypress Semiconductor Corp. Loadable divide-by-N with fixed duty cycle
US6742071B1 (en) 2000-07-25 2004-05-25 Cypress Semiconductor Corp. Real-time I/O processor used to implement bus interface protocols
US6591322B1 (en) 2000-08-01 2003-07-08 Sun Microsystems, Inc. Method and apparatus for connecting single master devices to a multimaster wired-and bus environment
US7093151B1 (en) 2000-09-22 2006-08-15 Cypress Semiconductor Corp. Circuit and method for providing a precise clock for data communications
US6874052B1 (en) * 2000-09-29 2005-03-29 Lucent Technologies Inc. Expansion bridge apparatus and method for an I2C bus
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US6725320B1 (en) * 2001-02-08 2004-04-20 International Business Machines Corporation I2C bus switching devices interspersed between I2C devices
US6813672B1 (en) 2001-02-23 2004-11-02 Cypress Semiconductor Corp. EMC enhancement for differential devices
US6760872B2 (en) 2001-03-19 2004-07-06 Cypress Semiconductor Corp. Configurable and memory architecture independent memory built-in self test
US6931465B1 (en) 2001-03-31 2005-08-16 Cypress Semiconductor Corp. Intelligent, extensible SIE peripheral device
US6772251B1 (en) 2001-05-04 2004-08-03 Cypress Semiconductor Corporation Bit interleaved data serial interface
US6842806B2 (en) 2001-05-29 2005-01-11 Sun Microsystems, Inc. Method and apparatus for interconnecting wired-AND buses
WO2002097642A1 (en) * 2001-05-29 2002-12-05 Sun Microsystems, Inc. Method and apparatus for constructing and configuring multiple segment wired-and bus systems
US6625782B1 (en) 2001-08-13 2003-09-23 Cypress Semiconductor Corp. Software structure methodology description of programmable phase-locked loop die and device presentation techniques
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US6559726B1 (en) 2001-10-31 2003-05-06 Cypress Semiconductor Corp. Multi-modulus counter in modulated frequency synthesis
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
ITTO20011082A1 (it) * 2001-11-19 2003-05-19 Telecom Italia Lab Spa Procedimento per controllare la funzionalita' di una rete cdn, relativo sistema e prodotto informatico.
US6857040B2 (en) * 2001-12-05 2005-02-15 Hewlett-Packard Development Company, L.P. Bi-directional bus bridge in which multiple devices can assert bus concurrently
US20040255070A1 (en) * 2003-06-12 2004-12-16 Larson Thane M. Inter-integrated circuit router for supporting independent transmission rates
US7231474B1 (en) 2004-06-01 2007-06-12 Advanced Micro Devices, Inc. Serial interface having a read temperature command
US7095250B1 (en) 2004-12-21 2006-08-22 Analog Devices, Inc. Single wire bus communication system with method for handling simultaneous responses from multiple clients
US7809973B2 (en) 2005-11-16 2010-10-05 Cypress Semiconductor Corporation Spread spectrum clock for USB
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8035401B2 (en) 2007-04-18 2011-10-11 Cypress Semiconductor Corporation Self-calibrating driver for charging a capacitive load to a desired voltage
US7966438B2 (en) * 2007-09-27 2011-06-21 Honeywell International Inc. Two-wire communications bus system
DE102011100212A1 (de) * 2011-05-02 2012-11-08 GM Global Technology Operations LLC (n. d. Gesetzen des Staates Delaware) Sende-Empfangsvorrichtung und Verfahren zum Senden und Empfangen von Daten
TWI502370B (zh) * 2012-06-14 2015-10-01 Acer Inc 電子系統、從屬電子裝置與信號傳輸方法
CN103856199B (zh) * 2012-11-28 2017-02-08 苏州新宏博智能科技股份有限公司 一种用于数据总线上的上拉装置
CN103870430B (zh) * 2012-12-07 2017-12-01 上海贝尔股份有限公司 具有插接式端口的设备
US9548871B2 (en) * 2013-03-07 2017-01-17 General Electric Company Systems and methods for master arbitration
EP2908473B1 (de) 2013-07-04 2016-12-07 Elmos Semiconductor Aktiengesellschaft Kommunikationsnetzwerk zur übertragung von nachrichten
EP3336710B1 (de) * 2016-12-15 2019-10-02 Iristick nv I²c-brückenvorrichtung
US10361838B2 (en) * 2017-07-27 2019-07-23 Texas Instruments Incorporated Two-wire communication interface system
CN109085786B (zh) * 2018-09-04 2021-04-02 深圳市雷赛控制技术有限公司 双通道现场总线设计方法、控制系统及计算机终端
KR20210057297A (ko) 2019-11-12 2021-05-21 에스케이하이닉스 주식회사 시스템 및 시스템의 동작 방법

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US4689740A (en) * 1980-10-31 1987-08-25 U.S. Philips Corporation Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations
JPS59101943A (ja) * 1982-12-03 1984-06-12 Fuji Xerox Co Ltd デイジタル信号伝送方式
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JPH039631A (ja) * 1989-06-06 1991-01-17 Nec Commun Syst Ltd 時分割回線交換機の回線スピード交換制御方式
JP2738106B2 (ja) * 1990-02-06 1998-04-08 日産自動車株式会社 多重通信制御装置
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JPH07307649A (ja) * 1994-05-13 1995-11-21 Fujitsu Ltd 電子装置
AUPN704795A0 (en) * 1995-12-11 1996-01-11 Philips Electronics Australia Limited Bi-directional signal transmission system

Also Published As

Publication number Publication date
KR20000064823A (ko) 2000-11-06
EP0900493A2 (de) 1999-03-10
KR100464467B1 (ko) 2005-06-17
TW362178B (en) 1999-06-21
WO1998034376A2 (en) 1998-08-06
CN1220795A (zh) 1999-06-23
JP3987583B2 (ja) 2007-10-10
US6038623A (en) 2000-03-14
EP0900493B1 (de) 2005-07-13
JP2000508866A (ja) 2000-07-11
DE69830823T2 (de) 2006-05-18
CN1123162C (zh) 2003-10-01
WO1998034376A3 (en) 1998-09-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL