DE69712236T2 - Fehlerdiagnosevorrichtung für CMOS-integrierte Schaltungen und Diagnoseverfahren - Google Patents

Fehlerdiagnosevorrichtung für CMOS-integrierte Schaltungen und Diagnoseverfahren

Info

Publication number
DE69712236T2
DE69712236T2 DE69712236T DE69712236T DE69712236T2 DE 69712236 T2 DE69712236 T2 DE 69712236T2 DE 69712236 T DE69712236 T DE 69712236T DE 69712236 T DE69712236 T DE 69712236T DE 69712236 T2 DE69712236 T2 DE 69712236T2
Authority
DE
Germany
Prior art keywords
test
results
circuit
storage unit
cmos integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69712236T
Other languages
English (en)
Other versions
DE69712236D1 (de
Inventor
Kazuhiro Sakaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP8021825A external-priority patent/JP2800755B2/ja
Priority claimed from JP08108810A external-priority patent/JP3099732B2/ja
Priority claimed from JP8172722A external-priority patent/JP2904129B2/ja
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69712236D1 publication Critical patent/DE69712236D1/de
Publication of DE69712236T2 publication Critical patent/DE69712236T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G01R31/3008—Quiescent current [IDDQ] test or leakage current test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
DE69712236T 1996-01-12 1997-01-13 Fehlerdiagnosevorrichtung für CMOS-integrierte Schaltungen und Diagnoseverfahren Expired - Fee Related DE69712236T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP8021825A JP2800755B2 (ja) 1996-01-12 1996-01-12 Ｃｍｏｓ集積回路の故障診断装置及び診断方法
JP08108810A JP3099732B2 (ja) 1996-04-30 1996-04-30 Ｃｍｏｓ集積回路の故障診断装置および診断方法
JP8172722A JP2904129B2 (ja) 1996-07-03 1996-07-03 Ｃｍｏｓ集積回路の故障診断装置及び故障診断方法

Publications (2)

Publication Number Publication Date
DE69712236D1 DE69712236D1 (de) 2002-06-06
DE69712236T2 true DE69712236T2 (de) 2002-08-29

Family

ID=27283582

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69712236T Expired - Fee Related DE69712236T2 (de) 1996-01-12 1997-01-13 Fehlerdiagnosevorrichtung für CMOS-integrierte Schaltungen und Diagnoseverfahren

Country Status (4)

Country Link
US (1) US5790565A (de)
EP (1) EP0785513B1 (de)
KR (1) KR100212608B1 (de)
DE (1) DE69712236T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986461A (en) * 1996-09-17 1999-11-16 Intel Corporation UV methods for screening open circuit defects in CMOS integrated circuits
JP3018996B2 (ja) * 1996-07-29 2000-03-13 日本電気株式会社 故障個所特定化方法
JPH10134025A (ja) * 1996-10-30 1998-05-22 Mitsubishi Electric Corp 半導体集積回路
JP2947204B2 (ja) * 1997-02-24 1999-09-13 日本電気株式会社 Ｌｓｉの故障箇所の特定化方法
JP2982741B2 (ja) * 1997-05-13 1999-11-29 日本電気株式会社 集積回路の故障診断装置及びその記録媒体
KR100299716B1 (ko) * 1997-07-24 2001-09-06 가야시마 고조 Ic시험장치및방법
JP3204204B2 (ja) * 1997-11-21 2001-09-04 日本電気株式会社 論理ｌｓｉの製造プロセス診断システム、方法及び記録媒体
JP3669836B2 (ja) * 1998-03-19 2005-07-13 株式会社リコー Ｉｄｄｑテスト用サイクルの選択抽出装置
US6370675B1 (en) * 1998-08-18 2002-04-09 Advantest Corp. Semiconductor integrated circuit design and evaluation system using cycle base timing
FR2785992B1 (fr) * 1998-11-13 2000-12-22 Centre Nat Etd Spatiales Procede et installation de localisation rapide d'un defaut dans un circuit integre
US6295623B1 (en) * 1999-01-29 2001-09-25 Credence Systems Corporation System for testing real and simulated versions of an integrated circuit
JP4144824B2 (ja) * 1999-03-26 2008-09-03 キヤノン株式会社 半導体集積回路装置の故障箇所特定方法
JP4057207B2 (ja) * 1999-12-06 2008-03-05 富士通株式会社 ショート故障解析方法
JP4174167B2 (ja) * 2000-04-04 2008-10-29 株式会社アドバンテスト 半導体集積回路の故障解析方法および故障解析装置
US6714032B1 (en) 2000-04-25 2004-03-30 Agere System Inc. Integrated circuit early life failure detection by monitoring changes in current signatures
FR2811086B1 (fr) * 2000-06-28 2002-10-11 Centre Nat Etd Spatiales Procede d'individualisation d'un element de circuit integre
JP2002237506A (ja) * 2001-02-09 2002-08-23 Mitsubishi Electric Corp 故障解析装置及び故障解析方法、並びに半導体装置の製造方法
AU2003235491A1 (en) * 2002-05-14 2003-12-02 Logicvision (Canada), Inc. Method of and program product for performing gate-level diagnosis of failing vectors
US7103526B2 (en) * 2002-10-16 2006-09-05 Agilent Technologies, Inc. Method and apparatus for adapting a simulation model to expose a signal internal to the model to a client application
US7818646B1 (en) * 2003-11-12 2010-10-19 Hewlett-Packard Development Company, L.P. Expectation based event verification
US7219287B1 (en) 2004-09-29 2007-05-15 Xilinx, Inc. Automated fault diagnosis in a programmable device
US7272767B2 (en) * 2005-04-29 2007-09-18 Freescale Semiconductor, Inc. Methods and apparatus for incorporating IDDQ testing into logic BIST
US7970594B2 (en) * 2005-06-30 2011-06-28 The Mathworks, Inc. System and method for using model analysis to generate directed test vectors
JP2007102475A (ja) * 2005-10-04 2007-04-19 Dainippon Screen Mfg Co Ltd ソフトウェアシステムのテストケース抽出装置、テストケース抽出プログラムおよびテストケース抽出方法
US7397385B1 (en) * 2005-12-08 2008-07-08 At&T Corp. Predicting cable failure through remote failure detection of error signatures
US7352170B2 (en) * 2006-06-13 2008-04-01 International Business Machines Corporation Exhaustive diagnosis of bridging defects in an integrated circuit including multiple nodes using test vectors and IDDQ measurements
US9772372B2 (en) * 2014-01-30 2017-09-26 Texas Instruments Incorporated Kill die subroutine at probe for reducing parametric failing devices at package test
CN109408881A (zh) * 2018-09-18 2019-03-01 上海移鸿信息科技有限公司 一种轨道交通列车电路图虚拟测量方法
US11209808B2 (en) 2019-05-21 2021-12-28 At&T Intellectual Property I, L.P. Systems and method for management and allocation of network assets

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5321354A (en) * 1990-07-23 1994-06-14 Seiko Epson Corporation Method for inspecting semiconductor devices
JP2768069B2 (ja) * 1991-08-20 1998-06-25 日本電気株式会社 集積回路の故障解析方法

Also Published As

Publication number Publication date
US5790565A (en) 1998-08-04
DE69712236D1 (de) 2002-06-06
EP0785513A1 (de) 1997-07-23
EP0785513B1 (de) 2002-05-02
KR970059753A (ko) 1997-08-12
KR100212608B1 (ko) 1999-08-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee