DE69637850D1 - Verfahren zur Herstellung einer Gate-Elektrode für Hochfrequenz-Transistoren - Google Patents
Verfahren zur Herstellung einer Gate-Elektrode für Hochfrequenz-TransistorenInfo
- Publication number
- DE69637850D1 DE69637850D1 DE69637850T DE69637850T DE69637850D1 DE 69637850 D1 DE69637850 D1 DE 69637850D1 DE 69637850 T DE69637850 T DE 69637850T DE 69637850 T DE69637850 T DE 69637850T DE 69637850 D1 DE69637850 D1 DE 69637850D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- gate electrode
- frequency transistors
- transistors
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/061—Manufacture or treatment of FETs having Schottky gates
- H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0277—Electrolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
- H01L21/28581—Deposition of Schottky electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
- H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP04894095A JP3336487B2 (ja) | 1995-01-30 | 1995-01-30 | 高周波トランジスタのゲート電極形成方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69637850D1 true DE69637850D1 (de) | 2009-04-16 |
Family
ID=12817279
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69637850T Expired - Lifetime DE69637850D1 (de) | 1995-01-30 | 1996-01-25 | Verfahren zur Herstellung einer Gate-Elektrode für Hochfrequenz-Transistoren |
Country Status (4)
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5939249A (en) * | 1997-06-24 | 1999-08-17 | Imation Corp. | Photothermographic element with iridium and copper doped silver halide grains |
FR2769129A1 (fr) * | 1997-09-30 | 1999-04-02 | Thomson Csf | Procede de realisation de transistor a effet de champ |
DE102013006624B3 (de) * | 2013-04-18 | 2014-05-28 | Forschungszentrum Jülich GmbH | Hochfrequenzleiter mit verbesserter Leitfähigkeit und Verfahren seiner Herstellung |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3994758A (en) * | 1973-03-19 | 1976-11-30 | Nippon Electric Company, Ltd. | Method of manufacturing a semiconductor device having closely spaced electrodes by perpendicular projection |
US4283483A (en) * | 1979-07-19 | 1981-08-11 | Hughes Aircraft Company | Process for forming semiconductor devices using electron-sensitive resist patterns with controlled line profiles |
US4700462A (en) * | 1986-10-08 | 1987-10-20 | Hughes Aircraft Company | Process for making a T-gated transistor |
JPH02103939A (ja) * | 1988-10-12 | 1990-04-17 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2550412B2 (ja) * | 1989-05-15 | 1996-11-06 | ローム株式会社 | 電界効果トランジスタの製造方法 |
JPH0355852A (ja) * | 1989-07-25 | 1991-03-11 | Sony Corp | 半導体装置の製造方法 |
JPH0653242A (ja) * | 1992-07-27 | 1994-02-25 | Rohm Co Ltd | 半導体装置の製法 |
JPH0653244A (ja) * | 1992-07-27 | 1994-02-25 | Rohm Co Ltd | 半導体装置の製法 |
KR0135024B1 (en) * | 1994-11-15 | 1998-04-20 | Korea Electronics Telecomm | Fabrication method of self-aligned t-gare gaas metal semiconductor field effect transistor |
-
1995
- 1995-01-30 JP JP04894095A patent/JP3336487B2/ja not_active Expired - Fee Related
-
1996
- 1996-01-19 US US08/588,636 patent/US5776820A/en not_active Expired - Fee Related
- 1996-01-25 DE DE69637850T patent/DE69637850D1/de not_active Expired - Lifetime
- 1996-01-25 EP EP96101083A patent/EP0724288B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0724288A2 (en) | 1996-07-31 |
US5776820A (en) | 1998-07-07 |
JP3336487B2 (ja) | 2002-10-21 |
JPH08203933A (ja) | 1996-08-09 |
EP0724288B1 (en) | 2009-03-04 |
EP0724288A3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1996-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |