DE69626299T2 - Halbleiteranordnung und verfahren zur herstellung - Google Patents

Halbleiteranordnung und verfahren zur herstellung

Info

Publication number
DE69626299T2
DE69626299T2 DE69626299T DE69626299T DE69626299T2 DE 69626299 T2 DE69626299 T2 DE 69626299T2 DE 69626299 T DE69626299 T DE 69626299T DE 69626299 T DE69626299 T DE 69626299T DE 69626299 T2 DE69626299 T2 DE 69626299T2
Authority
DE
Germany
Prior art keywords
production method
semiconductor arrangement
semiconductor
arrangement
production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69626299T
Other languages
English (en)
Other versions
DE69626299D1 (de
Inventor
Futoshi Tokunoh
Yasuo Tanaka
Tokumitsu Sakamoto
Nobuhisa Nakasima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69626299D1 publication Critical patent/DE69626299D1/de
Publication of DE69626299T2 publication Critical patent/DE69626299T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/744—Gate-turn-off devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
DE69626299T 1996-09-24 1996-09-24 Halbleiteranordnung und verfahren zur herstellung Expired - Lifetime DE69626299T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1996/002741 WO1998013881A1 (fr) 1996-09-24 1996-09-24 Dispositif a semi-conducteur et son procede de production

Publications (2)

Publication Number Publication Date
DE69626299D1 DE69626299D1 (de) 2003-03-27
DE69626299T2 true DE69626299T2 (de) 2003-12-11

Family

ID=14153871

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69626299T Expired - Lifetime DE69626299T2 (de) 1996-09-24 1996-09-24 Halbleiteranordnung und verfahren zur herstellung

Country Status (5)

Country Link
US (1) US6020603A (de)
EP (1) EP0863553B1 (de)
JP (1) JP3058456B2 (de)
DE (1) DE69626299T2 (de)
WO (1) WO1998013881A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6797992B2 (en) * 2001-08-07 2004-09-28 Fabtech, Inc. Apparatus and method for fabricating a high reverse voltage semiconductor device
JP3530158B2 (ja) * 2001-08-21 2004-05-24 沖電気工業株式会社 半導体装置及びその製造方法
JP3872319B2 (ja) 2001-08-21 2007-01-24 沖電気工業株式会社 半導体装置及びその製造方法
WO2007084501A2 (en) * 2006-01-13 2007-07-26 Group4 Labs, Llc Method for manufacturing smooth diamond heat sinks
CZ301460B6 (cs) * 2007-10-22 2010-03-10 Polovodice, A. S. Výkonová polovodicová soucástka pro obvody s rychlými spínacími soucástkami
US8513703B2 (en) * 2010-10-20 2013-08-20 National Semiconductor Corporation Group III-nitride HEMT with multi-layered substrate having a second layer of one conductivity type touching a top surface of a first layers of different conductivity type and a method for forming the same
JP6130995B2 (ja) * 2012-02-20 2017-05-17 サンケン電気株式会社 エピタキシャル基板及び半導体装置
EP4006990B1 (de) 2020-11-27 2023-04-05 Hitachi Energy Switzerland AG Halbleiterbauelement mit einer seitenfläche mit unterschiedlichen teilbereichen

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54127686A (en) * 1978-03-28 1979-10-03 Mitsubishi Electric Corp Semiconductor device and its manufacture
DE3024939C3 (de) * 1979-07-02 1994-08-11 Hitachi Ltd Halbleiteranordnung
JPS5744562A (en) * 1980-08-27 1982-03-13 Tomisaburou Mikami Coupling hood for car
JPS5784175A (en) * 1980-11-13 1982-05-26 Mitsubishi Electric Corp Semiconductor device
JPS58141563A (ja) * 1982-02-17 1983-08-22 Toshiba Corp 半導体装置
JPS5944869A (ja) * 1982-09-07 1984-03-13 Toshiba Corp 半導体装置
JPH01318263A (ja) * 1988-06-20 1989-12-22 Meidensha Corp 半導体素子
JPH02202061A (ja) * 1989-01-31 1990-08-10 Mitsubishi Electric Corp 逆導通ゲートターンオフサイリスタ
JPH0624200B2 (ja) * 1989-04-28 1994-03-30 信越半導体株式会社 半導体デバイス用基板の加工方法
JPH0744191B2 (ja) * 1989-12-15 1995-05-15 三菱電機株式会社 半導体装置およびそのための電極ブロック
US5281847A (en) * 1990-06-12 1994-01-25 Mitsubishi Denki Kabushik Kaisha Groove structure for isolating elements comprising a GTO structure
JPH0488677A (ja) * 1990-07-31 1992-03-23 Meidensha Corp 半導体素子
JP3241526B2 (ja) * 1994-04-04 2001-12-25 三菱電機株式会社 ゲートターンオフサイリスタおよびその製造方法
JP3211604B2 (ja) * 1995-02-03 2001-09-25 株式会社日立製作所 半導体装置
JP3319227B2 (ja) * 1995-06-29 2002-08-26 三菱電機株式会社 電力用圧接型半導体装置

Also Published As

Publication number Publication date
EP0863553A1 (de) 1998-09-09
EP0863553B1 (de) 2003-02-19
DE69626299D1 (de) 2003-03-27
WO1998013881A1 (fr) 1998-04-02
US6020603A (en) 2000-02-01
JP3058456B2 (ja) 2000-07-04
EP0863553A4 (de) 1999-05-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)