DE69620944D1 - Halbleiter-Prüfmethode - Google Patents

Halbleiter-Prüfmethode

Info

Publication number
DE69620944D1
DE69620944D1 DE69620944T DE69620944T DE69620944D1 DE 69620944 D1 DE69620944 D1 DE 69620944D1 DE 69620944 T DE69620944 T DE 69620944T DE 69620944 T DE69620944 T DE 69620944T DE 69620944 D1 DE69620944 D1 DE 69620944D1
Authority
DE
Germany
Prior art keywords
test method
semiconductor test
semiconductor
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69620944T
Other languages
English (en)
Other versions
DE69620944T2 (de
Inventor
Yoshiro Nakata
Shinichi Oki
Koichi Nagao
Kenzo Hatada
Shigeoki Mori
Takashi Sato
Kunio Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Panasonic Holdings Corp
Original Assignee
Tokyo Electron Ltd
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd, Matsushita Electric Industrial Co Ltd filed Critical Tokyo Electron Ltd
Application granted granted Critical
Publication of DE69620944D1 publication Critical patent/DE69620944D1/de
Publication of DE69620944T2 publication Critical patent/DE69620944T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
DE69620944T 1995-05-19 1996-05-17 Halbleiter-Prüfmethode Expired - Fee Related DE69620944T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12100895 1995-05-19

Publications (2)

Publication Number Publication Date
DE69620944D1 true DE69620944D1 (de) 2002-06-06
DE69620944T2 DE69620944T2 (de) 2002-08-29

Family

ID=14800516

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69620944T Expired - Fee Related DE69620944T2 (de) 1995-05-19 1996-05-17 Halbleiter-Prüfmethode

Country Status (5)

Country Link
US (1) US5665610A (de)
EP (1) EP0743676B1 (de)
KR (1) KR100375177B1 (de)
DE (1) DE69620944T2 (de)
TW (2) TW409333B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0925509B1 (de) * 1996-09-13 2005-09-07 International Business Machines Corporation Prüfkopfstruktur mit mehreren getrennten isolierten prüfspitzen
US5912438A (en) * 1996-12-09 1999-06-15 Northern Telecom Limited Assembly of electronic components onto substrates
DE19739923C2 (de) 1997-09-11 2002-02-28 Fraunhofer Ges Forschung Verfahren und Vorrichtung zur gepulsten Hochstrombelastung integrierter Schaltungen und Strukturen
JP3730428B2 (ja) * 1998-12-22 2006-01-05 富士通株式会社 半導体装置試験用コンタクタの製造方法
JP2001056346A (ja) * 1999-08-19 2001-02-27 Fujitsu Ltd プローブカード及び複数の半導体装置が形成されたウエハの試験方法
US6938357B2 (en) * 2003-09-09 2005-09-06 Carter Day International, Inc. Forced air circulation for centrifugal pellet dryer
US7015580B2 (en) * 2003-11-25 2006-03-21 International Business Machines Corporation Roughened bonding pad and bonding wire surfaces for low pressure wire bonding
TWI360038B (en) * 2008-12-09 2012-03-11 Compal Electronics Inc Electronic device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3774088A (en) * 1972-12-29 1973-11-20 Ibm An integrated circuit test transistor structure and method of fabricating the same
EP0339871A3 (de) * 1988-04-29 1990-12-27 Advanced Micro Devices, Inc. Korrosionsfeste Lötstelle und Herstellungsverfahren
JP3381929B2 (ja) * 1990-12-27 2003-03-04 株式会社東芝 半導体装置
US5487999A (en) * 1991-06-04 1996-01-30 Micron Technology, Inc. Method for fabricating a penetration limited contact having a rough textured surface
US5585282A (en) * 1991-06-04 1996-12-17 Micron Technology, Inc. Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor
US5346858A (en) * 1992-07-16 1994-09-13 Texas Instruments Incorporated Semiconductor non-corrosive metal overcoat
US5399505A (en) * 1993-07-23 1995-03-21 Motorola, Inc. Method and apparatus for performing wafer level testing of integrated circuit dice
US5508229A (en) * 1994-05-24 1996-04-16 National Semiconductor Corporation Method for forming solder bumps in semiconductor devices

Also Published As

Publication number Publication date
EP0743676A3 (de) 1998-01-07
KR100375177B1 (ko) 2003-05-09
EP0743676A2 (de) 1996-11-20
EP0743676B1 (de) 2002-05-02
DE69620944T2 (de) 2002-08-29
TW409333B (en) 2000-10-21
US5665610A (en) 1997-09-09
TW343368B (en) 1998-10-21
KR960043071A (ko) 1996-12-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee