DE69525274D1 - Übertragungseinheit für parallele Daten mit bytefehlerkorrigierenden Kode - Google Patents

Übertragungseinheit für parallele Daten mit bytefehlerkorrigierenden Kode

Info

Publication number
DE69525274D1
DE69525274D1 DE69525274T DE69525274T DE69525274D1 DE 69525274 D1 DE69525274 D1 DE 69525274D1 DE 69525274 T DE69525274 T DE 69525274T DE 69525274 T DE69525274 T DE 69525274T DE 69525274 D1 DE69525274 D1 DE 69525274D1
Authority
DE
Germany
Prior art keywords
transmission unit
parallel data
error correcting
correcting code
byte error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69525274T
Other languages
English (en)
Other versions
DE69525274T2 (de
Inventor
Yoshihiko Suemura
Naoya Henmi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69525274D1 publication Critical patent/DE69525274D1/de
Application granted granted Critical
Publication of DE69525274T2 publication Critical patent/DE69525274T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0043—Realisations of complexity reduction techniques, e.g. use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)
DE69525274T 1994-03-30 1995-03-30 Übertragungseinheit für parallele Daten mit bytefehlerkorrigierenden Kode Expired - Fee Related DE69525274T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6059711A JP2715900B2 (ja) 1994-03-30 1994-03-30 並列データ伝送装置

Publications (2)

Publication Number Publication Date
DE69525274D1 true DE69525274D1 (de) 2002-03-21
DE69525274T2 DE69525274T2 (de) 2002-09-19

Family

ID=13121071

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69525274T Expired - Fee Related DE69525274T2 (de) 1994-03-30 1995-03-30 Übertragungseinheit für parallele Daten mit bytefehlerkorrigierenden Kode

Country Status (4)

Country Link
US (1) US5687181A (de)
EP (1) EP0675620B1 (de)
JP (1) JP2715900B2 (de)
DE (1) DE69525274T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2258935A1 (en) * 1997-04-30 1998-11-05 Sony Corporation Device and method for transmitting digital data
JP3235534B2 (ja) 1997-09-24 2001-12-04 日本電気株式会社 パラレル―パラレル変換回路並びにこれを用いたパラレル―シリアル変換回路及びシリアル―パラレル変換回路
US6175941B1 (en) 1998-12-08 2001-01-16 Lsi Logic Corporation Error correction apparatus and associated method utilizing parellel processing
US6771674B1 (en) * 1998-12-28 2004-08-03 3Com Corporation Method and system for forward error correction based on parallel streams
US7295554B1 (en) * 1999-03-12 2007-11-13 Lucent Technologies Inc. Word Multiplexing of encoded signals into a higher bit rate serial data stream
JP3536909B2 (ja) * 1999-12-24 2004-06-14 日本電気株式会社 交換装置とスクランブル方法
US6907560B2 (en) 2001-04-02 2005-06-14 Nortel Networks Limited Forward error correction (FEC) on a link between ICs
US7385949B1 (en) 2001-06-05 2008-06-10 Broadcom Corporation System and method for de-interleaving data in a wireless receiver
JP3565798B2 (ja) * 2001-06-14 2004-09-15 英二 藤原 バースト誤りパターン生成方法及びバーストおよびバイト誤り検出・訂正装置
AU2003224281A1 (en) 2002-04-12 2003-10-27 Azea Networks Limited Transmission system
JP2003318865A (ja) * 2002-04-26 2003-11-07 Fuji Xerox Co Ltd 信号伝送システム
US7330489B1 (en) * 2002-11-26 2008-02-12 Cisco Technology, Inc. Distributed data synchronization apparatus and method
US7103830B1 (en) 2002-12-18 2006-09-05 Applied Micro Circuits Corporation DC balanced error correction coding
EP1501198A1 (de) * 2003-07-24 2005-01-26 Matsushita Electric Industrial Co., Ltd. Methode, Kodierer und Kommunikationssystem für individuelles Kodieren von Kodeblocksegmenten
CN1849765B (zh) * 2003-09-09 2011-04-27 株式会社Ntt都科摩 无线多重传输系统中的信号传输方法、发送机及接收机
KR100617770B1 (ko) 2003-12-24 2006-08-28 삼성전자주식회사 채널 부호화 장치 및 방법
US20060132492A1 (en) * 2004-12-17 2006-06-22 Nvidia Corporation Graphics processor with integrated wireless circuits
JP2006253852A (ja) * 2005-03-09 2006-09-21 Hitachi Ltd 可変通信容量データ伝送装置及びデータ伝送装置
US8904115B2 (en) * 2010-09-28 2014-12-02 Texas Instruments Incorporated Cache with multiple access pipelines
JP2012124643A (ja) 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置及びデータ転送装置
JP2012124642A (ja) 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置、データ転送装置、及びプログラム
US9967476B2 (en) 2014-10-17 2018-05-08 Ross Video Limited Parallel video effects, mix trees, and related methods
US20160112723A1 (en) * 2014-10-17 2016-04-21 Ross Video Limited Transfer of video and related data over serial data interface (sdi) links
JP6596240B2 (ja) * 2015-06-08 2019-10-23 株式会社Ｆｕｊｉ 通信装置
EP4250572A3 (de) * 2023-06-21 2023-11-29 Inova Semiconductors Verfahren und systemanordnung zum berechnen einer vorwärtsfehlerkorrektur mit reduzierter gatteranzahl bei fec-kodierern

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07118160B2 (ja) * 1983-06-18 1995-12-18 ソニー株式会社 ディジタル情報信号の記録方法
JPS60171830A (ja) * 1984-02-15 1985-09-05 Nec Corp 符号変換装置
US5065396A (en) * 1990-01-02 1991-11-12 At&T Bell Laboratories Inverse multiplexer and demultiplexer techniques
JP3158213B2 (ja) * 1991-09-12 2001-04-23 富士通株式会社 並列伝送方法および装置
US5490155A (en) * 1992-10-02 1996-02-06 Compaq Computer Corp. Error correction system for n bits using error correcting code designed for fewer than n bits
JP2818534B2 (ja) * 1993-09-28 1998-10-30 日本電気株式会社 符号化変調方式
US5570356A (en) * 1995-06-07 1996-10-29 International Business Machines Corporation High bandwidth communications system having multiple serial links

Also Published As

Publication number Publication date
EP0675620A1 (de) 1995-10-04
JPH07273742A (ja) 1995-10-20
EP0675620B1 (de) 2002-02-06
US5687181A (en) 1997-11-11
JP2715900B2 (ja) 1998-02-18
DE69525274T2 (de) 2002-09-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee