DE69519015T2 - Mehrzustand-Halbleiterspeicheranordnung - Google Patents

Mehrzustand-Halbleiterspeicheranordnung

Info

Publication number
DE69519015T2
DE69519015T2 DE69519015T DE69519015T DE69519015T2 DE 69519015 T2 DE69519015 T2 DE 69519015T2 DE 69519015 T DE69519015 T DE 69519015T DE 69519015 T DE69519015 T DE 69519015T DE 69519015 T2 DE69519015 T2 DE 69519015T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
state semiconductor
state
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69519015T
Other languages
English (en)
Other versions
DE69519015D1 (de
Inventor
Toshio Komuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69519015D1 publication Critical patent/DE69519015D1/de
Publication of DE69519015T2 publication Critical patent/DE69519015T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5642—Multilevel memory with buffers, latches, registers at input or output
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
DE69519015T 1994-12-26 1995-12-21 Mehrzustand-Halbleiterspeicheranordnung Expired - Fee Related DE69519015T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6322661A JPH08180688A (ja) 1994-12-26 1994-12-26 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69519015D1 DE69519015D1 (de) 2000-11-09
DE69519015T2 true DE69519015T2 (de) 2001-02-15

Family

ID=18146195

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69519015T Expired - Fee Related DE69519015T2 (de) 1994-12-26 1995-12-21 Mehrzustand-Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5610855A (de)
EP (1) EP0720174B1 (de)
JP (1) JPH08180688A (de)
KR (2) KR100226951B1 (de)
DE (1) DE69519015T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224769B1 (ko) * 1995-12-29 1999-10-15 김영환 고속 버스트 리드/라이트 동작에 적합한 데이타 버스 라인 구조를 갖는 반도체 메모리 장치
US5784328A (en) * 1996-12-23 1998-07-21 Lsi Logic Corporation Memory system including an on-chip temperature sensor for regulating the refresh rate of a DRAM array
US8339159B2 (en) 2008-08-13 2012-12-25 Hynix Semiconductor Inc. Input buffer circuit of semiconductor apparatus
KR101053524B1 (ko) 2009-06-08 2011-08-03 주식회사 하이닉스반도체 반도체 버퍼 회로
KR20160074826A (ko) 2014-12-18 2016-06-29 삼성전자주식회사 반도체 장치
CA3030723C (en) 2019-01-21 2024-06-04 Mitchell B. Miller A system and method for bidirectionally based electrical information storage, processing and communication

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06101231B2 (ja) * 1985-10-21 1994-12-12 株式会社日立製作所 半導体多値記憶装置
US4719600A (en) * 1986-02-18 1988-01-12 International Business Machines Corporation Sense circuit for multilevel storage system
JPS63149900A (ja) * 1986-12-15 1988-06-22 Toshiba Corp 半導体メモリ
JPS63195896A (ja) * 1987-02-06 1988-08-12 Mitsubishi Electric Corp 多値記憶ダイナミツクｒａｍ装置
JPH01171194A (ja) * 1987-12-25 1989-07-06 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JP2795848B2 (ja) * 1988-02-02 1998-09-10 株式会社東芝 半導体記憶装置
JP2573416B2 (ja) * 1990-11-28 1997-01-22 株式会社東芝 半導体記憶装置

Also Published As

Publication number Publication date
US5610855A (en) 1997-03-11
DE69519015D1 (de) 2000-11-09
EP0720174B1 (de) 2000-10-04
KR100226951B1 (ko) 1999-10-15
JPH08180688A (ja) 1996-07-12
EP0720174A3 (de) 1998-01-21
KR960025780A (ko) 1996-07-20
EP0720174A2 (de) 1996-07-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee