DE69424108T2 - Störungsunempfindliche Codeeinstellungsschaltung - Google Patents

Störungsunempfindliche Codeeinstellungsschaltung

Info

Publication number
DE69424108T2
DE69424108T2 DE69424108T DE69424108T DE69424108T2 DE 69424108 T2 DE69424108 T2 DE 69424108T2 DE 69424108 T DE69424108 T DE 69424108T DE 69424108 T DE69424108 T DE 69424108T DE 69424108 T2 DE69424108 T2 DE 69424108T2
Authority
DE
Germany
Prior art keywords
interference
setting circuit
code setting
resistant code
resistant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69424108T
Other languages
English (en)
Other versions
DE69424108D1 (de
Inventor
Masanori Yoshimori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69424108D1 publication Critical patent/DE69424108D1/de
Publication of DE69424108T2 publication Critical patent/DE69424108T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory
DE69424108T 1993-09-01 1994-08-29 Störungsunempfindliche Codeeinstellungsschaltung Expired - Fee Related DE69424108T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5240354A JP2707954B2 (ja) 1993-09-01 1993-09-01 コード設定回路

Publications (2)

Publication Number Publication Date
DE69424108D1 DE69424108D1 (de) 2000-05-31
DE69424108T2 true DE69424108T2 (de) 2000-11-16

Family

ID=17058247

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69424108T Expired - Fee Related DE69424108T2 (de) 1993-09-01 1994-08-29 Störungsunempfindliche Codeeinstellungsschaltung

Country Status (5)

Country Link
US (1) US5446402A (de)
EP (1) EP0644554B1 (de)
JP (1) JP2707954B2 (de)
KR (1) KR0149056B1 (de)
DE (1) DE69424108T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5684417A (en) * 1995-11-14 1997-11-04 United Microelectronics Corporation Data sensing apparatus of a read only memory device
KR100204340B1 (ko) * 1996-06-19 1999-06-15 윤종용 메모리 장치의 모드 셋팅 회로
US6188239B1 (en) * 1996-08-12 2001-02-13 Micron Technology, Inc. Semiconductor programmable test arrangement such as an antifuse to ID circuit having common access switches and/or common programming switches
US6227637B1 (en) * 1998-05-14 2001-05-08 Lsi Logic Corporation Circuit and method for encoding and retrieving a bit of information
US6255893B1 (en) * 1999-07-07 2001-07-03 Intel Corporation Method and apparatus for detection of electrical overstress
US6275063B1 (en) * 1999-08-24 2001-08-14 Micron Technology, Inc. Method and apparatus for limited reprogrammability of fuse options using one-time programmable elements
EP2020684A3 (de) * 2007-07-25 2009-04-08 NEC Electronics Corporation Halbleiterbauelement und Verfahren zur Einstellung der Offset-Spannung
US10360988B2 (en) 2016-11-02 2019-07-23 Skyworks Solutions, Inc. Apparatus and methods for protection against inadvertent programming of fuse cells
US10255982B2 (en) * 2016-11-02 2019-04-09 Skyworks Solutions, Inc. Accidental fuse programming protection circuits

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4388703A (en) * 1979-05-10 1983-06-14 General Electric Company Memory device
JPS60182219A (ja) * 1984-02-29 1985-09-17 Fujitsu Ltd 半導体装置
JPS61253917A (ja) * 1985-05-02 1986-11-11 Nippon Denso Co Ltd 半導体集積回路
US4686384A (en) * 1985-08-09 1987-08-11 Harris Corporation Fuse programmable DC level generator
US5015889A (en) * 1989-02-23 1991-05-14 Reay Robert L Schottky enhanced CMOS output circuit
JPH0430571A (ja) * 1990-05-28 1992-02-03 Fuji Electric Co Ltd 高耐圧型駆動用半導体集積回路
JPH0468562A (ja) * 1990-07-10 1992-03-04 Nec Corp コード設定回路
JP2679390B2 (ja) * 1990-10-12 1997-11-19 日本電気株式会社 コード設定回路
GB2270795B (en) * 1992-09-18 1995-02-15 Texas Instruments Ltd Improvements in or relating to the trimming of integrated circuits

Also Published As

Publication number Publication date
KR0149056B1 (ko) 1998-12-01
JPH0774008A (ja) 1995-03-17
US5446402A (en) 1995-08-29
KR950010006A (ko) 1995-04-26
EP0644554B1 (de) 2000-04-26
JP2707954B2 (ja) 1998-02-04
EP0644554A3 (de) 1998-03-18
EP0644554A2 (de) 1995-03-22
DE69424108D1 (de) 2000-05-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee