KR940023687U - 캐리전달회로 - Google Patents
캐리전달회로Info
- Publication number
- KR940023687U KR940023687U KR2019930004606U KR930004606U KR940023687U KR 940023687 U KR940023687 U KR 940023687U KR 2019930004606 U KR2019930004606 U KR 2019930004606U KR 930004606 U KR930004606 U KR 930004606U KR 940023687 U KR940023687 U KR 940023687U
- Authority
- KR
- South Korea
- Prior art keywords
- delivery circuit
- carry delivery
- carry
- circuit
- delivery
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
- G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00323—Delay compensation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930004606U KR0137969Y1 (ko) | 1993-03-26 | 1993-03-26 | 캐리전달회로 |
US08/177,496 US5390137A (en) | 1993-03-26 | 1994-01-05 | Carry transfer apparatus |
JP6006328A JP2599689B2 (ja) | 1993-03-26 | 1994-01-25 | キャリ伝達装置 |
DE4406489A DE4406489C2 (de) | 1993-03-26 | 1994-02-28 | Vorrichtung zur Weiterleitung eines Übertragungssignals |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930004606U KR0137969Y1 (ko) | 1993-03-26 | 1993-03-26 | 캐리전달회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940023687U true KR940023687U (ko) | 1994-10-22 |
KR0137969Y1 KR0137969Y1 (ko) | 1999-04-01 |
Family
ID=19352698
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019930004606U KR0137969Y1 (ko) | 1993-03-26 | 1993-03-26 | 캐리전달회로 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5390137A (ko) |
JP (1) | JP2599689B2 (ko) |
KR (1) | KR0137969Y1 (ko) |
DE (1) | DE4406489C2 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5978826A (en) * | 1995-12-01 | 1999-11-02 | Lucent Techologies Inc. | Adder with even/odd 1-bit adder cells |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3717755A (en) * | 1971-05-21 | 1973-02-20 | Bell Telephone Labor Inc | Parallel adder using a carry propagation bus |
US3728532A (en) * | 1972-01-21 | 1973-04-17 | Rca Corp | Carry skip-ahead network |
US3843876A (en) * | 1973-09-20 | 1974-10-22 | Motorola Inc | Electronic digital adder having a high speed carry propagation line |
US4425623A (en) * | 1981-07-14 | 1984-01-10 | Rockwell International Corporation | Lookahead carry circuit apparatus |
US4504924A (en) * | 1982-06-28 | 1985-03-12 | International Business Machines Corporation | Carry lookahead logical mechanism using affirmatively referenced transfer gates |
EP0164450B1 (en) * | 1983-12-27 | 1990-03-07 | Nec Corporation | A carry circuit suitable for a high-speed arithmetic operation |
US5107142A (en) * | 1990-10-29 | 1992-04-21 | Sun Microsystems, Inc. | Apparatus for minimizing the reverse bias breakdown of emitter base junction of an output transistor in a tristate bicmos driver circuit |
-
1993
- 1993-03-26 KR KR2019930004606U patent/KR0137969Y1/ko not_active IP Right Cessation
-
1994
- 1994-01-05 US US08/177,496 patent/US5390137A/en not_active Expired - Fee Related
- 1994-01-25 JP JP6006328A patent/JP2599689B2/ja not_active Expired - Fee Related
- 1994-02-28 DE DE4406489A patent/DE4406489C2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2599689B2 (ja) | 1997-04-09 |
DE4406489A1 (de) | 1994-09-29 |
DE4406489C2 (de) | 1995-02-09 |
KR0137969Y1 (ko) | 1999-04-01 |
US5390137A (en) | 1995-02-14 |
JPH06290026A (ja) | 1994-10-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20051021 Year of fee payment: 8 |
|
LAPS | Lapse due to unpaid annual fee |