DE69327012D1 - Bauelement mit einer räumlichen Transfer verwendenden Halbleiteranordnung - Google Patents
Bauelement mit einer räumlichen Transfer verwendenden HalbleiteranordnungInfo
- Publication number
- DE69327012D1 DE69327012D1 DE69327012T DE69327012T DE69327012D1 DE 69327012 D1 DE69327012 D1 DE 69327012D1 DE 69327012 T DE69327012 T DE 69327012T DE 69327012 T DE69327012 T DE 69327012T DE 69327012 D1 DE69327012 D1 DE 69327012D1
- Authority
- DE
- Germany
- Prior art keywords
- component
- semiconductor arrangement
- spatial transfer
- spatial
- transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66931—BJT-like unipolar transistors, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunneling transistor [RTT], bulk barrier transistor [BBT], planar doped barrier transistor [PDBT], charge injection transistor [CHINT]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/135—Removal of substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/843,654 US5309003A (en) | 1992-02-28 | 1992-02-28 | Article comprising a real space transfer semiconductor device, and method of making the article |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69327012D1 true DE69327012D1 (de) | 1999-12-23 |
DE69327012T2 DE69327012T2 (de) | 2000-07-13 |
Family
ID=25290621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69327012T Expired - Fee Related DE69327012T2 (de) | 1992-02-28 | 1993-02-17 | Bauelement mit einer räumlichen Transfer verwendenden Halbleiteranordnung |
Country Status (4)
Country | Link |
---|---|
US (2) | US5309003A (de) |
EP (1) | EP0558229B1 (de) |
JP (1) | JP3078420B2 (de) |
DE (1) | DE69327012T2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0769209B1 (de) * | 1994-07-05 | 2003-10-15 | Infineon Technologies AG | Verfahren zur herstellung einer dreidimensionalen schaltungsanordnung |
WO1999050889A2 (en) * | 1998-03-27 | 1999-10-07 | Trustees Of Princeton University | Printed insulators for active and passive electronic devices |
US6893896B1 (en) | 1998-03-27 | 2005-05-17 | The Trustees Of Princeton University | Method for making multilayer thin-film electronics |
WO2001029881A2 (en) * | 1999-10-22 | 2001-04-26 | Teraconnect, Inc. | Method of making an optoelectronic device using multiple etch stop layers |
US6743697B2 (en) * | 2000-06-30 | 2004-06-01 | Intel Corporation | Thin silicon circuits and method for making the same |
JP3781178B2 (ja) * | 2001-03-30 | 2006-05-31 | ユーディナデバイス株式会社 | 高周波半導体装置の多層配線構造 |
US6895134B2 (en) * | 2001-11-10 | 2005-05-17 | Triquint Technology Holding Co. | Integrated optoelectronics devices |
US20040188712A1 (en) * | 2002-10-08 | 2004-09-30 | Eic Corporation | Heterojunction bipolar transistor having non-uniformly doped collector for improved safe-operating area |
US9227839B2 (en) | 2014-05-06 | 2016-01-05 | Raytheon Company | Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3067381D1 (en) * | 1979-11-15 | 1984-05-10 | Secr Defence Brit | Series-connected combination of two-terminal semiconductor devices and their fabrication |
US4675717A (en) * | 1984-10-09 | 1987-06-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Water-scale-integrated assembly |
US4686550A (en) * | 1984-12-04 | 1987-08-11 | American Telephone And Telegraph Company, At&T Bell Laboratories | Heterojunction semiconductor devices having a doping interface dipole |
JPH0712100B2 (ja) * | 1985-03-25 | 1995-02-08 | 株式会社日立製作所 | 半導体発光素子 |
JPH088350B2 (ja) * | 1985-04-08 | 1996-01-29 | 日本電気株式会社 | 半導体装置 |
JP2703885B2 (ja) * | 1986-02-14 | 1998-01-26 | 日本電気株式会社 | 半導体装置 |
US4903092A (en) * | 1986-08-12 | 1990-02-20 | American Telephone And Telegraph Company, At&T Bell Laboratories | Real space electron transfer device using hot electron injection |
EP0268386A2 (de) * | 1986-11-18 | 1988-05-25 | General Motors Corporation | Tunneltransistor |
JPS63260181A (ja) * | 1987-04-17 | 1988-10-27 | Toshiba Corp | 半導体装置 |
US5021841A (en) * | 1988-10-14 | 1991-06-04 | University Of Illinois | Semiconductor device with controlled negative differential resistance characteristic |
JPH02270387A (ja) * | 1989-04-11 | 1990-11-05 | Matsushita Electric Ind Co Ltd | 半導体発光素子 |
US4999687A (en) * | 1990-04-25 | 1991-03-12 | At&T Bell Laboratories | Logic element and article comprising the element |
US5055891A (en) * | 1990-05-31 | 1991-10-08 | Hewlett-Packard Company | Heterostructure transistor using real-space electron transfer |
US5157467A (en) * | 1990-09-12 | 1992-10-20 | Canon Kabushiki Kaisha | Quantum interference device and method for processing electron waves utilizing real space transfer |
US5223723A (en) * | 1990-10-19 | 1993-06-29 | At&T Bell Laboratories | Light emitting device |
US5318916A (en) * | 1992-07-31 | 1994-06-07 | Research Triangle Institute | Symmetric self-aligned processing |
-
1992
- 1992-02-28 US US07/843,654 patent/US5309003A/en not_active Expired - Lifetime
-
1993
- 1993-02-17 DE DE69327012T patent/DE69327012T2/de not_active Expired - Fee Related
- 1993-02-17 EP EP93301122A patent/EP0558229B1/de not_active Expired - Lifetime
- 1993-03-01 JP JP05062494A patent/JP3078420B2/ja not_active Expired - Lifetime
- 1993-12-21 US US08/171,504 patent/US5496743A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5309003A (en) | 1994-05-03 |
JP3078420B2 (ja) | 2000-08-21 |
DE69327012T2 (de) | 2000-07-13 |
US5496743A (en) | 1996-03-05 |
EP0558229B1 (de) | 1999-11-17 |
EP0558229A2 (de) | 1993-09-01 |
EP0558229A3 (en) | 1994-08-24 |
JPH0613603A (ja) | 1994-01-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |