DE69323386D1 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE69323386D1 DE69323386D1 DE69323386T DE69323386T DE69323386D1 DE 69323386 D1 DE69323386 D1 DE 69323386D1 DE 69323386 T DE69323386 T DE 69323386T DE 69323386 T DE69323386 T DE 69323386T DE 69323386 D1 DE69323386 D1 DE 69323386D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/14—Dummy cell management; Sense reference voltage generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4099—Dummy cell treatment; Reference voltage generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4313028A JP2817552B2 (ja) | 1992-01-30 | 1992-10-28 | 半導体メモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69323386D1 true DE69323386D1 (de) | 1999-03-18 |
DE69323386T2 DE69323386T2 (de) | 1999-06-10 |
Family
ID=18036351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69323386T Expired - Fee Related DE69323386T2 (de) | 1992-10-28 | 1993-10-28 | Halbleiterspeicheranordnung |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0595329B1 (de) |
KR (1) | KR970006599B1 (de) |
DE (1) | DE69323386T2 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102677515B1 (ko) * | 2016-12-14 | 2024-06-21 | 삼성전자주식회사 | 더미 셀을 가지는 불휘발성 메모리 장치 및 이를 포함하는 메모리 시스템 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4669063A (en) * | 1982-12-30 | 1987-05-26 | Thomson Components-Mostek Corp. | Sense amplifier for a dynamic RAM |
JPS60177495A (ja) * | 1984-02-22 | 1985-09-11 | Nec Corp | 半導体メモリ装置 |
US4853897A (en) * | 1986-12-10 | 1989-08-01 | Kabushiki Kaisha Toshiba | Complementary semiconductor memory device |
JPH03117113A (ja) * | 1989-09-29 | 1991-05-17 | Hitachi Ltd | 半導体集積回路装置 |
-
1993
- 1993-10-28 DE DE69323386T patent/DE69323386T2/de not_active Expired - Fee Related
- 1993-10-28 KR KR1019930022856A patent/KR970006599B1/ko not_active IP Right Cessation
- 1993-10-28 EP EP93117514A patent/EP0595329B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR940010091A (ko) | 1994-05-24 |
DE69323386T2 (de) | 1999-06-10 |
EP0595329A3 (de) | 1994-11-02 |
EP0595329B1 (de) | 1999-02-03 |
EP0595329A2 (de) | 1994-05-04 |
KR970006599B1 (ko) | 1997-04-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69230810D1 (de) | Halbleiterspeicheranordnung | |
DE69224315D1 (de) | Halbleiterspeichervorrichtung | |
DE69327499D1 (de) | Halbleiterspeicher | |
DE69322311D1 (de) | Halbleiterspeicheranordnung | |
DE69232950D1 (de) | Halbleiterspeichervorrichtung | |
DE69322747D1 (de) | Halbleiterspeicheranordnung | |
DE4407210B4 (de) | Halbleiterspeicherbauelementaufbau | |
DE69322725D1 (de) | Halbleiterspeicheranordnung | |
DE69125206D1 (de) | Halbleiterspeicheranordnung | |
KR940011024U (ko) | 반도체 메모리 장치 | |
DE69432846D1 (de) | Halbleiterspeichereinrichtung | |
DE69427443D1 (de) | Halbleiterspeicheranordnung | |
DE69121801D1 (de) | Halbleiterspeicheranordnung | |
DE69220101D1 (de) | Halbleiterspeichereinrichtung | |
DE69326494D1 (de) | Halbleiterspeicheranordnung | |
DE69219518D1 (de) | Halbleiterspeicheranordnung | |
DE69332966D1 (de) | Halbleiterspeicherbauelement | |
DE69324470D1 (de) | Halbleiterspeicheranordnung | |
DE69322436D1 (de) | Halbleiterspeicheranordnung | |
DE69222793D1 (de) | Halbleiterspeicheranordnung | |
DE69223333D1 (de) | Halbleiterspeicheranordnung | |
DE69225298D1 (de) | Halbleiterspeichervorrichtung | |
DE69325132D1 (de) | Halbleiterspeicherbauelement | |
DE69427107D1 (de) | Halbleiterspeicheranordnung | |
DE69215555D1 (de) | Halbleiterspeicheranordnung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |